SimXMD Simulation-based HW/SW Co-debugging for field-programmable Systems-on-Chip
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1 SimXMD Simulation-based HW/SW Co-debugging for field-programmable Systems-on-Chip Ruediger Willenberg and Paul Chow High-Performance Reconfigurable Computing Group University of Toronto September 4, 2013
2 The When Harry Met Sally rule of CAD 2
3 The When Harry Met Sally rule of CAD 3
4 The When Harry Met Sally rule of CAD 4
5 The When Harry Met Sally rule of CAD 5
6 The When Harry Met Sally rule of CAD 6
7 FPGA embedded systems CPU Application Peripheral B FPGA 7
8 FPGA embedded systems CPU Application Peripheral A Peripheral B FPGA 8
9 FPGA embedded systems CPU Application Peripheral A Peripheral B other on-chip hardware FPGA 9
10 FPGA embedded systems CPU Application Peripheral A Peripheral B other (not verified) on-chip hardware (not verified) FPGA 1 0
11 FPGA embedded systems CPU Application Driver code Peripheral A Peripheral B other (not verified) on-chip hardware (not verified) FPGA 1 1
12 FPGA embedded systems CPU Application Driver code (untested) Peripheral A Peripheral B other (not verified) on-chip hardware (not verified) FPGA 1 2
13 FPGA embedded systems CPU Application Driver code (untested) Optimal: Peripheral A Peripheral B other (not verified) on-chip hardware (not verified) FPGA Debug hardware, software and their interaction together 1 3
14 FPGA embedded systems CPU Application Driver code (untested) Optimal: Peripheral A Peripheral B other (not verified) on-chip hardware (not verified) FPGA Debug hardware, software and their interaction together 1 4
15 Embedded SW debugging chain GUI GDB TCP XMD JTAG CPU Xilinx FPGA 1 5
16 Embedded SW debugging chain GUI GDB TCP XMD JTAG CPU Xilinx FPGA Debugger on host system 1 6
17 Embedded SW debugging chain GUI GDB TCP XMD JTAG CPU Xilinx FPGA Debugger on host system 1 7 Software runs on target system
18 Embedded SW debugging chain GUI GDB TCP XMD JTAG CPU Xilinx FPGA Debugger on host system Vendor-specific interface software Software runs on target system 1 8
19 HW debugging ModelSim system_tb.v system.v 1 9
20 HW debugging ModelSim system_tb.v system.v Cycle-accurate digital simulator 2 0
21 HW debugging ModelSim system_tb.v system.v Cycle-accurate digital simulator A system model in HDL 2 1
22 HW debugging ModelSim system_tb.v system.v Cycle-accurate digital simulator A system model in HDL Testbench instantiates and stimulates model 2 2
23 HW debugging ModelSim system_tb.v system.v Cycle-accurate digital simulator A system model in HDL Testbench instantiates and stimulates model All internal signals observable 2 3
24 HW/SW Co-Debugging? GUI GDB ModelSim system_tb.v system.v 2 4
25 HW/SW Co-Debugging? GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v 2 5
26 HW/SW Co-Debugging? GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v SimXMD: Simulation-based experimental Microprocessor Debugger 2 6
27 HW/SW Co-Debugging? GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v SimXMD: Simulation-based experimental Microprocessor Debugger Translates debugger requests into simulator commands 2 7
28 Key SimXMD enablers GDB Remote Serial Protocol Defines requests and replies for: Setting/deleting breakpoints Advancing execution by instruction, line, breakpoint Reading registers or memory state 2 8
29 Key SimXMD enablers GDB Remote Serial Protocol Defines requests and replies for: Setting/deleting breakpoints Advancing execution by instruction, line, breakpoint Reading registers or memory state Xilinx MicroBlaze Trace Port Reports all information about a finished instruction: Instruction code and address Register and memory writes 2 9
30 Key SimXMD enablers GDB Remote Serial Protocol Defines requests and replies for: Setting/deleting breakpoints Advancing execution by instruction, line, breakpoint Reading registers or memory state Xilinx MicroBlaze Trace Port Reports all information about a finished instruction: Instruction code and address Register and memory writes ModelSim (Tcl) TCP server capability Can receive remote commands and send back results 3 0
31 Operating SimXMD: Preparation 1. Simulation model generation by design tool Currently: Xilinx Platform Studio 2. SimXMD is started (background operation) Examines embedded project information Modifies simulation model for Co-Debugging 3. Compilation of simulation model Start of simulation 5. Start of preferred debugger (GUI) 6. Debugging at will
32 Operating SimXMD: Modes Run x2 0x3 0x4 0x5 PC = 5 int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } 3 2
33 Operating SimXMD: Modes Run x2 0x3 0x4 0x5 PC = 5 int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } 3 3 In Run mode, debugging drives the simulation
34 Operating SimXMD: Modes Run pick Replay time x2 0x3 0x4 0x5 x2 0x3 0x4 0x5 PC = 5 PC = 5 int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } 3 4 In Run mode, debugging drives the simulation In Replay mode, debugging iterates over previously simulated data
35 Operating SimXMD: Modes Run pick Replay time Replay x2 0x3 0x4 0x5 x2 0x3 0x4 0x5 x2 0x3 0x4 0x5 PC = 5 PC = 5 PC = 3 int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } 3 5 In Run mode, debugging drives the simulation In Replay mode, debugging iterates over previously simulated data
36 Operating SimXMD: Modes Run pick Replay time Replay Run x2 0x3 0x4 0x5 x2 0x3 0x4 0x5 x2 0x3 0x4 0x5 x2 0x3 0x4 0x5 0x6 PC = 5 PC = 5 PC = 3 PC = 6 int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } int main() { a = functiona(); b = functionb(a); c = b + 5 * d; return c; } 3 6 In Run mode, debugging drives the simulation In Replay mode, debugging iterates over previously simulated data
37 Implementation: Debugging memory 3 7
38 Implementation: Debugging memory Digital hardware simulation models the complete memory hierarchy: On-chip and external memory All cache levels Memory-mapped peripherals 3 8
39 Implementation: Debugging memory Digital hardware simulation models the complete memory hierarchy: On-chip and external memory All cache levels Memory-mapped peripherals Software debugging uses a flat, linear memory model: 3 9 The debugger requests a (virtual) memory address The target hardware determines and reads the physical location
40 SimXMD memory access logging Shared Log GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v 4 0 Boot Memory
41 SimXMD memory access logging Shared Log GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v 4 1 Boot Memory
42 SimXMD memory access logging Shared Log $memlog VPI GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v 4 2 Boot Memory VPI: Verilog Procedural Interface
43 SimXMD memory access logging Shared Log $memlog VPI GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v 4 3 Boot Memory VPI: Verilog Procedural Interface
44 SimXMD memory access logging Shared Log $memlog VPI GUI GDB TCP SimXMD TCP ModelSim system_tb.v system.v 4 4 Boot Memory VPI: Verilog Procedural Interface
45 SimXMD tool support Xilinx Embedded Development Kit >= 13.x Xilinx MicroBlaze Processor >= 8.x MentorGraphics ModelSim >= 6.6g Linux Operating System Debuggers Command-line GDB Xilinx SDK (Eclipse) DDD KDbg Nemiver 4 5
46 SimXMD modular architecture 4 6
47 SimXMD limitations 4 7
48 SimXMD limitations Debugger can t modify variables, registers 4 8
49 SimXMD limitations Debugger can t modify variables, registers Volatile memory locations might be inaccurate Shared-memory multiprocessing DMA, Busmastering Memory-mapped peripherals 4 9
50 SimXMD limitations Debugger can t modify variables, registers Volatile memory locations might be inaccurate Shared-memory multiprocessing DMA, Busmastering Memory-mapped peripherals Not all MicroBlaze special registers reported 5 0 Not reported by Trace Port Not used by GDB for anything
51 SimXMD limitations Debugger can t modify variables, registers Volatile memory locations might be inaccurate Shared-memory multiprocessing DMA, Busmastering Memory-mapped peripherals Not all MicroBlaze special registers reported 5 1 Not reported by Trace Port Not used by GDB for anything Trace Port reports actions after instruction completes; several cycles difference
52 SimXMD Performance How much do the SimXMD modifications slow down simulation? 5 2
53 SimXMD Performance How much do the SimXMD modifications slow down simulation? How slow is SimXMD debugging in comparison with debugging a real target? 5 3
54 SimXMD Performance How much do the SimXMD modifications slow down simulation? How slow is SimXMD debugging in comparison with debugging a real target? Test system: Host: Intel i5 Nehalem 4-core, 2.5Ghz, 12GB RAM Target: Xilinx Spartan 6 (Atlys board), JTAG 100MHz, 64kB on-chip BRAM AXI bus, one GPIO peripheral Application: Writing 32kB byte-by-byte into BRAM 5 4
55 SimXMD overhead Write size w/o SimXMD w/ SimXMD 1 kbyte 6.9 s 7.3 s 2 kbyte 13.8 s 14.5 s 4 kbyte 27.3 s 29.0 s 8 kbyte 54.9 s 57.7 s 16 kbyte s s 32 kbyte s s 5 5
56 SimXMD overhead Write size w/o SimXMD w/ SimXMD 1 kbyte 6.9 s 7.3 s 2 kbyte 13.8 s 14.5 s 4 kbyte 27.3 s 29.0 s 8 kbyte 54.9 s 57.7 s 16 kbyte s s 32 kbyte s s 5 6 Average overhead: 6.0%
57 SimXMD debugging speed Same system and application Let GDB execute script of 50 steps (1 code line) Average time for a single code step: Hardware with JTAG SimXMD Run mode SimXMD Replay mode s s s 5 7
58 Conclusions 5 8
59 SimXMD enables: Conclusions Simultaneous debugging of software and hardware Hardware debugging timed by software sections Software debugging without existing/implemented HW 5 9
60 SimXMD enables: Conclusions Simultaneous debugging of software and hardware Hardware debugging timed by software sections Software debugging without existing/implemented HW SimXMD does not significantly slow down reasonable debugging efforts 6 0
61 SimXMD enables: Conclusions Simultaneous debugging of software and hardware Hardware debugging timed by software sections Software debugging without existing/implemented HW SimXMD does not significantly slow down reasonable debugging efforts 6 1 SimXMD is open source
62 SimXMD enables: Conclusions Simultaneous debugging of software and hardware Hardware debugging timed by software sections Software debugging without existing/implemented HW SimXMD does not significantly slow down reasonable debugging efforts 6 2 SimXMD is open source SimXMD s modular architecture facilitates extension to other processors and tools
63 Conclusions SimXMD can be downloaded at: 6 3
64 Conclusions SimXMD can be downloaded at: Thank you for your attention! 6 4 Questions?
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