AURIX TC27x variants. Data Sheet Addendum. 32-bit microcontroller. v1.3, M i c r o c o n t r o l l e r s

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1 T C277 / TC275 / T270 AURIX 32-bit microcontroller Addendum v1.3, M i c r o c o n t r o l l e r s

2 Table of Contents About this document Variants BC Step Variants CA Step Variants DB Step Variants DC Step... 7 Memory Maps of Variants... 8 Revision History Addendum 2 v1.3,

3 About this document Scope and purpose This document is an addendum to the TC27x data sheet listing all intended product variants, key parameters such as memory size, and optional features.. Naming Conventions Prefix SAK: T ambient Temperature Range from -40 C up to +125 C SAL: T ambient Temperature Range from -40 C up to +150 C (packaged device) Feature Package T Standard type without HSM TP Standard type with HSM enabled TC customer specific feature set Addendum 3 v1.3,

4 1. Variants BC Step Derivative Production Status Package Type Temp. Range Chip ID Freq. (MHz) Flash (MB) 1) EEPROM Total SRAM Core 1&2 TC16P 1) Core 0 TC16E 1) LMU ADC Chan. FlexRay (#/ch.) ETH HSM CAN FD SAK-TC277TP-64F200S BC on request PG-LFBGA C +125 C SAK-TC275TP-64F200W BC on request PG-LQFP C +125 C H H 3) H H 3) k / 2 Yes Yes No k / 2 Yes Yes No 1) The address range starts at the lowest address defined in the User s Manual (See the Memory Maps chapter). Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual). 3) Featuring flash firmware (µcode) version 23H Addendum 4 v1.3,

5 2. Variants CA Step Derivative Production Status 1) Package Type Temp. Range Chip ID Freq. (MHz) PFlash (MB) EEPROM 3) Total SRAM Core 1&2 TC16P Core 0 TC16E LMU ADC Chan. FlexRay (#/ch.) ETH HSM CAN FD CAN FD DIS 2015 SAK-TC277TP-64F200S CA STANDARD PG-LFBGA C +125 C SAK-TC277TC-64F200S CA on request PG-LFBGA C +125 C SAK-TC277T-64F200S CA STANDARD PG-LFBGA C +125 C SAK-TC275TP-64F200W CA STANDARD PG-LQFP C +125 C SAK-TC275TC-64F200W CA on request PG-LQFP C +125 C SAK-TC275T-64F200W CA STANDARD PG-LQFP C +125 C SAL-TC275TP-64F200W CA on request PG-LQFP C +150 C SAL-TC275T-64F200W CA on request PG-LQFP C +150 C H H 4) H H H H H H H H H H H H H H k / 2 Yes Yes Yes No k / 2 No Yes No No k / 2 Yes No Yes No k / 2 Yes Yes Yes No k / 2 No Yes No No k / 2 Yes No Yes No k / 2 Yes Yes Yes No k / 2 Yes No Yes No 1) STANDARD = serial production planned. The address range starts at the lowest address defined in the User s Manual (See the Memory Maps chapter). 3) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual). 4) Featuring flash firmware (µcode) version 23H Addendum 5 v1.3,

6 3. Variants DB Step Derivative Production Status 1) Package Type Temp. Range Chip ID Freq. (MHz) Flash (MB) EEPROM 3) Total SRAM Core 1&2 TC16P Core 0 TC16E LMU ADC Chan. FlexRay (#/ch.) ETH HSM CAN FD CAN FD DIS 2015 SAK-TC277TP-64F200S DB STANDARD PG-LFBGA C +125 C SAK-TC277TC-64F200S DB on request PG-LFBGA C +125 C SAK-TC277T-64F200S DB on request PG-LFBGA C +125 C SAK-TC275TP-64F200W DB STANDARD PG-LQFP C +125 C SAK-TC275TC-64F200W DB on request PG-LQFP C +125 C SAK-TC275T-64F200W DB on request PG-LQFP C +125 C SAL-TC277TP-64F200S DB on request PG-LFBGA C +150 C SAL-TC277T-64F200S DB on request PG-LFBGA C +150 C SAL-TC275TP-64F200W DB on request PG-LQFP C +150 C SAL-TC275T-64F200W DB on request PG-LQFP C +150 C SAL-TC270TP-64F200 DB on request Bare Die -40 C +170 C H H 4) H H 4) H H 4) H H 4) H H 4) H H 4) H H 4) H H 4) H H 4) H H 4) F71 H F71H 4) k / 2 Yes Yes Yes No k / 2 No Yes No No k / 2 Yes No Yes No k / 2 Yes Yes Yes No k / 2 No Yes No No k / 2 Yes No Yes No k / 2 Yes Yes Yes No k / 2 Yes No Yes No k / 2 Yes Yes Yes No k / 2 Yes No Yes No k / 2 Yes Yes Yes No 1) STANDARD = serial production planned. The address range starts at the lowest address defined in the User s Manual (See the Memory Maps chapter). 3) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual). 4) Featuring flash firmware (µcode) version 23H Addendum 6 v1.3,

7 4. Variants DC Step Derivative Production Status 1) Package Type Temp. Range Chip ID 4) Freq. (MHz) Flash (MB) EEPROM 3) Total SRAM Core 1&2 TC16P Core 0 TC16E LMU ADC Chan. FlexRay (#/ch.) ETH HSM CAN FD CAN FD DIS 2015 SAK-TC277TP-64F200N DC STANDARD PG-LFBGA C +125 C XXXX XXXXH k / 2 Yes Yes Yes Yes SAK-TC277TC-64F200S DC on request PG-LFBGA C +125 C XXXX XXXXH k / 2 No Yes No No SAK-TC277T-64F200S DC on request PG-LFBGA C +125 C XXXX XXXXH k / 2 Yes No Yes No SAK-TC275TP-64F200N DC STANDARD PG-LQFP C +125 C XXXX XXXXH k / 2 Yes Yes Yes Yes SAK-TC275TC-64F200W DC on request PG-LQFP C +125 C XXXX XXXXH k / 2 No Yes No No SAK-TC275T-64F200W DC on request PG-LQFP C +125 C XXXX XXXXH k / 2 Yes No Yes No SAL-TC277TP-64F200N DC on request PG-LFBGA C +150 C XXXX XXXXH k / 2 Yes Yes Yes Yes SAL-TC277T-64F200S DC on request PG-LFBGA C +150 C XXXX XXXXH k / 2 Yes No Yes No SAL-TC275TP-64F200N DC on request PG-LQFP C +150 C XXXX XXXXH k / 2 Yes Yes Yes Yes SAL-TC275T-64F200W DC on request PG-LQFP C +150 C XXXX XXXXH k / 2 Yes No Yes No SAL-TC270TP-64F200N DC on request Bare Die -40 C +170 C XXXX XXXXH k / 2 Yes Yes Yes Yes 1) STANDARD = serial production planned. The address range starts at the lowest address defined in the User s Manual (See Memory Maps chapter). 3) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual). 4) To be defined. Addendum 7 v1.3,

8 Memory Maps of Variants This section shows the influence of above feature variants on the memory map. DF_EEPROM Variants: Exemplary EEPROM size: 384 KB k 144 KB k AF H Logical Sector EEPROM0 EEPROM1 EEPROM2 Size Offset Address H H H AF H Logical Sector EEPROM0 EEPROM1 EEPROM2 Size Offset Address H H H EEPROM H AF H EEPROM47 05 E000 H AF H AF H Core1/2 Variants: 32 KB 24 KB H H CPU2. (32 KB) CPU2. (24 KB) H H H H H CPU1. (32 KB) CPU1. (24 KB) H H H Addendum 8 v1.3,

9 LMU Variants: 32 KB 0 KB H H LMURAM (32 KB) H H B H B H LMURAM (32 KB) B H B H ETH Variants: Yes No F001 D000 H F001 D000 H ETH Control Register (256 B) F001 D100 H F001 E000 H ETH () F H F H Addendum 9 v1.3,

10 HSM Variants: Yes No AF H AF H DF_HSM (DF1) (64 KB) AF H AF H F H F H HSM (12) F H F H FF H FF H DF_HSM (DF1) (64 KB) FF H FF H CAN FD Variants: No influence on Memory Map. CAN FD = No variants: all CAN register fields NCRx.FDEN have to be kept 0 B. Addendum 10 v1.3,

11 Revision History Major changes since the last revision Page or Reference V1.1 Description of change 5, 6 Chip IDs for CA & DC steps corrected Bugs in HSM (Y/N) and CAN FD (Y/N) corrected V1.2 Memory maps added CAN FD DIS2015 markings added µcode 23 H ChipIDs added V1.3 Memory maps corrections Addendum 11 v1.3,

12 Trademarks of Infineon Technologies AG AURIX, C166, CanPAK, CIPOS, CIPURSE, CoolGaN, CoolMOS, CoolSET, CoolSiC, CORECONTROL, CROSSAVE, DAVE, DI-POL, DrBLADE, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPACK, EconoPIM, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, ISOFACE, IsoPACK, i- Wafer, MIPAQ, ModSTACK, my-d, NovalithIC, OmniTune, OPTIGA, OptiMOS, ORIGA, POWERCODE, PRIMARION, PrimePACK, PrimeSTACK, PROFET, PRO-SIL, RASIC, REAL3, ReverSave, SatRIC, SIEGET, SIPMOS, SmartLEWIS, SOLID FLASH, SPOC, TEMPFET, thinq!, TRENCHSTOP, TriCore. Other Trademarks Advance Design System (ADS) of Agilent Technologies, AMBA, ARM, MULTI-ICE, KEIL, PRIMECELL, REALVIEW, THUMB, µvision of ARM Limited, UK. ANSI of American National Standards Institute. AUTOSAR of AUTOSAR development partnership. Bluetooth of Bluetooth SIG Inc. CATiq of DECT Forum. COLOSSUS, FirstGPS of Trimble Navigation Ltd. EMV of EMVCo, LLC (Visa Holdings Inc.). EPCOS of Epcos AG. FLEXGO of Microsoft Corporation. HYPERTERMINAL of Hilgraeve Incorporated. MCS of Intel Corp. IEC of Commission Electrotechnique Internationale. IrDA of Infrared Data Association Corporation. ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB of MathWorks, Inc. MAXIM of Maxim Integrated Products, Inc. MICROTEC, NUCLEUS of Mentor Graphics Corporation. MIPI of MIPI Alliance, Inc. MIPS of MIPS Technologies, Inc., USA. murata of MURATA MANUFACTURING CO., MICROWAVE OFFICE (MWO) of Applied Wave Research Inc., OmniVision of OmniVision Technologies, Inc. Openwave of Openwave Systems Inc. RED HAT of Red Hat, Inc. RFMD of RF Micro Devices, Inc. SIRIUS of Sirius Satellite Radio Inc. SOLARIS of Sun Microsystems, Inc. SPANSION of Spansion LLC Ltd. Symbian of Symbian Software Limited. TAIYO YUDEN of Taiyo Yuden Co. TEAKLITE of CEVA, Inc. TEKTRONIX of Tektronix Inc. TOKO of TOKO KABUSHIKI KAISHA TA. UNIX of X/Open Company Limited. VERILOG, PALLADIUM of Cadence Design Systems, Inc. VLYNQ of Texas Instruments Incorporated. VXWORKS, WIND RIVER of WIND RIVER SYSTEMS, INC. ZETEX of Diodes Zetex. Last Trademarks Update Edition Published by Infineon Technologies AG Munich, Germany 2015 Infineon Technologies AG. All Rights. Do you have a question about any aspect of this document? erratum@infineon.com Document reference ifxdsa0002 Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of noninfringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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