Power Management & Multimarket

Transcription

1 Hipac High performance passive and actives on chip BGF106C SIM Card Interface Filter and ESD Protection BGF106C Datasheet Rev. 3.1, Final Power Management & Multimarket

2 Revision History Rev. 3.0, Page or Item Subjects (major changes since previous revision) Rev. 3.1, Features updated Trademarks of Infineon Technologies AG AURIX, C166, CanPAK, CIPOS, CIPURSE, EconoPACK, CoolMOS, CoolSET, CORECONTROL, CROSSAVE, DAVE, DI-POL, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPIM, EconoPACK, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, I²RF, ISOFACE, IsoPACK, MIPAQ, ModSTACK, my-d, NovalithIC, OptiMOS, ORIGA, POWERCODE ; PRIMARION, PrimePACK, PrimeSTACK, PRO-SIL, PROFET, RASIC, ReverSave, SatRIC, SIEGET, SINDRION, SIPMOS, SmartLEWIS, SOLID FLASH, TEMPFET, thinq!, TRENCHSTOP, TriCore. Other Trademarks Advance Design System (ADS) of Agilent Technologies, AMBA, ARM, MULTI-ICE, KEIL, PRIMECELL, REALVIEW, THUMB, µvision of ARM Limited, UK. AUTOSAR is licensed by AUTOSAR development partnership. Bluetooth of Bluetooth SIG Inc. CAT-iq of DECT Forum. COLOSSUS, FirstGPS of Trimble Navigation Ltd. EMV of EMVCo, LLC (Visa Holdings Inc.). EPCOS of Epcos AG. FLEXGO of Microsoft Corporation. FlexRay is licensed by FlexRay Consortium. HYPERTERMINAL of Hilgraeve Incorporated. IEC of Commission Electrotechnique Internationale. IrDA of Infrared Data Association Corporation. ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB of MathWorks, Inc. MAXIM of Maxim Integrated Products, Inc. MICROTEC, NUCLEUS of Mentor Graphics Corporation. MIPI of MIPI Alliance, Inc. MIPS of MIPS Technologies, Inc., USA. murata of MURATA MANUFACTURING CO., MICROWAVE OFFICE (MWO) of Applied Wave Research Inc., OmniVision of OmniVision Technologies, Inc. Openwave Openwave Systems Inc. RED HAT Red Hat, Inc. RFMD RF Micro Devices, Inc. SIRIUS of Sirius Satellite Radio Inc. SOLARIS of Sun Microsystems, Inc. SPANSION of Spansion LLC Ltd. Symbian of Symbian Software Limited. TAIYO YUDEN of Taiyo Yuden Co. TEAKLITE of CEVA, Inc. TEKTRONIX of Tektronix Inc. TOKO of TOKO KABUSHIKI KAISHA TA. UNIX of X/Open Company Limited. VERILOG, PALLADIUM of Cadence Design Systems, Inc. VLYNQ of Texas Instruments Incorporated. VXWORKS, WIND RIVER of WIND RIVER SYSTEMS, INC. ZETEX of Diodes Zetex Limited. Last Trademarks Update Final Datasheet 2 Rev. 3.1,

3 SIM Card Interface Filter and ESD Protection 1 SIM Card Interface Filter and ESD Protection 1.1 Features ESD protection circuit and interface filter for SIM cards ESD protection according to IEC for ±15 kv contact discharge on external IOs Wafer level package with SnAgCu solder balls 400 μm solder ball pitch Pb-free (RoHS compliant) and halogen free package WLP-8-11-N-3D 1.2 Description BGF106C is an ESD protection circuit and filtering interface for SIM cards. All external IOs are protected against ESD pulses of ±15 kv contact discharge according to IEC The wafer level package is a green lead-free and halogen-free package with a size of only 1.2 mm x 1.2 mm and a total height of 0.6 mm Vcc C2 RST_int A3 R1, 100Ω A2 RST_ext CLK_int B3 R2, 47Ω B1 CLK_ext Data I/O_int C3 R3, 100Ω C1 Data I/O_ext GND, B2 BGF106_ schematic_app.vsd Figure 1-1 Schematic Diagram and Package Configuration Type Package Marking Chip BGF106C WLP C N0727 Final Datasheet 3 Rev. 3.1,

4 Characteristics 2 Characteristics Table 2-1 Maximum Ratings Parameter Symbol Values Unit Note / Min. Typ. Max. Test Condition Voltage at all pins to GND V P V Operating temperature range T OP Storage temperature range T STG C Summed up input power for all pins P in 60 mw T S <70 C Electrostatic discharge according to IEC Contact discharge at internal pins A3, B3, C3 to V ESD -2 2 kv any other pin Contact discharge at external pins A2, B1, C1, C2 to GND V ESD kv Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 2.1 Electrical Characteristics Table 2-2 Electrical Characteristics 1) Parameter Symbol Values Unit Note / Min. Typ. Max. Test Condition Resistors R 1, R 3 R 1, Ω Resistor R 2 R Ω Reverse current of ESD protection diodes I R 1) at T A =25 C na na V =3V V =5V Breakdown voltage of ESD diodes V (BR) V I (BR) =1mA Line capacitance C T pf V =0V Capacitance of all lines to GND Final Datasheet 4 Rev. 3.1,

5 Typical Characteristics 3 Typical Characteristics Typical Insertion Loss Line B3-B1 Line C3-C1 Line A3-A2 S21 [db] f [MHz] Figure 3-1 Insertion loss, Z S =Z L =50 Ω Typical Cross Talk 0-20 S21 [db] f [MHz] Figure 3-2 Cross talk, Z S =Z L =50 Ω (all unused input and output pins are terminated with 50 Ω) Final Datasheet 5 Rev. 3.1,

6 Package 4 Package Solder balls face down Solder balls face up Pin A1 Corner Index Area 2) 0.2 ±0.05 STANDOFF 3) SEATING PLANE C C 8x COPLANARITY ± C 2 x = 0.8 8x ø0.05 M 1.2 ±0.05 (0.2 ±0.05 ) (0.2 ±0.05) 2 x = 0.8 A B A3 B3 C3 A2 B2 C2 B1 C B ±0.04 1) (0.2 ±0.05 ) (0.2 ±0.05 ) 1.2 ±0.05 A 1) Dimension is measured at the maximum solder ball diameter, parallel to primary datum C 2) A1 corner identified by marking 3) Primary datum C and seating plane are defined by the domed crowns of the balls WLP-8-11-N-PO V01 Figure 4-1 WLP-8-11 Package outline (dimension in mm) WLP-8-11-N-FP V01 Figure 4-2 WLP-8-11 Footprint (dimension in mm) 4 ± ± ±0.1 Pin A1 Corner Index Area 1.33 ± WLP-8-11-N-TP V01 Figure 4-3 WLP-8-11 Packing (dimension in mm) Final Datasheet 6 Rev. 3.1,

7 Published by Infineon Technologies AG