Tutorial: PREESM - Dataflow Programming of Multicore DSPs
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1 Tutorial: PREESM - Dataflow Programming of Multicore DSPs Karol Desnos, Clément Guy, Maxime Pelcat EDERC 2014 Conference, Milan, September 11 th 1
2 PREESM Eclipse-based Tool Written in Java and Xtend Using Eclipse Modeling Framework, Eclipse Graphiti, Eclipse CDT Compatible and tested on Linux and Windows Release on sept
3 PREESM Started in 2007 In collaboration with Texas Instruments France 16 contributors Academic collaborations LAAS University of Maryland ENIS Abo Akademi 3
4 PREESM Workflow Preesm offers Editors Algorithm Architecture Scenario And can run a Workflow Transformations of models 4
5 PREESM Workflow 5
6 PREESM Workflow 6
7 PREESM Workflow 7
8 PREESM Workflow 8
9 PREESM Workflow 9
10 PREESM Workflow 10
11 PREESM Workflow 11
12 PREESM Workflow A workflow runs typically within a few tens of seconds Algorithm: typically actors Architecture: typically 1-20 cores 12
13 Examples for the tutorial Algorithms Sobel filter: edge detection Stereo matching: disparity map Architectures Intel i7 quad-core TI Shannon (C6678) 13
14 Rapid prototyping process Architecture modeling Algorithm modeling Scenario selection Workflow composition Workflow execution 14
15 Algorithm modeling PiSDF Parameterized Dynamism interfaced Hierarchy & Composition Synchronous Data-Flow Actors & Fifos 15
16 Algorithm examples Sobel filter Stereo matching Read Size 1 Size Size Size Size Filter Size Display 16
17 Arcitecture modeling S-LAM System-Level Architecture Model Processing elements Communication nodes 17
18 Architecture examples Intel i7 quad-core TI Shannon (C6678) core1 core5 core2 core3 core4 MSMC 16 GB/s DDR3 5.3 GB/s core6 core7 core8 18
19 Scenario selection Link between algorithm & architecture Execution times Execution constraints Simulation information Enables separation of concerns 19
20 Scenario example Sobel filter on Intel i7 quad-core Read cycles Size = core1 20
21 Workflow composition Rapid prototyping tasks Scheduling Code generation Memory optimization Vizualization tools 21
22 Workflow examples 2 workflows Scheduling Scheduling + code generation Algorithm Hierarchy flattening Single-rate transformation Mapping & scheduling Architecture 22
23 Let s complicate things Small application on CPU What about more realistic cases? Execution on DSP (C6678) Stereo matching algorithm 23
24 PREESM for the DSP Programmer Rapid prototyping for multicore DSPs High-level modeling of parallelism Automatic mapping Automatic scheduling Automatic code generation Advanced memory optimization Bridges to UML MARTE, SDF3 & Orcc 24
25 PREESM is constantly improving Research tool New models & features Regular enhancements Incoming features Parameter-dependent timings Distributed memory management Bridge to DIF from Univ. of Maryland GUI enhancements (workflow scripts) 25
26 Thank you for your attention Hierarchical Algorithm Model A B C D E Scenario Multi-core Heterogeneous Model Multi-Core Scheduling Deployment Simulation Static Code Generation o1 o2 A B C D E Program Program Program Program preesm.sourceforge.net/website/ 26
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