A Practical Introduction to Hardware/Software Codesign

Transcription

1 A Practical Introduction to Hardware/Software Codesign

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3 Patrick R. Schaumont A Practical Introduction to Hardware/Software Codesign 123

4 Dr. Patrick R. Schaumont Virginia Tech Bradley Dept. Electrical & Computer Engineering Whittemore Hall Blacksburg VA USA ISBN e-isbn DOI / Springer New York Dordrecht Heidelberg London Library of Congress Control Number: c Springer Science+Business Media, LLC 2010 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (

5 The most important day is today.

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7 Preface This is a practical book for computer engineers who want to understand or implement hardware/software systems. It focuses on problems that require one to combine hardware design with software design such problems can be solved with hardware/software codesign. When used properly, hardware/software codesign works better than hardware design or software design alone: it can improve the overall performance of digital systems, and it can shorten their design time. Hardware/software codesign can help a designer to make trade-offs between the flexibility and the performance of a digital system. To achieve this, a designer needs to combine two radically different ways of design: the sequential way of decomposition in time, using software, with the parallel way of decomposition in space, using hardware. Intended Audience This book assumes that you have a basic understanding of hardware that you are familiar with standard digital hardware components such as registers, logic gates, and components such as multiplexers and arithmetic operators. The book also assumes that you know how to write a program in C. These topics are usually covered in an introductory course on computer engineering or in a combination of courses on digital design and software engineering. The book is suited for advanced undergraduate students and beginning graduate students. I believe the book will also be useful for researchers from other (noncomputer engineering) fields, who have a need for hardware/software codesign. For example, I often work with cryptographers who have no formal training in hardware design but still want to obtain dedicated architectures for highly specialized algorithms. In my experience, it is very rewarding to explain codesign ideas to a cryptographer (or any other domain expert, for that matter). A key learning objective of the book is to provide a hands-on, practical introduction to design that combines sequential decomposition (software) and spatial decomposition (hardware). There is a surprisingly large mental gap between these two approaches to design. In fact, undergraduate courses tend to emphasize only one way of thinking at a time. Undergraduates will take a course on programming (for vii

8 viii Preface a stored-program computer) or a digital hardware design course. Considering how dramatic the changes to the computer architecture landscape have been in recent years (multicore, system-on-chip, ultra-low power computing,...), it s becoming essential to look beyond these boundaries. Organization The book puts equal emphasis on design methods and modeling (design languages). Design modeling helps a designer to think about a design problem and to capture a solution for the problem. Design methods are systematic transformations that convert design models into implementations. There are four parts in this book: Basic Concepts, the Design Space of Custom Architectures, Hardware/Software Interfaces, and Applications. Figure 1 illustrates how everything fits together. The first part of the book introduces modeling techniques concepts, required to understand how software can be converted into hardware and vice versa. The second part of the book describes the design space of custom architectures, starting at fully dedicated, high-performance Part I Basic Concepts Chapter 2 Dataflow Modeling and Implementation Chapter 1 The Nature of Hardware and Software Dataflow Models (HW / SW Model) Hardware Software Minimum Suggested Coverage 1 Chapter 3 Analysis of Control Flow and Data Flow Control / Data Flow Analysis 3 Part II The Design Space of Custom Architectures (from dedicated to flexible) Part III Hardware-Software Intefaces Part IV Applications Chapter 4 Finite State Machine with Datapath Chapter 5 Microprogrammed Architectures Chapter 6 General-purpose Embedded Cores Chapter 7 System-on-Chip Chapter 8 On-Chip Busses Chapter 9 Hardware-Software Interfaces Chapter 10 Control Shell Design Chapter 11 Trivium Crypto-Coprocessor Chapter 12 Cordic Crypto-Coprocessor Trivium CORDIC FSMD Microprogramming RISC Cores System-on-Chip HW HW CPU CPU Dedicated Flexible 8051 Microblaze ARM Mem-Mapped Port-Mapped ASIP Fig. 1 Outline of the book

9 Preface ix hardware implementations, and gradually evolving into flexible system-on-chip (SoC) architectures. The third part of the book goes into the details of hardware/ software interface design. The final part of the book shows two application case studies. Basic Concepts: The first chapter covers the fundamental properties of hardware and software and discusses the motivation for hardware/software codesign (Chap. 1). Chapter 2 describes Dataflow models, a modeling technique that can target hardware as well as software. Chapter 3 introduces control-flow and data-flow as the common underlying properties of hardware and software. By analyzing the control dependencies and the data dependencies of a C program, a designer obtains insight into possible hardware implementations of that C program. The Design Space of Custom Architectures: The second part is a tour along the vast design space of flexible, customized architectures. A review of four architectures shows how hardware gradually evolves into software. The Finite State Machine with Datapath (FSMD) of Chap. 4 is the starting point. FSMD models are the equivalent of hardware modeling at the register-transfer level (RTL). Chapter 5 introduces micro-programmed architectures. These are still very much like RTL machines, but they have a flexible controller, which allows them to be reprogrammed with software. Chapter 6 reviews general-purpose embedded RISC cores. These processors are the heart of typical contemporary hardware/software systems. Finally, Chap. 7 ties the general-purpose embedded core back to the FSMD in the context of a System-on-Chip architecture (SoC). The SoC sets the stage for the hardware/ software codesign problems that are addressed in the third part. Hardware/Software Interfaces: The third part describes the link between hardware and software in the SoC architecture, in three chapters. Chapter 8 discusses a typical on-chip bus structure and explains how it can efficiently move information between hardware and software. Chapter 9 presents three different locations in the SoC architecture where a designer could attach custom hardware. This includes the memory-mapped interface, the coprocessor interface, and the custom processor datapath. Finally, Chap. 10 shows how a designer can take an arbitrary hardware module and attach it to one of the three hardware/software interfaces described in Chap. 9. Applications: The final part gives two sample applications of hardware software codesign and shows how the different techniques and hardware software interfaces can be used in actual design. Chapter 11 presents a crypto-coprocessor, while Chap. 12 describes a CORDIC coprocessor, including a prototype and an FPGA board. There are several subjects which are not mentioned or discussed in the book. As an introductory discussion on a complex subject, I tried to find a balance between detail and complexity. For example, I did not include a discussion of advanced concepts in software concurrency, such as threads, and software architectures, such as operating systems and drivers. I also did not discuss software interrupts, or advanced system operation concepts such as Direct Memory Access.

10 x Preface I assume that the reader will go through all the chapters in sequence. The minimum suggested coverage which will still provide the reader an understandable introduction in hardware software codesign includes Chaps. 1, 3, 4, 6, 8, 9, and 11. Making it practical The book emphasizes ideas and design methods, in combination with hands-on, practical experiments. The book therefore discusses detailed examples throughout the chapters, and it includes an entire section (Applications) to discuss the overall design process. The hardware descriptions are made in GEZEL, an open-source cycle-accurate hardware modeling language. The GEZEL website, which distributes the tools, examples, and other documentation, is at There are several reasons why I choose not to use a mainstream HDL such as VHDL, Verilog, or SystemC. A first reason is reduced modeling overhead. Although models are crucial for embedded system construction, detailed modeling issues often distract the readers attention from the key issues. For example, modeling the clock signal in hardware requires a lot of additional effort, and it is not essential when doing single-clock synchronous design (which covers the majority of digital hardware design today). A second reason is that GEZEL comes with support for cosimulation built-in. GEZEL models can be cosimulated with different processor simulation models, including ARM, 8051, and others. GEZEL includes a library-block modeling mechanism that enables one to define new cosimulation interfaces with other simulation engines. A third reason is conciseness. This is a practical book with many design examples. Listings are unavoidable, but they need to be short. Of the 78 captioned listings in this book, 64 of them fit on a single page. Chapter 4 further illustrates the point of conciseness with a single design example in GEZEL, VHDL, Verilog, and SystemC side-by-side. A fourth reason is the path to implementation. GEZEL models can be translated (automatically) to VHDL. These models can be synthesized using standard HDL logic synthesis tools. I use the material in this book in a class on hardware/software codesign. The class hosts senior-level undergraduate students, as well as first-year graduate-level students. For the seniors, this class ties many different elements of computer engineering together: computer architectures, software engineering, hardware design, debugging, and testing. For the graduate students, it is a refresher and a starting point of their graduate researcher careers in computer engineering. In the class on codesign, the GEZEL experiments connect to an FPGA back-end and an FPGA prototyping kit. These experiments are implemented as homework.

11 Preface xi Modeling assignments in GEZEL alternate with integration assignments on FPGA. Through the use of the GEZEL backend support, students even avoid writing of VHDL code, but directly switch from cosimulation to FPGA implementation. At the end of the course, there is a contest. The students receive a reference implementation in C that runs on their FPGA prototyping kit. They need to accelerate this reference as much as possible using codesign techniques. Acknowledgments I would like to express my sincere thanks to the many people who have contributed to this effort. First and foremost, my family, who asked every other week, for two years, with the same enthusiasm, how far along I was. A baby could be delivered for less. Second, throughout my career I have met many outstanding engineers, and this book reflects these interactions. For example, Wei Qin developed the SimIT-ARM instruction-set simulator and helped with the integration of GEZEL and this simulator. Ingrid Verbauwhede has shaped many of the ideas and the design philosophies of this book. Frank Vahid is my example in educational writing excellence. Jan Madsen first introduced me to the idea that hardware/software codesign makes a lot of sense as an undergraduate computer engineering topic. And the list is far longer still. I hope you enjoy this topic and I truly wish this material helps you to go out and do some fantastic things in hardware/software codesign. I apologize for any mistakes left in the book and of course I appreciate your feedback. Blacksburg July 2010 Patrick Schaumont schaum@vt.edu

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13 Contents Part I Basic Concepts 1 The Nature of Hardware and Software Introducing Hardware/Software Codesign Hardware Software Hardware and Software Defining Hardware/Software Codesign The Quest for Energy Efficiency Relative Performance Energy Efficiency The Driving Factors in Hardware/Software Codesign The Hardware Software Codesign Space The Platform Design Space Application Mapping The Dualism of Hardware Design and Software Design More on Modeling Abstraction Levels Concurrency and Parallelism Summary Further Reading Problems Data Flow Modeling and Implementation The Need for Concurrent Models: An Example Tokens, Actors, and Queues Firing Rates, Firing Rules, and Schedules Synchronous Data Flow Graphs SDF Graphs are Determinate Analyzing Synchronous Data Flow Graphs Deriving Periodic Admissible Sequential Schedules Example: Euclid s Algorithm as an SDF Graph xiii

14 xiv Contents 2.3 Control Flow Modeling and the Limitations of Data Flow Models Emulating Control Flow with SDF Semantics Extending SDF Semantics Software Implementation of Data Flow Converting Queues and Actors into Software Sequential Targets with Dynamic Schedule Sequential Targets with Static Schedule Hardware Implementation of Data Flow Single-Rate SDF Graphs Pipelining Multirate Expansion Summary Further Reading Problems Analysis of Control Flow and Data Flow Data and Control Edges of a C Program Implementing Data and Control Edges Contruction of the Control Flow Graph Construction of the Data Flow Graph Application: Translating C to Hardware Designing the Datapath Designing the Controller Single-Assignment Programs Summary Further Reading Problems Part II The Design Space of Custom Architectures 4 Finite State Machine with Datapath Cycle-Based Bit-Parallel Hardware Wires and Registers Precision and Sign Hardware Mapping of Expressions Hardware Modules Finite State Machines Finite State Machines with Datapath Modeling An FSMD is Not Unique Implementation Simulation and RTL Synthesis of FSMD Simulation Code Generation and Synthesis Proper FSMD...117

15 Contents xv 4.7 Language Mapping for FSMD by Example GCD in GEZEL GCD in Verilog GCD in VHDL GCD in SystemC Summary Further Reading Problems Microprogrammed Architectures Limitations of Finite State Machines State Explosion Exception Handling Runtime Flexibility Microprogrammed Control Microinstruction Encoding Jump Field Command Field The Microprogrammed Datapath Datapath Architecture Writing Microprograms Implementing a Microprogrammed Machine Microinstruction Word Definition Microprogram Interpreters Microprogram Pipelining Microinstruction Register Datapath Condition-Code Register Pipelined Next-Address Logic Picoblaze: A Contemporary Microprogram Controller Summary Further Reading Problems General-Purpose Embedded Cores Processors The Toolchain of a Typical Microprocessor From C to Assembly Instructions Simulating a C Program Executing on a Microprocessor The RISC Pipeline Control Hazards Data Hazards Structural Hazards Program Organization Data Types Variables in the Memory Hierarchy...180

16 xvi Contents Function Calls Program Layout Analyzing the Quality of Compiled Code Analysis Based on Static Assembly Code Analysis Based on Execution of Object Code Summary Further Reading Problems SystemOn Chip The System-on-Chip Concept The Cast of Players SoC Interfaces for Custom Hardware Four Design Principles in SoC Architecture Heterogeneous and Distributed Data Processing Heterogeneous and Distributed Communications Heterogeneous and Distributed Storage Hierarchical Control Example: Portable Multimedia System SoC Modeling in GEZEL An SoC with a StrongARM Core Ping-Pong Buffer with an Summary Further Reading Problems Part III Hardware/Software Interfaces 8 On-Chip Busses Connecting Hardware and Software On-Chip Bus Systems Some Existing On-Chip Bus Systems Bus Elements Bus Signals Bus Timing Diagram Bus Transfers Simple Read and Write Transfers Transfer Sizing and Endianess Improved Bus Transfers Multimaster Bus Systems Bus Priority Bus Locking On-Chip Networks Summary Further Reading Problems...254

17 Contents xvii 9 Hardware/Software Interfaces The Hardware/Software Interface Synchronization Schemes Synchronization Concepts Semaphore One-Way and Two-Way Handshake Blocking and Nonblocking Data-Transfer Memory-Mapped Interfaces The Memory-Mapped Register Mailboxes First-In First-Out Queues Slave and Master Handshakes Shared Memory GEZEL Modeling of Memory-Mapped Interfaces Coprocessor Interfaces Tight and Loose Coupling The Fast Simplex Link The LEON-3 Floating Point Coprocessor Interface Custom-Instruction Interfaces ASIP Design Flow Example: Endianess Byte-Ordering Processor Finding Good ASIP Instructions Summary Further Reading Problems Coprocessor Control Shell Design The Coprocessor Control Shell Functions of the Coprocessor Control Shell Layout of the Coprocessor Control Shell Communication-Constrained vs. Computation-ConstrainedCoprocessors Data Design Flexible Addressing Mechanisms Multiplexing and Masking Control Design Hierarchical Control Control of Internal Pipelining Programmer s Model = Control Design + Data Design Address Map Instruction Set Example: AES Encryption Coprocessor Control Shell Operation Programmer s Model Software Driver Design...323

18 xviii Contents Control Shell Design System Performance Evaluation Summary Further Reading Problems Part IV Applications 11 Trivium Crypto-Coprocessor The Trivium Stream Cipher Algorithm Stream Ciphers Trivium Hardware Mapping of Trivium A Hardware Testbench for Trivium Trivium for 8-bit Platforms Overall Design of the 8051 Coprocessor Hardware Platform of the 8051 Coprocessor Software Driver for Trivium for 32-bit Platforms Hardware Platform Using Memory-mapped Interfaces Software Driver Using Memory-mapped Interfaces Hardware Platform Using a Custom-Instruction Interface Software Driver for a Custom-Instruction Interface Summary Further Reading Problems CORDIC Coprocessor The Coordinate Rotation Digital Computer Algorithm The Algorithm Reference Implementation in C A Hardware Coprocessor for CORDIC A CORDIC Kernel in Hardware A Control Shell for Fast-Simplex-Link Coprocessors An FPGA Prototype of the CORDIC Coprocessor Handling Large Amounts of Rotations Summary Further Reading Problems References Index...393