Qualification Report 64K RAM 2.1, 7% SHRINK CY7C161/A * CY7C162/A * CY7C164/A * CY7C166/A * CY7C185/A* CY7C187/A *

Transcription

1 Qualification Report November, 1994, QTP# 94012/94133 Version K RAM 2.1, 7% SHRINK MARKETING PART NUMBER Y7161/A * Y7162/A * Y7164/A * Y7166/A * Y7185/A* Y7187/A * DEVIE DESRIPTION 16K x 4 Static R/W RAM, Separate I/O 16K x 4 Static R/W RAM, Separate I/O 16K x 4 Static R/W RAM 16K x 4 Static R/W RAM, Output 8K x 8 Static R/W RAM 64K x 1 Static R/W RAM * A for Military products

2 PRODUT DESRIPTION (for qualification) Information provided in this document is intended for generic qualification and technically describes the ypress part supplied: Marketing Part #: Device Description: ypress Division: Y K SRAM ypress Semiconductor orporation Overall Die (or Mask) REV Level (pre-requisite for qualification): REV. J Die Size (stepping): 130 mils x 174 mils What ID markings on Die: 7185B ypress Qualification completion/marketing Availability Dates (urrent REV): 4/1994 Now TEHNOLOGY/FAB PROESS DESRIPTION - R21 Number of Metal Layers: 1 Metal omposition: 500A Ti, 1200A TiW, 8500A SiAl, 500A Ti Passivation Type and Materials: 4,000A 2%P LTO + 15,000 A Oxynitride Free Phosphorus contents in top glass layer(%): Die oating(s), if used: Polyimide Generic Process Technology/Design Rule (µ-drawn): MOS, Double Poly, Single Metal /0.8 µm Gate Oxide Material/Thickness (MOS): Name/Location of Die Fab (prime) Facility: Die Fab Line ID/Wafer Process ID: None SiO2 / 195 A ypress Semiconductor, Bloomington, MN ypress Semiconductor, Round Rock, TX Fab3 / R21 Fab2 / R21

3 PAGE 3 Package Outline, Type, or Name: PLASTI PAKAGE/ASSEMBLY DESRIPTION Die to Package edge clearance: 60 mils per side Mold ompound Name/Manufacturer: Lead Frame material: Lead Finish, composition: opper 28-pin, 300-mil Plastic DIP (7185) EME-6300H(R) Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 160 mils x 286 mils Die Attach Method: Epoxy Die Attach Material: Silver Epoxy Wire Bond Method: Thermocompression Wire Material/Size: Gold / 1.3 mil Name/Location of Assembly (prime) facility: Assembly Line ID and Process ID: BI-X/P2831GAGB INDNS-0/P283GAGW HERMETI PAKAGE/ASSEMBLY DESRIPTION Package Outline, Type, or Name: 28-pin, 300-mil erdip Die to Package edge clearance: 58 mils per side Mold ompound Name/Manufacturer: N/A Lead Frame material: Alloy 42 Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: None Die Attach Pad Dim: 170 mils x 330 mils Die Attach Method: Paste Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Assembly Line ID and Process ID: BI-X / D282

4 PAGE 4 OTHER INFORMATION For approval by similarity, identify other devices using the same basic die with bonding or metal mask options or test selections and explain: Y7161, Y7162, Y7164, Y7166, Y7187 If ypress is planning any changes in the near future, identify change (Qtr/Yr) in: Die Design Rev./Shrink: Fab/Assembly site change: Other Devices to be qualified in this technology: Other Packages to be qualified for this device: ESD Voltage Rating (per MIL STD-008, Method 3018): Flammability lassification (UL-94V): Die Process hange: ross Licensee/Licensor: 1/8 or None Alternate Fab/Assembly Locations: Assembly : SOJ, L Please attach the following Qualification / Reliability data for the die revision and Package type, for the fab and assembly sites identified above (mark [X] if included): 1 X HAST (5.5V, 130, 85%RH, 15psig) 7 X Operating Life at (temp): X Temperature ycles (-65 to 150 ) 8 Steady State Life (HTSSL, 5.75V, 150 ) 3 Temperature ycles (-40 to 165 ) 9 Temperature Humidity Bias (5.5V, 85, 85%RH) 4 Data Retention Bake, Plastic (165 ) 10 X Latchup Testing 5 Data Retention Bake, Hermetic (250 ) 11 X ESD Tests (MIL-STD 883, method 3015) 6 X Autoclave (PT, 121, 100%RH) 12 Other: urrent Density Input apacitance Read & Record Life Test Internal Water Vapor Aged Bond Strength

5 PAGE 5 Product Family: Mfg Division: PRODUT INFORMATION FOR QUALIFIATION BY SIMILARITY 64K SRAM Family ypress Semiconductor Supplier's Part Number Rated Speed (all pkgs) Pkg Size/ Type (all fabs) Die ID Die Size mil x mil (stepping) Design Rule (µ) Fabrication Process ID Line ID Passivation Type Mold ompound (all pkgs) Primary Assembly Line Location ESD Volt Rating Y7161 Y7161A -xxp -xxv -xxdmb -xxlmb 12ns to 35ns 28.3 PDIP 28L SOJ 28.3 DIP 28R L 7161B 130 x µ MOS, R21 3 LTO + Oxynitride HBM Y7162 Y7162A -xxp -xxv -xxdmb -xxlmb 12ns to 35ns 28.3 PDIP 28L SOJ 28.3 DIP 28R L 7162B 130 x µ MOS, R21 3 LTO + Oxynitride HBM Y7164 Y7164A -xxp -xxv -xxdmb -xxlmb 12ns to 35ns 22.3 PDIP 24L SOJ 22.3 DIP 22R L 7164B 130 x µ MOS, R21 3 LTO + Oxynitride HBM Y7166 Y7166A -xxp -xxv -xxdmb -xxlmb 12ns to 35ns 24.3 PDIP 24L SOJ 24.3 DIP 28R L 7166B 130 x µ MOS, R21 3 LTO + Oxynitride HBM NOTES: "xx" covers all rated speeds, in this case, 12ns, 15ns, 20ns, 25ns, 35ns

6 PAGE 6 Product Family: Mfg Division: PRODUT INFORMATION FOR QUALIFIATION BY SIMILARITY 64K SRAM Family ypress Semiconductor Supplier's Part Number Rated Speed (all pkgs) Pkg Size/ Type (all fabs) Die ID Die Size mil x mil (stepping) Design Rule (µ) Fabrication Process ID Line ID Passivation Type Mold ompound (all pkgs) Primary Assembly Line Location ESD Volt Rating Y7185 -xxp -xxv Y7185A -xxlmb -xxdmb 12ns to 35ns 28.3 PDIP 28L SOJ 28.3 DIP 28R L 7185B 130 x µ MOS, R21 3 LTO + Oxynitride HBM Y7187 -xxp -xxv Y7187A -xxlmb -xxdmb 12ns to 35ns 22.3 PDIP 24L SOJ 24.3 DIP 22R L 7187B 130 x µ MOS, R21 3 LTO + Oxynitride HBM NOTE: "xx" covers all rated speeds, in this case, 12 ns, 15ns, 20ns, 25ns, 35ns

7 PAGE 7 DEVIE RELIABILITY SUMMARY Marketing Part: Y7185 Wafer Fab: Fab 3 - Bloomington, MN Pkg Description: 28-pin, 300-mil PDIP 28-pin, 300-mil DIP Assembly: High Temperature Dynamic Operating Life (HTOL, 5.75V, 150 ) - Early Failure Rate Device Fab Lot # Assy Lot # 48 Hours umulative Y7185-P /520 0/7071 Y7185-P /520 Y7185-P /3281 (1EOS) Y7185-P /1848 Y7185-P /902 High Temperature Dynamic Operating Life (HTOL, 5.75V, 150 ) - Latent Failure Rate Device Fab Lot# Assy Lot # 80 Hours 500 Hours 1 umulative Y7185-P /120 0/510 Y7185-P /194 0/194 Y7185-D /196 0/196 High Temperature Dynamic Operating Life, Family data 2 (HTOL, 5.75V, 150 ) - Latent Failure Rate Device Fab Lot# Assy Lot # 168 Hours 500 Hours 1000 Hours umulative Y7199-P /122 0/122 0/122 0/392 Y7199-P /270 (80 Hrs) 0/270 High Temperature Dynamic Operating Life (HTOL, 5.75V, 150 ) - GROUP Device Fab Lot# Assy Lot # 184 Hours umulative Y7185-DMB /80 0/80 1 ypress previous qualification # K SRAM, R21 Technology, Reliability Monitor #M34004 and #M33016.

8 PAGE 8 DEVIE RELIABILITY SUMMARY Marketing Part: Y7185 Wafer Fab: Fab 3 - Bloomington, MN Pkg Description: 28-pin, 300-mil PDIP 28-pin, 300-mil DIP Assembly: High Accelerated Saturation Test (HAST, 5.5V, 140, 85%RH) Precondition 40 Temperature ycles ondition (-65 to 150 ) Device Fab Lot# Assy Lot # 128 Hours umulative Y7185-P /45 0/90 Y7185-P /45 Temperature ycle (ondition, -65 to 150 ) Device Fab Lot# Assy Lot # 300 ycles 1000 ycles umulative Y7185-P /45 0/45 0/90 Y7185-P /45 0/45 Temperature ycle Family data 3 (JEDE22, ondition B -40 to 125 ) Precondition 48 hours Pressure ooker Test (PT, No bias, 121, 100%RH, 15psig) Device Fab Lot# Assy Lot # 500 ycles 1000 ycles umulative Y7199-V /4/6 0/81 0/81 0/81 Temperature ycle Family data 4 (ondition -65 to 150 ) Precondition 48 hours Pressure ooker Test (PT, No bias, 121, 100%RH, 15psig) Device Fab Lot# Assy Lot # 300 ycles umulative Y7199-V /54 0/99 Y7199-V / K SRAM, R21 Technology, Reliability Monitor M K SRAM, R21 Technology, Qualification #93372

9 PAGE 9 DEVIE RELIABILITY SUMMARY Marketing Part: Y7185 Wafer Fab: Fab 3 - Bloomington, MN Pkg Description: 28-pin, 300-mil PDIP 28-pin, 300-mil DIP Assembly: Autoclave (PT, No bias, 121, 100%RH, 15psig) Precondition 40 Temperature ycles onditon (-65 to 150 ) Device Fab Lot# Assy Lot # 168 Hours umulative Y7185-P /45 0/90 Y7185-P /45

10 PAGE 10 Device Reliability Summary 64K SRAM, R21 7% SHRINK Y7161/162/164/166/185/186/187 Electrostatic Discharge Human Body Model ircuit per Mil Std 883, Method 3015 >+4,000V Unit 1 >-4,000V >+4,000V Unit 2 >-4,000V >+4,000V Unit 3 >-4,000V (Highest passing voltage, +10% Guard-banded) Latchup Testing to ypress Internal Latch-up Procedure 3 Tests: (2 lots) 0/10 urrent Injection = 200mA Trigger Hot Socket = V 0-8V Temp = 125

11 PAGE 11 PREVIOUS QUALIFIATION Device ID: Y7185 Prod. Family: 64K SRAM, 256K "chop" Mask ID: 718xB, 716xB Status: Production Results: Passed omplete Date: 1992 (Fab 3) Process ID: R21 Process Technology: MOS Process Loc: Bloomington, MN (Fab 3) Package: Plastic DIP, erdip Mold ompound: (Plastic only) Lead Frame: opper (Plastic) Alloy 42 (eramic) Die Attach Mat: Silver Epoxy (Plastic) Silver Glass (eramic) Package Loc: ypress, A BI, Thailand Test Loc: ypress, A BI, Thailand ypress Test No. Stress/Test Reference Method Actual onditions Status * Qualification Data Reference Test Result Temp/Bias Hrs/yc SS/Fail Pass Fail 22A HTOL - EFR /5.75V 48 Hrs 2030/ X 22 HTOL - LFR /5.75V 80 Hrs 500 Hrs 390/0 390/ X X 37 HTSSL - Static Life /6.5V 80 Hrs 168 Hrs 160/0 160/ X X Temp/Humidity Bias 85-85%RH 23 HAST %RH 100 Hrs 49/ X 24 Steam Test/Autoclave/PT %RH 168 Hrs 50/ X 12 Temperature ycle JEDE 22, ond. B -40 to ys 1000 ys 50/0 50/ X X 13 Temperature ycle 1010, ond. -65 to ys 1000 ys 50/0 50/ X 34 Accelerated Soft Error Rate System Soft Error Rate 20 Mechanical Sequence 26 X-Ray 6 ESD-HBM orner Pins Internal Pins X 6 ESD-DM orner Pins Internal Pins 33 Latch-up X 50 Flammability & Oxygen Index 14 Moisture Resistance 9 Internal Water Vapor 2 Solvent Resistance 4 Internal Visual 1 Physical Dimensions 3 Solderability 7 Lead Integrity 5 Bond Strength 5 2 failure due to contact spiking.

12 PAGE Die Shear Strength 11 Lid Torque