FTF-ENT-F0585. August 2011

Transcription

1 FTF-ENT-F0585 August 2011 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

2 FSL Software and Enablement Strategy Multicore Software Development Kit (SDK) QorIQ Virtualization Strategy and Roadmap Linux & USDPAA- Linux User Space DPAA NetComm Software Technology Enablement and Ecosystem Partnership Strategy Q&A Freescale on Kaixin Tag yourself in photos and upload your own! Weibo? Please use hashtag #FTF2011# 2 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

3 Invest Development Tools Partner Invest in Optimized Platforms Silicon optimized Software IP across all of our hardware devices and platforms Multicore, DSP, Accelerators, Heterogeneous Devices Stand alone base tools and run-time Technologies Built around standard platforms Available throughout the ecosystem Applications Stacks APIs/Libraries Partner for Vertical Solutions Complete solutions in select application spaces VortiQa software OSs Schedulers Drivers/BSPs/HAL Silicon Leverage Partners (MG, ENEA, GHS, WR, TATA, Aricent, CCPU, others) 3 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

4 Advanced SW Development Tools Full Application Visibility/Control CodeWarrior Si Optimized SW components Scalable Robust SW Architectures Compiler Friendly Cores Advanced Debug IP Applications Comm Stacks and APIs Run Time, Schedulers, Virtualization Optimized Software Drivers/BSPs/HAL Cores Accelerators Peripherals App Profile Comm Events Run Time Events Instrumentation IP Events, Trace 4 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

5 1. WRS support for VxWorks FSL has long term partnership support with WRS 2. Internal Linux development FSL works strategically with customers on Linux technology development and roadmaps 3. Use FSL strategic partner Mentor Graphics FSL works in partnership with Mentor Graphics to provide full Linux based solutions 5 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

6 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

7 Linux User Space PME Tools pthreads DPAA Tools stats/state access Std commands/libs perfmon control debug support USDPAA Applications IPFwd/IPSEC Focused Performance Examples PME Crypto USDPAA Mem Mgt SEC Driver Initialization BM Driver PME Driver Statistics FM Enhanced CfgDriver FM Basic Cfg Driver QM Driver Linux Kernel BM Driver DPAA Ethernet Driver SEC Driver System Configuration and Control perfmon PME Driver QM Driver scheduler control RT-Patch Atomic Calls Timer hugetlbfs UIO Drivers for USDPAA KVM Legacy Drivers Hypervisor Virtual CPU Interrupt controller Error Mgmt Boot services IPI IOMMU Byte-channels Guest debugging Power Mgmt Partition Mgmt U-Boot GNU Tools Secure Boot MG System Builder 7 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

8 QorIQ DPAA SDK Roadmap Legend Early access Early access (feature complete) A Above the line (POR) Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Jan A Below the line Release candidate (or beta) GA / FCS Mar-2011 Linux/uboot Platform and QorIQ SDK Virtualization BSP QorIQ DPAA SDK Beta 2.3 Linux / U-Boot Kernel rev Boot from espi Secure boot loader reference & code signing tool Networking performance improvements: 680 Kpps Hardware checksum FMAN offline parsing ports Drivers: SATA (P5020/P3041) Prelim 64-bit kernel and drivers LWE / User space User space DPAA alpha Topaz Warm reboot QorIQ DPAA SDK 1.0 System Builder migration Linux / U-Boot Kernel rev Quad-ranked DIMM U-Boot open source commit Boot from SDHC devices 64-bit user applications Hugetlbfs Drivers: Initial RAID (P5020) IEEE1588 LWE / User space User space DPAA (beta) KVM E500-mc porting (EAR Nov.) QorIQ DPAA SDK 1.1 (POI)* Linux Kernel rev: Deterministic low-latency (wireless infra.) Autonomous IPSec w/o frag/reassembly, policing Drivers: Initial RMAN (P5020/P3041) LWE / User space User space DPAA (GA) Topaz CPU hotplug KVM E500-mc kernel.org commitment QorIQ DPAA SDK 1.2 (PV) Linux / U-Boot e6500 compatibillity mode ramp (64 bit) Autonomous IPSec with frag/reassembly Drivers: DPAA open source commit (De)compression engine LWE / User space User space DPAA (EA) e6500-based devices Fragmentation /reassembly offload sample Topaz Interpartition communication KVM TLB optimizations, interrupt handling optimizations P4080DS, P4040DS P5020, P3041DS P1023RDB* 8 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. 8

9 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

10 Partitioning Virtualization Hardware consolidation Partitioned/dedicated resources, minimal sharing. Dedicated CPUs, I/O devices N virtual machines Resource sharing, oversubscription Virtual I/O Highly virtualized environment Live migration OS OS OS OS OS OS CPU CPU CPU CPU 10 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

11 Enterprise/Desktop (Intel x86 dominant) Enterprise Server/ Desktop Virtualization (VMWare, Xen, kvm, ) Netbook, MID Mobile (ARM dominant) Mobile Virtualization (VirtualLogix, Trango, OK-Labs, ) MILS separation Kernel (GHS, LynuxWorks, ) Mil/Aero Enea, WRS Embedded 11 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

12 Consolidation == cost / power savings Flexibility OS OS OS OS CPU CPU Improved resource utilization 12 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

13 Partition system into functional domains (e.g. control plane, data plane) Preserve investment in legacy software, running side-byside with Linux Isolate untrusted software/sandboxes High availability / active-standby In-service upgrade 13 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

14 Requires cooperation among partitions Security -- No enforced isolation, can t allow untrusted guest OSes Boot Sequence Who controls global hardware resources? Local access windows Interrupt controller Shared caches IOMMU Error management Scarce resources e.g. UART Debugging OS CPU OS CPU 14 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

15 Hypervisor: Layer of software more privileged than operating systems. Provides: Enforcement of system security, partition boundaries Global resource management (e.g. interrupt controller) Resource sharing and virtualization CPUs Other Services (e.g. debug) OS OS Hypervisor CPU CPU 15 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

16 PCIe PCIe srio srio SATA 2.0 Interlaken T4xxx IP Block Diagram Power Arch Power Arch Power Arch Power Arch Power Arch Power Arch Power Arch Power Arch Power e6500 e6500 e6500 e6500 e6500 Arch Power e6500 Arch Power e6500 Arch Power e6500 Arch Power e6500arch Power e6500arch Power e6500arch Power e6500arch e6500 e6500 e6500 e KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB D-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KB D-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KB D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache 256KB 256KB Banked Banked L2 L2 256KB Banked L2 256KB Banked L2 1MB Banked L2 eopenpic PreBoot Loader Security Monitor Internal BootROM Power Mgmt SD/MMC SPI 2x DUART 2x I2 C IFC 2 x USB2.0 Clocks/Reset GPIO CCSR SEC PME H/W Timers RAID DCE Data DeDup CoreNet Coherency Fabric PAMU PAMU PAMU PAMU QMan BMan RMan FMan Complex 40G 40G 10G 10G Parse, Classify, Distribute 10G 10G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G L3 Cache L3 Cache L3 Cache L3 Cache Peripheral Access Mgmt Unit 16 DMA 64b DDR-3/3L Memory Controller 64b DDR-3/3L Memory Controller 64b DDR-3/3L Memory Controller 64b DDR-3/3L Memory Controller DMA 2x 18-Lane SerDes (6GBaud and 11Gbaud) Real Time Debug Watchpoint Cross Trigger Perf Monitor CoreNet Trace Aurora e6500 Power Architecture with Altivec 16 x 64b e6500 cores Up to 2GHz 1MB L2 per core cluster L3 Cache (4MB total) Memory Controllers 4x DDR3/3L (1800 MHz) 64 bit data bus w/ecc High Speed Interconnect 4 PCIe Gen 2 Controllers 4 srio 2.0 Controllers 2x USB 2.0, 1x SATA 2.0 1x 40Gbps Interlaken LA-1 Frame Manager 16 x 10/100/1000/2500GE 4 x 10GE, 2 x 40GE SGMII, QSGMII, XAUI, XFI, KR Datapath Acceleration Parse/Class/Distribute/Policing QMan prioritization/egress shaping Buffer Management Reg-ex Pattern Matcher (PME) SSL and IPSec Encryption (SEC) Decompression/compression (DCE) Data deduplication (Data DeDup) TCP/IP offload, HW timers 40Gbps 64B 20Gbps IMIX 10Gbps IMIX 40Gbps 64B Power targets <50W thermal max at 1.8GHz <40W thermal max at 1.67GHz Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

17 PCIe PCIe srio srio SATA 2.0 Interlaken T4xxx Virtualization IP Block Diagram Power Arch Power Arch Power Arch Power Arch Power Arch Power Arch Power Arch Power Arch Power e6500 e6500 e6500 e6500 e6500 Arch Power e6500 Arch Power e6500 Arch Power e6500 Arch Power e6500arch Power e6500arch Power e6500arch Power e6500arch e6500 e6500 e6500 e KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB D-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KB D-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KBD-Cache 32 KBI-Cache 32 KB D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache 256KB 256KB Banked Banked L2 L2 256KB Banked L2 256KB Banked L2 1MB Banked L2 eopenpic PreBoot Loader Security Monitor Internal BootROM Power Mgmt SD/MMC SPI 2x DUART 2x I2 C IFC 2 x USB2.0 Clocks/Reset GPIO CCSR SEC PME H/W Timers RAID DCE Data DeDup CoreNet Coherency Fabric PAMU PAMU PAMU PAMU QMan BMan RMan FMan Complex 40G 40G 10G 10G Parse, Classify, Distribute 10G 10G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G 1G L3 Cache L3 Cache L3 Cache L3 Cache Peripheral Access Mgmt Unit 17 DMA 64b DDR-3/3L Memory Controller 64b DDR-3/3L Memory Controller 64b DDR-3/3L Memory Controller 64b DDR-3/3L Memory Controller DMA 2x 18-Lane SerDes (6GBaud and 11Gbaud) Real Time Debug Watchpoint Cross Trigger Perf Monitor CoreNet Trace Aurora e6500 Power Architecture with Altivec 16 x 64b e6500 cores Up to 2GHz 1MB L2 per core cluster L3 Cache (4MB total) Memory Controllers 4x DDR3/3L (1800 MHz) 64 bit data bus w/ecc High Speed Interconnect 4 PCIe Gen 2 Controllers 4 srio 2.0 Controllers 2x USB 2.0, 1x SATA 2.0 1x 40Gbps Interlaken LA-1 Frame Manager 16 x 10/100/1000/2500GE 4 x 10GE, 2 x 40GE SGMII, QSGMII, XAUI, XFI, KR Datapath Acceleration Parse/Class/Distribute/Policing QMan prioritization/egress shaping Buffer Management Reg-ex Pattern Matcher (PME) SSL and IPSec Encryption (SEC) Decompression/compression (DCE) Data deduplication (Data DeDup) TCP/IP offload, HW timers 40Gbps 64B 20Gbps IMIX 10Gbps IMIX 40Gbps 64B Power targets <50W thermal max at 1.8GHz <40W thermal max at 1.67GHz Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

18 CPU feature (Power ISA) e500v2 e500mc e5500 e6500 Category: Base X X X Category: Embedded X X X Category: Alternate Time Base X X X Embedded.Performance Monitor X X X Memory Coherence X X X Embedded.Little-Endian X X X Embedded.Cache Locking X X X Signal Processing Engine (SPE), Embedded Float X Floating Point and Floating Point.Record X X Embedded.Enhanced Debug X X 64-bit X 18 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

19 CPU feature (Power ISA) e500v2 e500mc e5500 e6500 Embedded.External PID X X Embedded.Hypervisor X X Embedded.Processor Control X X External Proxy X X Virtualization Extensions Wait X X Decorated Storage X X Store Conditional Page Mobility X X Embedded.Hypervisor.LRAT Embedded.Page Table Embedded.Multi-Threading Embedded.Multi-Threading.Thread Management X X X X Virtualization Extensions 19 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

20 Key hardware resources are accessible by hypervisor privileged state only: MMU Timers Cache control Debug resources Interrupt Configuration User MSR[PR=1][GS=0] Kernel/Supervisor MSR[PR=0][GS=0] No Hypervisor partition App App OS CPU Memory User MSR[PR=1][GS=1] Kernel/Supervisor MSR[PR=0][GS=1] Hypervisor MSR[PR=0][GS=0] With Hypervisor partition App App OS Hypervisor CPU Memory I/O I/O 20 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

21 mc Guest / Hypervisor Logical Partition U/S level, PID, AS/DS e500v2 model GS LPID Other states 32-bit Effective Address (EA) Virtualization extensions also add an expanded address space with an LPID (logical partition ID). Allows the hypervisor to more easily separate the address space of virtual machines. Virtual Address MMU / TLBs 36-bit Real Address 21 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

22 PAMU enforces I/O-tomemory accesses Linux RTOS A key compone nt in a securely partition ed system Access OK CPU I/O Memory PAMU CPU I/O Access Denied CPU CPU Memory I/O 22 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

23 Standards KVM Topaz 3 rd Party ISVs 23 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

24 power.org epapr 1.0 complete in 8/2008 Resource discovery (device tree) Multi-CPU boot 1.1, including virtualization extensions targeted for Q Guest OS Guest OS hypervisor Guest OS power.org Embedded Virtualization Committee ( ) Virtual CPU standard the behavior of instructions and registers in a virtual machine Paravirtualization & standard hcalls standard interfaces hardware New virtualization extensions in epapr 1.1, which should be out by this summer 24 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

25 An embedded hypervisor designed for Power architecture from the ground up Requires CPU with Power ISA 2.06 virtualization extensions Partitioning focus-- secure partitioning of the hardware resources of an SOC and board No scheduler Hypervisor is minimally intrusive A moderate set of services interrupt controller, inter-partition interrupts, bytechannels, power management, active/standby/failover, error management Targets: e500mc BSD License 25 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

26 Debug of guest operating systems is supported using hypervisor-resident debug agents Transport over multiplexed serial interface CodeWarrior and GDB supported Plug-in architecture for creating stubs Host GDB GDB Hypervisor System Hardware MUX UART partition partition OS OS stub stub stub CPU CPU CPU Memory Memory Memory MUX server GDB remote serial protocol 26 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

27 Linux kernel with KVM module + Qemu is the hypervisor X86 origins Allows fully virtualized platforms can run many more virtual machines than physical resources available Strong open source community Targets: e500v2, e500mc Partitioning features being added by Freescale Partition 1 App Qemu OS kvm Partition 2 App Qemu App App OS Linux Kernel KVM is an open source originated from the x86 server world. The Linux kernel effectively becomes the hypervisor with the KVM kernel module. Big strength of KVM is the large open source community-- we can leverage a significant amount of effort that has gone into this technology. Our intent is to push KVM technology in a direction that makes is useful for embedded systems--- running OSes besides Linux, allowing partitioning of SoC hardware resources. 27 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

28 Qemu provides Virtual machine setup Initialization Memory allocation Virtual I/O services Debug stub KVM provides Virtual CPU services API used by Qemu (see Documentation/kvm/api.txt) Kernel schedules VMs Basic split of responsibilities between Qemu and KVM KVM is a kernel driver and the user space Qemu application interfaces to KVM through an API. Qemu handles initialization. KVM handles runtime CPU events and Qemu handles runtime I/O events. Standard kernel scheduler is used and provides all the standard Linux scheduling services to virtual machines under KVM. 28 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

29 Qemu App App User mode MSR[PR]=1 VM init, boot debug KVM Virtual I/O OS On the e500v2 must run OSes in user mode which causes some performance impact that had to be solved. Kernel mode MSR[PR]=0 Virtual CPU Linux Kernel 29 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

30 Shows how the major components are separated by hardware privilege levels-- host kernel, qemu/host-applications, guest kernel, guest applications. 30 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

31 Two general approaches to I/O Virtual I/O devices Software emulation of real hardware device-- register-level emulation Virtio Direct assigned I/O devices Virtual I/O is how you allow multiple domains/guest/virtual-machine share a hardware I/O devices. Advantage of emulation of real hardware device is that guest drivers do not have to change. The virtual machine makes it look identical to the real hardware that is being emulated. Disadvantage is slow performance. Virtio is a technology in Linux and Qemu that allows sharing of network, block (e.g. disk), and console devices-- designed for virtualization and has improved performance. Direct assigned I/O devices is something new that Freescale has developed due to the needs of embedded systems allows a guest OS private ownership of devices and direct access to device registers. 31 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

32 Guest has front-end driver that communicates with back-end driver which interfaces to physical I/O device Qemu (vmm) Back-end driver Linux (guest) Front-end driver Host Linux Kernel kvm eth Hardware 32 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

33 Guest is assigned I/O device and it become a private, non-shared resource of the partition Standard approach in Topaz New direct-map support in KVM PAMU is needed to enforce partition boundaries and do guest physical to true physical address translation Qemu (vmm) Host Linux Kernel Hardware Linux (guest) iommu kvm 33 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

34 Partition is defined in a device tree memory, virtual I/O devices, direct assigned I/O devices Direct map Feature created by Freescale to directly assign memory Host kernel only knows about subset of physical memory When Qemu starts a virtual machine it is passed a device tree that describes the real and virtual resources belonging to the VM. A key new feature we ve added to KVM/Qemu is the ability to directly map memory and I/O devices to virtual machines 34 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

35 Direct mapped SoC devices use similar approach to existing PCI-E endpoint assignment in x86 KVM Host kernel takes all interrupts which must be forwarded to the guest KVM registers ISR for direct mapped interrupt sources MPIC emulation is in the kernel VM init, boot debug Linux Kernel (host kernel) Qemu Virtual I/O KVM Virtual CPU App Direct map ISR OS App (guest kernel) In Kernel MPIC 35 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

36 Asynchronous exceptions Privileged instructions Privileged SPRs Hcalls Scheduling/Context switches Virtual I/O Direct I/O (direct-map) Sources of overhead - CPU Sources of overhead I/O TLB misses, decrementer interrupts, external interrupts tlbwe,tlbilx,tlbsx,tlbre,msgsnd DEC, TCR, IVORx emulated registers, interrupts Interrupt latency, (no overhead for register access) Key: overhead is workload dependent 36 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

37 Overview Freescale Book E CPUs have 2 hardware TLBs TLB1 allows variable sized pages with locking TLB0 has 4KB pages, is set associative, and entries are typically recycled Guest TLB operations (e.g. write, invalidate) must be validated by the hypervisor. The pressure (or lack of) on TLB0 will be a significant factor in overall hypervisor overhead. Every TLB miss implies the need to write a new TLB entry (which must be validated) Processor Roadmap: logical to real address translation (LRAT) in CPU expected to eliminate hypervisor overhead in TLB managment 37 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

38 LRAT is defined in Power ISA On a TLB write, a hardware table translates the guest physical address to true physical. tlbwe does not trap to HV. If the guest physical address misses in the LRAT the hypervisor services and decides whether mapping is allowed. Only valid mappings are placed in the LRAT. These are typically large mappings so the vast majority of TLB writes can complete without a trap. An LRAT should solve the overhead associated with TLB misses to TLB0 With LRAT a new hardware lookup table handles guest physical address translation instead of it being done in software by the hypervisor 38 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

39 Qemu provides a gdb stub that can be used to debug guests gdb VM init, boot debug stub Qemu Virtual I/O App OS App KVM Linux Kernel Virtual CPU 39 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

40 Virtual CPU provides standard e500 debug resources, enabling guest resident debug stubs VM init, boot Qemu Virtual I/O App OS App debug stub KVM is in linux kernel so same tools you utilize for kernel debug can be utilized Guest debug can be done via GDB and hooks in Qemu gdb Linux Kernel KVM Virtual CPU 40 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

41 e500v2 Proof of concept completed in 12/2010 basic CPU features direct map of memory and I/O devices paravirtualization performance improvements e500mc Port in progress Currently booting Linux Beta version will be in DPAA SDK 1.0 release (5/2011) 41 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

42 e500v2 Proof of concept completed in 12/2010 basic CPU features direct map of memory and I/O devices paravirtualization performance improvements e500mc Port in progress Currently booting Linux Alpha version will be in DPAA SDK 1.0 release (5/2011) proof-of-concept DPAA SDK 1.0 SDK 1.1 DPAA SDK Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

43 Virtual CPU feature KVM e500v2 KVM e500mc E5500 Category: Base Category: Embedded Category: Alternate Time Base Embedded Floating Point Classic Floating Point Embedded.External PID External Proxy [1] 1.0 Wait Watchdog VCPU paravirt extensions (CONFIG_KVM_GUEST ) - CPU Debug Facilities (debug registers, interrupt) Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

44 Virtual CPU feature KVM e500v2 KVM e500mc E5500 Embedded.Performance Monitor Embedded.Hypervisor - - Embedded.Processor Control Guest Cache Locking Fixed interval timer Memory Coherence Required Decorated Storage Embedded.Little-Endian bit MMU Performance On going On going 44 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

45 Virtual Machine feature KVM e500v2 KVM e500mc E5500 Direct map of memory Direct map of I/O devices PAMU Direct map of Portals Virtio net Virtio block Virtio console Virtio security Vhost net GDB stub USB Passthrough Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

46 Virtual Machine feature KVM e500v2 KVM e500mc E5500 epapr 1.1 Compliance Hugetlbfs dynamic use of large pages SMP multiple CPUs in guest PCI-E Endpoint partitioning Power management TBD TBD Error Management TBD TBD Failover TBD TBD Direct interrupt delivery to guests TBD TBD Virtual machine management (libvirt) TBD TBD 46 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

47 Guest OS Guest OS Linux / KVM Guest OS Guest OS Topaz hardware hardware 47 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

48 Feature Topaz KVM Type of hypervisor Type 1 Type 2 OS modifications-- CPU no/minimal no/minimal OS modifications other services yes yes 3 Real time yes 1? 2 Resource discovery epapr epapr/pci Partition configuration static config tree Qemu/device tree Guest debugging HV or guest agent Qemu Static partitioning CPUs yes pin Physically contiguous memory partitioning yes yes Direct SOC device assignment yes yes Direct interrupts to guest OS yes no Shared memory yes yes 48 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

49 Feature Topaz KVM Scheduling multiple partitions on physical CPU no yes Dynamic partitioning no yes/qemu Live migration no yes High availability / Active-standby yes? Inter-partition doorbells yes no Virtual console/uart yes Qemu/virtio Virtual ethernet no Qemu/virtio Virtual block device no Qemu/virtio Virtual interrupt controller yes Qemu/virtio Virtual PCI (for virtual device discovery) no yes 49 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

50 What requirements with respect to physical partitioning of system? Direct/dedicated assignment of CPUs, memory, I/O devices How many virtual machines / partitions? Is number/configuration static? Dynamic? Virtual I/O requirements. Which devices? Performance? Dynamic resource management? Moving CPUs, devices? How many CPUs per virtual machine? SMP guests? Performance What are your critical measures of performance? Benchmarks Real time requirements? Interrupt latency. Determinism. Guest OS modifications what is acceptable? 50 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

51 Virtual machine management requirements? APIs? Interpartition communication Doorbell interrupts Shared memory MCAPI High availability requirements? Active/standby. power management sleep states (nap mode) frequency scaling 51 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

52 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

53 loop { get work via QMan dequeue; complete work and QMan enqueue as needed; } Assigning cores the role of running light-weight run-to-completion software within the context of a Linux multi-threaded user space process instead of in a separate partition as a hypervisor guest. Accept work and then complete it before accepting other work. Complete often involves doing a QMan enqueue to Send frame via FMan Send work to SEC or PME Other Run-to-completion is a scheduling statement QMan dequeues can poll do not need to be interrupt driven 53 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

54 USDPAA is a change in deployment context for data plane run-tocompletion software. USDPAA = LWE in Linux user space. LWE deployed in a partition in the Freescale Hypervisor USDPAA deployed in a Linux user space process Linux User Space LWE Linux Kernel Freescale Embedded Hypervisor Linux User Space USDPAA Linux Kernel Benefits: Richer, more flexible environment use Linux standard services rather than inventing new ones (C++, 36-bit, 8 th core, debug, etc). More standard Linux is ubiquitous and supported from multiple sources. Provides high-performance run-to-completion but other use-cases also a use case super-set. 54 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

55 DPAA: Data Path Acceleration Architecture Collection of cores, HW accelerators and bridges, tied together by HW Buffer and Queue Managers. Power Architecture Cores Rapid I/O Messaging and more Ethernet RMan Rapid I/O Manager FMan Frame Manager QMan Queue Manager BMan Buffer Manager SEC Security Engine PME Pattern Match Engine 55 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

56 SW Portal: memory mapped hardware element that provides QMan and Bman access to software running on Power cores. Portal is a ring-like structure, but more sophisticated. SW maps portals as cached for important operations. Power Architecture Core enqueue, dequeue, and more QMan SW Portal BMan SW Portal acquire, release, and more QMan Queue Manager BMan Buffer Manager 56 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

57 Portals mapped directly into application s virtual address space. Linux User Space Application No system call or kernel context switch to access a portal. QMan and BMap Access API Library enqueue, dequeue, and more QMan SW Portal QMan Queue Manager BMan SW Portal BMan Buffer Manager acquire, release, and more 57 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

58 Some portals can be allocated to the Linux kernel. Others are free to be dedicated to an USDPAA thread (that is in turn affine to a core). Kernel Drivers Portals allocated to the kernel are accessed via inkernel drivers. These provide enqueue/dequeue and other services to a next layer of kernel drivers such as standard ethernet drivers that use QMan to exchange frames with FMan. One portal multiplexes several kernel drivers. user USDPAA Thread Affine to Core USDPAA threads directly map and access the portal that is dedicated to them. map User Space Thread High API QMan Driver map PME Driver SEC Driver User Space Driver Ethernet Driver kernel High API QMan Driver portal Contiguous Space for Buffer Pools Portal Driver portal QMan shown. BMan similar. 58 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

59 Other Other Processes Processes USDPAA Application Can Use 1 to 8 Cores (P4080) Each thread has a dedicated portal and is affine to a core, 1 thread per core USDPAA Application in User Space Process thread thread thread thread thread thread thread thread QPortal QPortal QPortal QPortal QPortal QPortal QPortal QPortal BPortal BPortal BPortal BPortal BPortal BPortal BPortal BPortal C0 C1 C2 C3 C4 C5 C6 C7 isolated cores Net Stack kernel BMan / QMan Eth Driver Other Driver BQMan Drivers QPortal FMan Ethernet Ports 7 cores are isolated but 1 can run an USDPAA thread as well as other processes. BPortal Core 0 has portal for kernel use and standard Linux networking 59 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

60 QMan user space (and kernel) portal drivers. BMan user space (and kernel) portal drivers BMan and QMan overall configuration drivers (kernel) DMA-able memory allocator for user space SEC Descriptor Constructor Library SEC overall configuration (kernel) PME configuration FMan configuration 60 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

61 USDPAA deployed within single SMP Linux instance Threading via pthreads Threads that access portals must be core-affine Threads may be scheduler-isolated, but need not be Buffers must be in DMA-able memory. Standard Linux system calls are available Standard tools, like debuggers may be used. Portals must be dedicated to the kernel or to user space threads. 61 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

62 * * * 1 Work (like packet) is enqueued into QMan by a worker (e.g. FMan) QMan scheduler acts as a HW work scheduler Different types of work are assigned to specific frame queues. Frame queues are placed into work queues for scheduling. QMan enforces atomicity (no locks) when needed Qman schedules the work to another worker (e.g. a core). Repeat (in possibly many steps) until processing is done. FMan SEC PME QMan Core Core Core polled access Core SW does: while (1) { type=dequeue_work(); do_work(type); if (needed) enqueue_work(); } If software is written such that any core can do any work, the result is a very flexible, scalable, and efficient system. 62 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

63 Polled run-to-completion works best with one thread per core. More than one thread per core suggesed interrupt-driven execution. Portal drivers support UIO interrupts Portals have file descriptors Application can call select, poll, epoll and sleep if there is nothing to deqeuue. Core SW does: while (1) { select(fd_set,.) type=dequeue_work(); do_work(type); if (needed) enqueue_work(); reenable_interrupts_via_uio. } Thread sleeps if nothing on portal. 63 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

64 USDPAA independent of Linux scheduler configuration. OK to use SCHED_FIFO, etc. USDPAA independent of items like PREEMPT_RT, use it or not. USDPAA Thread-Core Affinity is required, but exclusivity is not. More Exclusive LWE-like Use Case Continuum Less Exclusive pthreads-like Polling-based run-tocompletion, PREEMPT_RT matters more, trivial use of Linux scheduler, less than 1% overhead Interrupt-driven, PREEMPT_RT matters more, Linux scheduler used normally. 64 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

65 Areas of physically contiguous memory are available and can be mapped to a process address space. Simplifies conversion between effective and physical addresses. Buffer memory. General shared memory for many purposes. control, init, and other processes USDPAA app in user space 2 nd USDPAA app thread thread thread thread thread thread C0 C1 QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal C2 C3 C4 C5 C6 C7 Contiguous Space for Buffer Pools 65 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

66 SEC and PME have QMan interfaces. So USDPAA threads can interact with them via their portals. USDPAA app in user space thread thread thread thread QPortal QPortal QPortal QPortal BPortal BPortal BPortal BPortal C2 C3 C4 C5 BMan / QMan SEC PME 66 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

67 USDPAA threads (define as threads with portals) may be dynamically created and destroyed. USDPAA processes (define as processes with USDPAA thread) may be terminated and restarted. But, applications manage their own resources. Resources initialized must be quiesced and deinitialized Both on normal and abnormal termination. Rationale: It is not practical for kernel based software to track relationships between resourced that are shared between applications or applications and the kernel. It is not practical for kernel software to dictate policy in these cases. 67 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

68 M p p s Reflector performance with 64-byte packets G b p s Cores Cores PoC (Apr 2010) - Low bin RCW Ph. 0 - Low bin RCW Ph. 0 - High bin RCW PoC (Apr 2010) - Low bin RCW Ph. 0 - Low bin RCW Ph. 0 - High bin RCW 68 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

69 Linux in partition: control and initialization LWE on Hypervisor multi-image LWE app in partition (each core acts like a thread) LWE app in partition C0 C1 C2 C3 C4 C5 C6 C7 QPortal QPortal QPortal QPortal QPortal QPortal QPortal QPortal BPortal BPortal BPortal BPortal BPortal BPortal BPortal BPortal USDPAA Processes in one Linux Instance control and initialization processes USDPAA app in user space 2 nd USDPAA app thread thread thread thread thread thread C0 C1 QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal QPortal BPortal C2 C3 C4 C5 C6 C7 Portals dedicated to threads; threads affine to cores. 69 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

70 USDPAA roadmap A Above the line A Below the line Sep Oct Nov Dec Jan Feb Mar Apr May June Q3 Q4 Future USDPAA Linux Phase 0 (POR) USDPAA Proof of concept migrated to SDK 2.2 platform Core affinity Core isolation Static allocation of large contiguous blocks of memory Scale up to 8 cores <5% overhead Phase 1 (POR) USDPAA infrastructure Application restart support Support for poll() system calls (wait for I/O) UIO signaling for Qman/Bman interrupts Static initialization device tree initialization and configuration (as per Linux/LWE) Reference / Sample apps Packet reflection IP forwarding sample Simple crypto Hugetlbfs Support for limited range of page sizes Support for allocation of contiguous ranges Phase 2 USDPAA infrastructure Dynamically allocate contiguous blocks using DMA mem mgr (hugetlbfs) Initialization using fmc tool SEC descriptor user space library Access to linux system calls / services Reference / Sample apps LWE apps (parity) Order restoration QoS Congestion groups Policer / Shaping Beta in SDK Phase 3 USDPAA infrastructure Dynamically allocate contiguous blocks using hugetlbfs (all sizes) Placement of application text segment using hugetlbfs support in gcc tool chain Dynamic configuration and control APIs Reference / Sample apps Fragmentation/reassembly IPSec Hugetlbfs Support for arbitrary page sizes (limited only by H/W) Support for text placement Support for CPU sets GA in SDK 70 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. 70

71 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

72 Low level drivers BareBoard user environment: System integration code (device-manager, layouts, etc) XX layer (OS services) Use Cases General utilities (ITG, ITA, CLI, etc) Platform support: DS board support SoC drivers (mem-ctrl, intr-ctrl, core, etc) CommExpert - Configuration tool Supporting documentation Device Driver User Guide Device Driver Reference Manual Use Case Guide Porting Guide CommExpert User Guide 72 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

73 Complete set of API routines, supporting the majority of chip functionality Fully modular peripheral drivers OS agnostic Interrupt or polling modes for communication peripherals External memory management Multiple type memory management supporting user s memory partitioning Object Oriented design and coding in C Highly documented package 73 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

74 XX API STL, etc Use-Case / Application / FMC Driver s API OS / System LLD CORE API WRITE_UINT / GET_UINT API HW / FW 74 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

75 Initialization initialization of registers, internal memory, and data structures required by the hardware and software modules. Runtime data path Tx/Rx and related, time critical routines. Runtime Control other runtime routines such as on-the-fly adjustment of controllers and features. Exceptions errors and special events. 75 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

76 Each module provides a separate set of API routines for functional manipulation. Initialization requires a set of calls including Configuration routine(s) Initialization routine Enable routine Runtime, control and exception routines may be called at any time (after initialization), passing as first parameter the module descriptor. 76 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

77 Callback Routines Supplied by the application at initialization time as parameters for initialization routine Called by the driver when needed (For example f_exception is called upon the occasion of certain exceptions) 77 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

78 XX Routines Hooks to the RTOS Supplied by the OS and called directly by the drivers Examples of XX Routines: XX_Malloc, XX_EnableIntr, etc. 78 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

79 While driver s routines (API) are called passing a handle of the initialized object, application routines - callbacks are called passing the user context as initialized by the user at the initialization routine (h_app parameter) Application h_module =Module_Config(p_Param) (p_param contains h_app) Module_Routine(h_Module) XX_Routine() Driver System f_callback(h_app) 79 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

80 inc env hardware user util integrations P4080 cores E500 etc NetCommSw MemCtl DDR LBC PAR_IO DUART inc Port Peripherals FM MAC IntrCtl EPIC BM PCD HC inc QM Rtc DPAA MACSEC Bare_P4080_cw_build 80 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

81 API Objects Each object in the API is represented by a data structure which holds the members of the class The methods of a class are API routines which take as first argument the object s handle, i.e. a pointer to the object s data structure Initialization Routines The object configuration routine functions as a constructor It returns a handle to the newly created instantiation of the object. The init routine applies the configuration to the hardware. The object free routine functions as a destructor of the SW object, but also clears the HW initialization. 81 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

82 During initialization of each module that uses irqs, the application specifies its irq number. It is responsibility of the application above the driver to manage the number of the irqs in the system The driver registers to its irqs using the system supplied XX routines: XX_SetIntr / XX_FreeIntr XX_EnableIntr / XX_DisableIntr If application don t want the driver to register to interrupt, it should pass NO_IRQ as a parameter to the driver during initialization 82 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

83 The runtime API consists of 2 types of routines: Control API API for changing parameters on the fly, setting functional modes etc. Typically routines such as: t_error MODULE_SetXXX(t_Handle h_module, <type> <param>); t_error MODULE_GetXXX(t_Handle h_module, <type> *<param>); Runtime Data Datapath API, for transmission or reception of data 83 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

84 Enablement and Ecosystem Partnership Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobilegt, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, ColdFire+, CoreNet, Flexis, Kinetis, MXC, Platform in a Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

85 March 2010, Freescale announced industry-leading strategic alliances with key software ecosystem partners Partners are Enea, Green Hills Software and Mentor Graphics. Initial architectures targeted QorIQ, StarCore and PowerQUICC Ongoing relationship with long standing partners - WR Key Customer Benefits: Freescale device-specific optimizations in ecosystem software - Ex: P4080 Availability of optimized ecosystem software close to first silicon samples Coverage of new derivatives in each family Ex: QorIQ, PowerQUICC etc. 85 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

86 Objectives and Customer Benefits Faster availability of commercial Linux support for Freescale processors Seamless migration for customers moving from Roll-Your-Own-Linux (RYOL) to Commercial Linux from Mentor Highly integrated Linux solutions with specific optimizations for Freescale s device Execution Freescale will continue to develop and make available to customers and community the Linux kernel and basic packages Mentor add to the base from Freescale with their Commercial Linux Offerings Professional tools support (EDGE toolset) including leading debug technology Additional Hardening, Warranty, Indemnity, Liability, Support & Maintenance, Services Additional Customizations/Packages for specific vertical markets Mentor and Freescale partner to jointly develop Linux solutions LTIB based distribution phased-out in favor of System Builder OpenEmbedded Framework Alignment on Kernel, Tool chain and test infrastructure Mentor and Freescale partner to develop tooling solutions Leverage common Eclipse-based environments for CodeWarrior and EDGE Reuse USBTap and GigaTAP connections for high-performance run-control 86 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.

87 Beach Beach Mentor Technology Production Offering Mentor Commercial Product Technology Base Smooth Transition Common Evaluation Platform No Cost Linux Customer Platform Linux Technology Reference Board Freescale Mentor R&D Collaboration Evaluation/ Prototyping Production Development time 87 Package, Processor Expert, QorIQ Qonverge, Qorivva, QUICC Engine, SMAROS, TurboLink, VortiQa and Xtrinsic are trademarks of Freescale Semiconductor, Inc.