TUTORIAL 1. V1.1 Update on Sept 17, 2003 ECE 755. Part 1: Design Architect IC
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1 TUTORIAL 1 V1.1 Update on Sept 17, 2003 ECE 755 Part 1: Design Architect IC DA-IC provides a design environment comprising tools to create schematics, symbols and run simulations. The schematic editor in DA-IC is same as Design Architect with minor changes in the user interface. For those who are familiar with Design-Architect, this tutorial will be a simple walk through. Two types of simulators are associated with DA-IC. Quicksim, which is a functional simulator Eldo, which is a SPICE simulator This tutorial will take you through the various steps involved in the creation of a schematic. The steps are explained in context of a simple inverter and then later with two inverters cascaded to show hierarchy. The next part of the tutorial will deal with the Quicksim and Eldo simulators. 1) To invoke the DA-IC, type adk_daic at the prompt. Just da_ic would also work but adk_daic includes the adk libraries for standard cells. 2) To open a schematic sheet in DA-IC click on schematic in the session palette menu under "open". In the dialog box that appears enter the schematic name, $PROJ_PARTS_<username>/<schematic name>. $PROJ_PARTS_<username> points to ~/mgc directory. This will open an editor sheet. 3) In order to place transistor select library in the schematic edit palette menu. Click on pmos under "transistors" in the ic_library palette menu and place the p-fet on the sheet. Similarly select nmos for a n-fet. The schematic will now appear as in Figure 1.
2 Figure 1 4) Power and ground can be obtained by selecting VDD, GND respectively from ic_library palette menu under "general". 5) Connections can be given using wires by selecting wire from schematic_edit palette menu under Add". 6) Input and output ports can be obtained by selecting In and Out respectively from the ic_library under "general". The default name given to ports is NET. To change names, place the cursor (mouse arrow) on the name NET and press SHIFT+F7. A small window will open at the bottom of the screen where the name of the port can be changed. An alternative way is to select the port (place the cursor on it and press F1) and choose change values from the pop-up menu (right click). Enter the name in the new value text box. 7) The final schematic will look as in Figure 2.
3 Figure 2 8) Before simulating the design you need to execute the design check to check the sheet for errors. In order check the design and save select check and save in the schematic_edit palette menu. To check without saving select File->check schematic from the pull-down menu. 9) Naming instances is particularly useful in identifying transistors while analysing the simulation log file in accusim or Eldo. You can name a transistor by selecting the transistor (click on it) and then selecting Instance->auto/manual under "name" in the schematic_edit palette menu. Note: In-order to use the standard cells present in the adk library, select standard cells from the ic_library palette menu. You can find basic logic gates, latches etc under "SDL parts" in the cell library palette menu. 10) As a next step will make a design with two inverters in series. To do this we need to make a symbol of this design and then complete the next level in a new sheet. 11) To create a symbol select Miscellaneous->generate symbol from the pull-down menu. The generate symbol dialog box will appear. Clicking ok in this box will create a box shaped symbol with the default dimensions. In order to choose other shapes click on choose shape in the generate symbol dialog box.
4 12) Once the symbol is generated check and save the symbol is the same manner as checking the design. 13) You can also edit the symbols for custom shapes and sizes. To edit a symbol you need to open it by selecting symbol under "open" in the schematic_edit palette menu. 14) Once the symbol is opened you can use the various shapes listed under "add" in the symbol_draw palette menu. 15) Now open a new sheet to draw the high level schematic with two inverters in series. 16) In order to place a symbol on the sheet select Schematic_edit -> Add -> Instance from schematic_edit menu on the right. Choose the required symbol from the pop-up window that appears on the screen. 19) Place two inverters and connect them as shown in Figure 3. Finally check the design for errors. Figure 3 20) Viewpoints can be created in DA-IC by switching to the simulation mode. It is not required to simulate the design, just entering the simulation mode would do. To do this select Simulation -> TSMC 0.35 from the schematic_edit palette menu. 21) In the simulation setup configuration dialog box that will popup, select TSMC035 in the list name viewpoint type. Make tsmc035a is entered in the viewpoint name text box. Click ok. This will create all the required viewpoints and will take you into the simulation mode. For now exit out of the simulation mode by selecting End Sim from the schematic_sim_palette menu. Adding buses 22) To draw a bus select Bus/Bundle under "Add" in the schematic_edit menu and draw the bus on the sheet. 23) Give the bus a name by selecting net under "Name" in the schematic_edit menu. The name of the net should be of the form bus(15:0). The numbers represent the bits in the bus. 24) Now add wires to connect the components to the bus as shown in Figure 6. Once you make a wire connection to the bus, the bus ripper will appear and you will prompted to
5 enter the bit number for the net. Figure 6
6 Part 2: Quicksim - II Quicksim II is a functional simulator which allows you to simulate the switching characteristics of a circuit. It does not model the electrical characteristics of the circuit. You need to use accusim or eldo to observe a more accurate behavior. In this tutorial we shall simulate the design created in DA-IC part I tutorial in the unit delay and nominal delay mode. Unit delay mode is used to debug fundamental design functionality. When you run the simulator in this mode all output pins and IO pins are assigned a delay of one timestep (by default 1 timestep = 0.1ns) and the input pins are assigned a delay of 0ns. In this delay mode no technology files are used. Nominal delay simulation is carried out in the full timing mode of the simulator. This mode simulates the effects of timing on the design logic. It uses the delay equations specified in the technology file. For nominal delay simulations we use the typ values from the file. Unit delay simulation 1) Invoke the simualtor by typing quicksim <design name>/tsmc035 from the prompt. tsmc035 is the is the viewpoint created by DA-IC for quicksim. 2) Open the design by selecting open sheet from the setup palette menu. 3) Now select the inputs and outputs and click on the trace button in the setup palette menu. 4) convenient way to force inputs in Quicksim is to write a force file. A sample force file (filename.force) for to test this logic circuit is shown below. delete traces IN OUT add traces IN OUT force IN 0 0 force IN 1 20 force IN 0 40 run 50 5) Now simulate the circuit by choosing Setup->Force->From File from the pull-down menu and then select your force file. The trace window will look like the one in Figure 1. You can add a cursor by typing add cu.
7 Figure 1 Note: You can force a clock input using the following statements. set clock period 60 force A 0 0 -repeat force A repeat The first line sets the clock period and the third line specifies the duty cycle. 6) In order to reset the simulation, choose Run->reset->State. Unselect "Save results waveform DB". 7) Sometimes when you change the force file and then resimulate you will find that that the circuit is still simulated with the old values. In that case you need to delete the force by choosing Setup->delete forces->all signals. Nominal delay simulation 8) Choose Setup->kernel->analysis and then select delay in the dialog box that appears. 9) Next select Edit->Select->All->Instance. This will highlight the instances in your schematic. For this to work your active window should be the schematic window. 10) Select Setup->kernel->change->timing mode. In the dialog box that appears select change->typ (in the full delays line). 11) Simulate the circuit from the force file as before.
8 Part 3: ELDO ELDO is spice based simulator that performs electrical simulations. Various analysis viz, DC analysis, transient analysis, DCOP, noise analysis can be performed. In this tutorial we will deal with DC and transient analysis of an inverter. DC analysis: DC analysis determines the operating point of a circuit with all capacitors open and all inductors shorted. In this mode we can sweep an input over a voltage range and measure the response. Transient analysis: In this mode the output of the circuit is calculated as a function of time. 1) Enter into the simulation mode in adk_daic as described in the part - 1 2) A node 0 needs to be defined as ground for your circuit. A default name "ground" is assigned, but this is not used in the adk symbols. In ADK or SDL symbols ground is represented using GND. To define this choose setup -> simulation -> setup netlister from the pull down menu. In this dialog box specify ground as GND. 3) You need to setup the type of analysis you will be performing. Let us first perform a DC analysis. Select Analysis under "Setup Sim" section of the simulation palettes menu. 4) In this dialog box you need to select DC. Now choose setup against the DC checkbox. This will pop up the Setup DC analysis dialog box. In this we specify the voltage source to be swept, voltage ranges and the step. 5) Enter v2 in the voltage source text box and the voltage range as 0 to 5 V as shown in Figure 1. Let the step be 0.2. We will see what v2 means later.
9 Figure 1 6) Now you need to setup the probes that specify the nodes for which the output data needs to be recorded. Select probes under "Setup results" in the simulation palette menu. In the set probes dialog box choose DC under analysis type. 7) A model file in the SPICE format needs to be specified so the simulator knows where the MOSFET and other models reside. This can be done by selecting Library under "setup other" section in the simulation palettes menu. Path to be entered: /usr/apps/eda/adk.2.0/technology/ic 7a) A file containing the process parameters also needs to be included. This can be done by selecting Include under setup other section in the simulation palettes menu. File to be entered: $MGC_HEP/technology/ic/tsmc035/tsmc035.mod 8) Write the netlist file by selecting write under "netlist" section in the simulation palettes menu. This command will create two files, a.spi and a.cir file. The.spi file is the netlist file you will have to edit. 9) To edit the.spi file select edit under "netlist" section in the simulation palettes menu. The.spi file will open in the notepad as shown in Figure 2.
10 Figure 2 10) In this file comments are denoted by '*'. You will have to add the list of input sources before.end. Add the following v1 VDD 0 5 v2 IN 0 5 Here v1 and v2 are the names we assign to the voltage sources (choose any name you want). IN is the input port to the inverter in this case. 0 5 means the voltage source is 5V with respect to ground. It is this v2 we entered in step 5. 11) Each time you write the netlist file you will have to edit the file to add the voltage sources. A better option is to include a file with voltage sources specified in it. Use the.include statement as shown in Figure 3. Here sources is the file that contains the statements mentioned in step 10.
11 Figure 3 12) Select run under the "simulation" section in the simulation palletes menu. This will run the simulation. An x-term will pop up while running the simulation. Any errors in the.spi file will be mentioned in the here. The errors can be seen by selecting view log under "simulation" section in the simulation palettes menu. 13) To view the results select view->invoke viewer under results section in the simulation palettes menu. This will start Design Architect-IC view. Now select the signals that you want to view and choose chart->selected from the pop-up menu (right click). This will chart the results as shown in Figure 4
12 Figure 4 Transient Analysis 14) For performing transient analysis perform step2. In step 3 choose Transient and click on setup against the transient dialog box. In the setup transient analysis dialog box enter the stop time for the simulation. We enter 10ms as shown as in Figure 5. 'm' indicates milliseconds. Enter 'u' for microseconds and 'n' for nanoseconds. When no units are mentioned the default is seconds. Figure 5 15) Choose transient in the set probes dialog box.
13 16) Perform step 7 and write netlist file. The main change is to be made while editing the netlist file for specifying the voltage sources. There are various kinds of sources you can specify viz, DC, pulse, Sin, Exp, PWL (piece-wise linear) etc. 17) To specify a DC source enter the following line v2 IN 0 5 To specify a pulse enter the following line: v2 IN 0 pulse( n 1n 500u 1m) This is of the form pulse(initial value Pulsed value Delay time Rise time Fall time Duty cycle Time period) To specify a sinusoid input enter the following: v2 IN 0 sin( ) This is of the form sin(offset Magnitude Frequency Time Delay Damping Factor) To specify a PWL input enter the following: v2 IN 0 pwl(0 0 1m 2 2m 3 5m 1) This is of the form pwl(time value...) 18) Now run the simulation and view results as in the DC analysis case. Sample waveform for a pulse input is shown in Figure 6. Figure 6
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