S Exercise 1C Testing the Ring Oscillator

Transcription

1 S Exercise 1C Testing the Ring Oscillator Aalto University School of Electrical Engineering Department of Micro- and Nanosciences (ECDL)

2 1 Building the test bench In this exercise, we will build a simple test bench and run a transient analysis with Spectre to see if the ring oscillator works. 1.1 Create a test bench schematic cellview First, a new cell for the test bench need to be created. Follow these steps to create the testbench schematic cellview: 1. Start the Cadence software, if the software is not already in use. Then open the Library Manager window as you did in the Section 2 of the Exercise 1A. 2. Select the training library in the Library Manager window. 3. Create a new schematic cellview called testbench into the training library (see Exercise 1A Section 3.1 for help). When you are ready, you should have a blank Schematic Editing window for the testbench open. 1.2 Create the testbench schematic Your next task is to build the testbench schematic shown in Figure 1. Figure 1: Test bench 1

3 If you examine the test bench circuit, you may wonder the test configuration. When we created the inverter in the Exercise 1A, we defined operating voltages as globals by adding VDD and VSS components from the analoglib. Roughly speaking, it means that when you have a bigger structure, you don t have to connect operating voltage pins in every place. Instead, you can define global variables VDD and VSS, and set values for them for example in a test circuit. In this test setup, a piecewise linear voltage source is connected to VDD and a DC voltage source with a magnitude of 0V is connected to VSS. The positive operating voltage VDD rises from 0V to 1.2V in 100 picoseconds. Perform the following steps to build the testbench schematic: 1. Add components and change their properties using Table 1 (see Exercise 1A Section 3.2 for help). Table 1: Component list of the testbench schematic Library Name Cell Name Properties training osc analoglib vdd analoglib vss analoglib gnd analoglib vpwl Number of pairs of points = 2, Time 1 = 0s, Voltage 1 = 0V, Time 2 = 100ps, Voltage 2 = 1.2 V analoglib vdc DC Voltage = 0 V (Note: In Cadence, you can attach multipliers to values. For example, it is possible to input 100ps by typing 100p in a time field.) 2. Add the output pin OUT. 3. Wire the schematic. 4. Remember to Check and Save! Leave the Schematic Editing window open for the simulation. 2 Running a simulation with Spectre In order to find whether the ring oscillator works, we will use the simulation environment of the Cadence to run a simple transient simulation. Follow these steps to set up simulator: 1. Open the Analog Design Environment window (Figure 4) with the Launch -> ADE XL pull-down menu item in the testbench Schematic Editing window. 2. Choose the Create New View radio button and click OK in the Launch ADE (G)XL window. 2

4 3. Make sure the setting in the Create new ADE (G)XL view window are the same as in Figure 2. Click OK. 4. In the Analog Design Environment XL Editing window (Figure 3), click the here link in the Tests subsection under title Welcome to ADE XL to open the Choose Design window. 5. In the Choose Design window, ensure that testbench is chosen in the cell name list. Click OK. Figure 2: Create new ADE (G)XL window Figure 3: Analog Design Environment XL Editing window 6. To select the simulator, open the Choosing Simulator window with the Setup -> Simulator... pull-down menu item in the ADE XL Test Editor window (Figure 4). 3

5 Figure 4: ADE XL Test Editor window 7. In the Choosing Simulator window, select spectre from the Simulator list box. Click OK. 2.1 Set up the model files A circuit simulator is basically an equation solver. We have components, such as transistors, connected together and models describing the behaviour of the components in a circuit. When we want to simulate the circuit with a simulator, we have to define used models and parameters together with a description of the schematic. When we are using Spectre, a netlist 1 is automatically created from the schematic, but you have to define model files that describe the CMOS transistors during a simulation. Use following steps to set up model files: 1. In the ADE XL Test Editor window, open the Setup Corners window (Figure 5) by selecting ArtistKit -> Setup Corners. 2. In the Setup Corners window, select typ in the Select All list box under the GLOBAL VARIATIONS column. 3. Click the Save Model File button and close the Setup Corners window. 1 A netlist is textual description of a schematic used by simulator. 4

6 Figure 5: Setup Corners window 2.2 Setting up analysis In this section, we will set up a transient analysis from 0s to 2ns. Perform the following steps to set up the analysis: 1. In the ADE XL Test Editor window, open the Choosing Analyses window (Figure 6) by selecting Analyses -> Choose. 2. In the Analysis section of the Choosing Analyses window, click the tran radio button. 3. Type 2n in the Stop Time text field. Make sure that the Enabled tab is selected and Click OK. 5

7 Figure 6: Choosing Analyses window 4. The transient analysis appears in the Analyses section of the ADE XL Test Editor window. 2.3 Saving outputs for plotting Next, we will select the node voltages we want to plot when the simulation is finished. Follow these steps to save outputs for plotting: 1. In the ADE XL Test Editor window, select Outputs -> To Be Plotted -> Select On Schematic. 2. Move the mouse to the Schematic Editing window. 3. Click on the wire at the output of the ring oscillator to measure voltage at the output node. The output node will change color indicating that node voltage will be measured. 4. Then click on the wire between VDD and vpwl to measure the VDD operating voltage. 5. Press the [Esc] key in the Schematic Editing window to stop the selection process. (Note: If you want to measure current trough a node, click on the red dot or pin. An ellipse around the node indicates that current will be measured.) 6. Now there should be two nodes vdd! 2 and OUT in the Outputs section of the ADE XL Test Editor window. 2 An exclamation mark! after vdd indicates that the node is global 6

8 7. The changes you made in the ADE XL Test Editor should be now observable in the Analog Design Environment XL Editing window (Figure 7). It is possible to change some simulation settings directly in the ADE XL Editing window s Data View subwindow. More outputs can be set for plotting under the Outputs Setup tab. ADE XL Test Editor can be reopened by double clicking the testbench name training:testbench1 in the Data View subwindow. Figure 7: Analog Design Environment XL Editing window 2.4 Running the simulation 1. To find out where the simulation data will be saved, open the Save Options window with the Options -> Save... pull-down menu item in the Analog Design Environment XL Editing window. 2. In the Save Options window, ensure that the location for the simulation results is set to ~/simulation and that the cad root folder (.) is set as the location for ADE XL results database (Figure 8). Close the Save Options window. 3. Finally, run the simulation by clicking the round green Run Simulation icon in the Analog Design Environment XL Editing window. When the simulation finishes, the transient 7

9 responses can be plotted by clicking the Plot all waveforms icon under the Results tab in the ADE XL Editing window. You should have similar output signal as in Figure 9. Figure 8: Save Options window 4. Ensure that your output signal is similar as in Figure 9. If the signals doesn t match, you will get only wrong results in the Exercise 2A! References [1] Matthew Turnquist, Cadence Tutorial: Schematic entry and simulation, ECDL HUT 8

10 Figure 9: Transient responses 9