Sparse Matrix Formats

Transcription

1 Christopher Bross Friedrich-Alexander-Universität Erlangen-Nürnberg

2 Motivation Sparse Matrices are everywhere Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

3 Motivation Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

4 Sparse Matrix Vector Multiplication Sparse Matrix-Vector Multiplication: y = Ax A is a sparse matrix Just store (and process) non zero values of A Indirect access of vector x Sparsity pattern of a matrix Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

5 Sparse Matrix Vector Multiplication 1 for ( int row =0; row < MaxRows ; ++ row ) 2 for ( int col =0; col < NonZerosInRow [ row ]; ++ col ) 3 y[ row ] += A[ row ][ col ] * x[ columid [ row ][ col ] ] Algorithm Analysis For each non zero matrix entry: 2 Flops 2 double precision loads; 1 int index load 1 double precision store (+ load) per row Memory intensive Code balance 10 Bytes/Flop Memory layout is important Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

6 Standard Sparse Matrix Storage Formats Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

7 CSR - spmv Kernel 1 for ( int rowid =0; rowid < NumberOfRows ; ++ rowid ) 2 { 3 double tmp = 0.; 4 5 for ( int id = rowptr [ rowid ]; 6 id < rowptr [ rowid +1]; ++ id) 7 { 8 tmp += val [id] * x[ colind [id] ]; 9 } y[ rowid ] = tmp ; 12 } 13 } Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

8 CSR - spmv Kernel - Vectorization 1 for ( int rowid =0; rowid < NumberOfRows ; ++ rowid ){ 2 double tmp0, tmp1, tmp2, tmp3 = 0.; 3 for ( int id = rowptr [ rowid ]; 4 id +4 < rowptr [ rowid +1]; id +=4 ) 5 { 6 tmp0 += val [id +0] * x[ colind [id +0] ]; 7 tmp1 += val [id +1] * x[ colind [id +1] ]; 8 tmp2 += val [id +2] * x[ colind [id +2] ]; 9 tmp3 += val [id +3] * x[ colind [id +3] ]; 10 } 11 y[ rowid ] = tmp0 + tmp1 + tmp2 + tmp3 ; 12 remainder loop 13 } 14 } Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

9 CSR - spmv Kernel - Vectorization 1 for ( int rowid =0; rowid < NumberOfRows ; ++ rowid ){ 2 double tmp0, tmp1, tmp2, tmp3 = 0.; 3 for ( int id = rowptr [ rowid ]; 4 id +4 < rowptr [ rowid +1]; id +=4 ) 5 { 6 tmp0 += val [id +0] * x[ colind [id +0] ]; 7 NOT tmp1 optimal += val for [id large +1] vector * x[ colind lengths! [id +1] ]; 8 tmp2 += val [id +2] * x[ colind [id +2] ]; 9 tmp3 += val [id +3] * x[ colind [id +3] ]; 10 } 11 y[ rowid ] = tmp0 + tmp1 + tmp2 + tmp3 ; 12 remainder loop 13 } 14 } Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

10 Standard Sparse Matrix Storage Formats Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

11 Sell-C-Sigma Format Sort matrix by row length Divide into chunks Fill chunks with zeros Save data in column major order Chunk occupancy Fraction of useful data entries in Sell-C-Sigma: β = NonZeros Chunks i=0 C l i Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

12 Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

13 Sell-C-sigma - spmv Kernel 1 for ( int chunk =0; chunk < rows / C; ++ chunk ){ 2 int chunkoffset = chunkptr [ chunk ]; 3 double tmp [C] {}; 4 5 for ( int j =0; j< chunklength [ chunk ]; ++j){ 6 for ( int i =0; i <C; ++ i){ // for vectorization 7 tmp [ i] += val [ chunkoffset + j* C + i] 8 * x[ colind [ chunkoffset + j* C + i] 9 ]; 10 } 11 } 12 // write back results 13 } 14 remainder loop or extra padding Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

14 Sell-C-sigma - spmv Kernel - Compiler Issues 1 for ( int chunk =0; chunk < rows / C; ++ chunk ){ 2 int chunkoffset = chunkptr [ chunk ]; 3 double tmp [C] {}; 4 5 for ( int j =0; j< chunklength [ chunk ]; ++j){ 6 # pragma simd 7 for ( int i =0; i <C; ++ i){ // for vectorization 8 tmp [ i] += val [ chunkoffset + j* C + i] 9 * x[ colind [ chunkoffset + j* C + i] 10 ]; 11 } 12 } 13 } Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

15 Performance Analysis Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

16 number of rows/columns 2,063,494 nonzeros 12,771,361 density 3.43e-06 nonzeros per row 7.08 β (C=4,sigma=1) 73.2% β (C=4,sigma=16) 87.6% β (C=4,sigma=512) 99.5% CSR 1.3 Gflop/s Sell Gflop/s Sell Gflop/s Sell Gflop/s Intel Haswell i5-4300u CPU, dual 1.90GHz Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16

17 Problems of common Formats CSR -> short loops, low vectorization ratio ELLPACK -> Fill-in Sell-C-Sigma combination of CSR and ELLPACK good performance on different architectures Think about your data structure It might increase your performance. Sparse Matrix Formats C. Bross BGCE Research Day, Erlangen, /16