EEE3050 Theory on Computer Architectures (Spring 2017) Prof. Jinkyu Jeong HW2 TA 이규선 (GYUSUN LEE) / 안민우 (MINWOO AHN) Computer Systems Laboratory

Transcription

1 EEE3050 Theory on Computer Architectures (Spring 2017) Prof. Jinkyu Jeong HW TA 이규선 (GYUSUN LEE) / 안민우 (MINWOO AHN)

2 What to do? Part B Hazard detection Part C Dynamic branch prediction * Figure captured from Week7 lecture s last slide

3 Instructions List of implemented instructions in HW2 R format ADD, SUB, AND, OR, SLT LW SW BEQ JUMP NOP HALT (the special instruction for stopping simulation)

4 Given Files File Description File Description alu_ctl.v ALU control unit reg32.v Simple 32-bit register with synchronous reset control_pipeline.v Generating control signal for each instruction mem32.v Behavioral model of a read-write memory logic.v add, sub, and, shift, mux modules reg_file.v Behavioral model of the register file mips_pipeline.v Top module for the MIPS processor hazard.v Data / control hazard detection logic test_bench.v Test bench and top module for simulation branch_prediction.v Branch prediction logic comparator.v Compare two 32-bit numbers and generate 1-bit output test1~4.dat Test files for data / control hazard detection alu.v Behavioral model of the ALU test5.dat Test file for branch prediction rom32.v Pipelined implementation of the MIPS processor *You will modify hazard.v and branch_prediction.v files only from upper list.

5 Part A: Warming Up! To warm up, just run simulation with the code we provide, and answer the following two questions. 1. (test1.dat) How many clock cycles does it take to execute the binary?(include HALT instruction) 2. (test1.dat) Find and explain all hazards that would occur if there were no NOPs. NOTE: You can change test instruction set by changing FILE parameter in test_bench.v.

6 Part B: Data/Control hazard detection and stalling logic

7 Part B: cont. Implementing Data / Control hazard detection and stalling logic We have already assigned some wires and added forwarding signals and MUXes to help you Therefore, you just need to modify hazard.v only so that it can handle all data / control hazard cases. You should get the same results MEM_result.txt from the following 4 test files. test1.dat: 3 NOPs between each instruction test2.dat: 2 NOPs between each instruction test3.dat: 1 NOPs between each instruction test4.dat: no NOPs between each instruction Note: You can change test instruction set by changing FILE parameter in test_bench.v.

8 Data Hazard (R-Type) - 1

9 Data Hazard (R-Type) - 2

10 Data Hazard (ID Branch & R-Type)

11 Control Hazard - 1

12 Control Hazard - 1

13 Control Hazard - 2

14 Control Hazard - 2

15 Control Hazard - 3

16 Control Hazard 3 (same as 2)

17 Part C Local branch prediction logic Implementing 2-bit local branch prediction logic On your Part B code You just need to modify branch_prediction.v Note: Modify the FILE parameter in test_bench.v and use test5.dat for test as explained in slide #5

18 Part C Local Branch Prediction 2-bit branch predictor Indexed by PC when instruction fetched Switching the state triggered by results of the branch taken / not taken Branch target buffer Indexed by PC when instruction fetched Cache of target addresses

19 Part C Local Branch Prediction in Part C Branch instruction is identified on IF stage To predict to take the branch or not Depends on the state of the predictor The predictor and buffer are updated On WB stage of the brach instruction 2-bit predictor: every branching result (taken / not-taken) BTB: only taken target address Index = PC[5:2] 2-bit Branch predictor Branch target buffer; 32-bit 0000 Weakly not taken Target address Weakly taken Target address Weakly not taken Target address 16

20 The Big Picture

21 Submission Compress your report and codes as YourStudentID.zip (Don t change file name) Without subdirectories YourStudentID.zip Part A: answers of 2 questions should be on your report Part B, C: brief comments of your implementation on your code TA will not grade your assignment if YOU NOT FOLLOW THIS FORMAT. Upload your zip file to I-Campus Assignments bulletin PLEASE DO NOT COPY. YOU WILL GET -100 POINTS IF YOU COPIED. Due date: May 25 th, 24:00 Follow this format!!

22 Grade Policy Part Score Descriptions PartA (Report) 20 points Free Format Part B 40 points(5 points for comments) Working correctly & Comment : 40 points Working correctly & not Comment : 35 points Not working correctly : 0 point Part C 40 points(5 points for comments) Working correctly & Comment : 40 points Working correctly & not Comment : 35 points Not working correctly : 0 point Penalty for late submission : -10% per every 24 hours

23 TIPS How to know my code work correctly? Your simulation outputs should be same with golden results Part B: compare Golden_MEM_result.txt & MEM_result.txt Part C: compare Golden_PTB_result.txt & PTB_result.txt Part C: compare Golden_BRP_result.txt & BRP_result.txt Modify only hazard.v, branch_prediction.v files Study week9 s lecture note will help your assignment

24 Tutorial There will be tutorial about using modelsim & VHDL on May 11 th 18:00 in semiconductor building(tba) Attendance is not mandatory, it will be videotaped

25 Questions If you have any questions, please upload it to i-campus Q&A bulletin. This is for sharing your questions with others.