Executing Parallelized Dictionary Attacks on CPUs and GPUs

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1 Executing Parallelized Dictinary Attacks n CPUs GPUs Hassan Alnn ENSIMAG Grenble, France hassan.alnn@ensimag.imag.fr Shaima Al Awadi ENSIMAG Grenble, France shayma.al-awadi@ensimag.imag.fr ABSTRACT This paper presents dictinary based attacks in additin t their crrespnding MD5 SHA implementatin n GPU CPU. All cmputatinal time testing was prgrammed in CUDA- C language. Kaapi Adaptive Stard Template Library (KASTL) was utilized t aid in perfrming parallel CPU peratins cmplimenting tday s widely spread systems with multiprcessrs r multi-cre prcessrs. Cmprehensive analysis f perfrmed dictinary attacks are detailed thrughut this paper with perfrmance results highlighted twards the cnclusin. Keywrds Dictinary Attack, Cryptgraphic Hash Functin, GPU, CPU, MD5, SHA, KASTL, CUDA, Parallel Executin, Passwrd Cracking.. INTRODUCTION In cmputer security, a dictinary attack is a technique used by cryptanalysts t break the security f the system by attempting t retrieve its decryptin passphrase by searching all likely pssibilities. Operating systems stre passwrds in their message digest frm, cmputed frm ne way functins. In cryptgraphy, ne-way functins are prcedures that are easy t cmpute fr a given input, yet cmplex t inverse in plynmial time. A hash functin takes an input prduces a string f fixed size, ften called message digest. Operating systems stre hash values f passwrds cmpare them with message digests f userentered keys. Cryptgraphic hash functins their respective implementatin in dictinary-based attacks n graphic prcessrs are receiving cnsiderable attentin wrldwide. Realtime mdeling f parallelized cryptgraphic hash functins has expedite perfrmance expectatins detected n theretical mdeling. It was fund that cryptgraphic hash functins perfrm much faster mre efficiently n GPUs than they d n CPUs. Because GPUs allw fr parallel thread executin, parallelized hash functins are the natural chice fr fastest dictinary attack results; especially when dealing with extremely lng messages. This paper takes a deeper lk at dictinary based attack n MD5 SHA based passwrds, discusses their implementatin n CPU GPU, analyzing executins cmparing results. Objectives: Detect any factrs that influence the perfrmance f dictinary based attacks n cryptgraphic hash functins n multicre prcessrs multi-prcessr systems. Determine the feasibility f perfrming dictinary based attacks n hash values n GPU cmpared t CPU. Explre the acceptability f the new rle that GPUs take in tday s cmputerized systems 2. DICTIONARY ATTACKS BASED ON MD5 AND SHA 2. DICTIONARY ATTACKS Dictinary based attacked are basically using brute frce technique t systematically g thrugh a list f wrds frm a specific wrdlist f chice. These wrds list can be based n wrds frm the dictinary r cmmnly knwn used passwrd list that are available all ver the internet. The success in a dictinary based attacks depends n the wrdlist used; that is the amunt f pssibilities t g thrugh. Tday, mst webpages sftware s stre the user passwrds hashed using ne f the many available ne-way hash functins. In ur reprt we fcused n MD5 SHA hashed passwrds, as they are frm the tp cmmnly used hashed functins. We tackled this prject by using a wrdlist that was available nline with the mst cmmnly used wrds. The idea is t hash each wrd in the wrdlist then t cmpare t the hash f the wrd that e want t crack. 2.2 Parallelizatin f Dictinary Attacks Recvery f hash digests f passwrds using dictinary wrds is ideal fr parallel cmputing. In essence the dictinary based attacked are parallel in nature due t ability t perfrm each peratin independently withut any dependencies between them., the fact that mdern iterated hash algrithms require sufficiently lng time t cmpute n single cre prcessr especially fr lng messages, extensin f dictinary based attack using hash algrithms t supprt parallel cmputing will significantly increase perfrmance f a cracking the hashed passwrd. The parallelizatin n the CPU is a bit mre cmplex then parallelizatin n GPU. CPU are made mre suited fr parallel task situatins where prcesses run parallel but require cmmunicatin pssibly have dependencies between them, where as GPU are develped t hle parallel data prcessing, due t the nature f it usage, that is hle graphics, where units f graphics peratins are dne in parallel with hardly any dependencies. 2.3 MD5 Based n the earlier hash functin MD4, MD5 was designed by Rn Rivest; last in successin f cryptgraphic hash functins. It became an internet stard has been integrated in a variety f security applicatins such as SSL/TLS IPSec. MD5 uses Merkle-Damgard paradigm such that the security f the hash functin reduces t the security f its relevant cmpressin functin.

MD5 s algrithm is designed t take an arbitrary input prduce a fixed 28-bit utput.

A fur-wrd f 28-bit buffer (A, B, C, D) is initialized as fllws: A = 234567 B = 89ABCDEF C = FEDCBA98 D = 765432 Then, the message is prcessed in 6-wrd (52-bit) chunks, using 4 runds f 6-bit peratins

g(b, c, d) is a different nnlinear functin in each rund (F,G,H,I). fr example, in rund,,, T[i] is a cnstant value derived frm the sin functin X[k] is derived frm a 52-blck f the message.

The cmpressin functin has runds f 2 steps each, updates the buffer as fllws:,,,,,,, 5 _ _,, 3,, t is the step number, f(t,b,c,d) is a nn-linear functin fr the rund, W t is derived frm the message

runds, prduces an utput f 28-bits. 2.4 SHA Unlike MD5, SHA prduces a 6-bit utput digest frm a message with a maximum length f 2 64 - bits.

2 MD5 s algrithm is designed t take an arbitrary input prduce a fixed 28-bit utput. The input is padded such that its length is 448 mdul 52, a 64-bit representing the length f the message is appended befre padding. A fur-wrd f 28-bit buffer (A, B, C, D) is initialized as fllws: A = B = 89ABCDEF C = FEDCBA98 D = Then, the message is prcessed in 6-wrd (52-bit) chunks, using 4 runds f 6-bit peratins each. The cmpressin functin f MD5 is cmpsed f runds, where each rund has 6 steps f the fllwing frm:,, Where: a, b, c, d are the fur wrds f the buffer, but are used in varied permutatins. g(b, c, d) is a different nnlinear functin in each rund (F,G,H,I). fr example, in rund,,, T[i] is a cnstant value derived frm the sin functin X[k] is derived frm a 52-blck f the message. Exp 6 wrds int eighty wrds by mixing shifting. Use 4 runds f 2 peratins n message blck buffer. The cmpressin functin has runds f 2 steps each, updates the buffer as fllws:,,,,,,, 5 _ _,, 3,, t is the step number, f(t,b,c,d) is a nn-linear functin fr the rund, W t is derived frm the message blck K t is a cnstant value derived frm the sin functin S k is a circular left shift by k bits Figure Message Digest 5 Hashing Algrithm: takes message f arbitrary size after a sequence f prcedures runds, prduces an utput f 28-bits. 2.4 SHA Unlike MD5, SHA prduces a 6-bit utput digest frm a message with a maximum length f bits. Althugh SHA is based n the same principles that Rn Rivest used fr MD5, SHA has a mre cnservative design than that f MD5. In SHA, the message we have is padded in rder t becme a multiple f 52 bits, it is split int 6 32-bit wrds, 52 blcks. A 5-wrd f 6-bit buffer is initialized as fllws: A = B = EFCDAB89 C = 98BADCFE D = E = C3D2EF The message is then prcessed in 6-wrd (52-bit) chunks as fllws: 3. EXPERMENTATION PROCEDURE T d ur experimentatin used a wide range f wrds in each wrdlist file. The number f wrds that we ested fr are arund:.5millin, millin, 2millin, 4millin, 6millin 8millin. We als tested n files smaller then millin, just t see the perfrmance between the GPU CPU in cmputatin GPU memry cpy prcedure time. But due the speed that the hashes were cmputed it was best testt n file with large amunt f data. The wrdlist were retrieved frm different surces n the net, but mainly hashkiller.cm, whichh has a list f cmbinatin f dictinary wrd als cmmnly used passwrd by users. The wrds in the file were increased by adding arbitrary wrds. There is a pssibility f the repetitiveness f the wrd in these huge files, but thesee files are used fr perfrmance testing repetitiveness f the wrd desn t affect the result. Figure 2 SHA Hash Algrithm Our main aim was t try test the time it takes t cmpares hash with the hashes f all the wrds in the list, s wrst cases scenari was taken when the hash wasn t in the list. The systems fr the test are the fllwing: Table. Systems used fr the experimentatin ID. Prcessr GPU Card INTEL Cre 2 Du 2.4 NVIDIA Quadr NVS GHZ 32M INTEL Cre 2 Du, 2.5 NVIDIA GeFrce 86 GHZ GS 8 * AMD Optern 875, 2 x NVIDIA GeFrce ttal 6 cres, 2.2 GHZ GTX 28

3 Thrughut this paper wherever required we wuld refer t the systems illustrated in Table as, idkiff. 4. DICTIONARY ATTACKS ON CPUs 4. KASTL KASTL (Kaapi Adaptive Stard Template Library) is a tl that was develped by the INRIA lab that runs n tp f KAAPI. It allws fr the parallelizatin f STL algrithms based n wrk stealing implementatin f KAAPI. In general it allws parallelizing certain tasks, especially lps that are prcessed n CPU with multi-cres. There are ther tls in the market that allw us t parallelize tasks such as Cilk++ Intel Thread Building Blcks (TBB). We had several issues trying t get Cilk++ t wrk n ur systems, due t time restrictins, we decided t perfrm ur parallelizatin with KASTL as we are als been able t get in tuch with the develper if any issues were raised. 4.2 Implementatin 4.2. MD5 T enable us t parallelize the MD5 implementatin we had t first mdify the cde we fund n the web that was develped by Mari Juric [4]. The cde has tw mde f peratins a search just a general verall hashing functin. We were interested in the search, but it was nly implemented fr GPU. Our first task was t create a functin that wuld allw us t d the search using the CPU prcessing in ne run f the prgram, als keeping in mind that we wuld like t be able t parallelize it t with KASTL. The implementatin f MD5 CPU prcessing was straightfrward but we had t a lt f issues with getting KASTL implementatin dne prperly. We tk the assistance f MR. Trare whse PHD thesis is based n KASTL. The STL algrithm that we were trying t parallelize was std::transfrm, s the lp fr the hash was mdified t make use f the transfrm functin. Once that was achieved, we cnverted the std::transfrm functin t the kastl::transfrm which takes in the same cncept but with slight mdificatin. We re basically giving it extra parameters indicating where the utput result shuld be stred SHA Fr the SHA hash implementatin we used the cde that was develped by Mr. Vilkeliskis [5]. The cde had the SHA implementatin fr the CPU straightfrward, s, we plugged it in the prgram we used fr MD5, where fr each lp thrugh the wrdlist, instead f hashing it with the MD5, we hashed it with SHA, the same we did fr the wrd that we wanted t crack. The kastl::transfrm functin stayed the same as fr MD5, s that helped speed up the implementatin fr SHA. 4.3 Experiments The experiments were dne n the three systems mentined in table as per the experimentatin prcedures mentined in sectin 3 f this reprt. Each systems ttal cre was exhausted in each test perfrmed, t make sure that we parallelize the peratin as much as pssible. Figure 3 Figure 4 shw the perfrmance f the systems upn executing MD5 SHA algrithms n each. Figure 3 MD5 Systems Perfrmance m m 2m 3m 4m 8m.5m m 2m 3m 4m 8m Figure 4 SHA System Perfrmance We can clearly see that perfrmance n idkiff was much higher then the perfrmance f the ther tw systems, as idkiff has a ttal f 6 cres available fr usage. We als nticed as was expected frm reprts read that dictinary attacks n SHA was slwer than MD5. We can definitely say that the increase in cre f the prcess almst cut the prcessing time by half. 5. PARALLEL DICTIONARY ATTACKS ON GPU 5. CUDA Graphic Prcessrs are difficult t prgram fr general-purpse uses. Prgrammers can either learn graphics APIs r cnvert their applicatins t use graphics pipeline peratins, r they can use stream prgramming abstractins n GPUs. NVIDIA released a sftware develpment kit named Cmpute Unified Device Architecture (CUDA) fr its graphics hardware in February 27. CUDA allws prgrammers t access the cmputing pwer f GPU directly. Prgrammers use C fr CUDA t develp prgrams fr executin n GPUs. CUDA s mst utilized benefits is its use f shared memry, a fast regin that can be shared amngst threads. 5.2 Implementatin 5.2. MD5 The cde used fr the GPU was mainly taken als frm the same develper wh we used the MD5 CPU implementatin frm Mr. Juric [7]. The GPU implementatin he had at a first glance seem t be wrking just as we wanted. There was slight mdificatin dne n the cde, mainly separating the CPU GPU peratins s

4 that they can be run independently, als simplify the running prcedure withut the extra parameters that the develper included fr benchmarking extra search feature. In the initial stages, a lt f wrk was dne trying t tweak the shared memry, the numbers f threads per blcks that is assigned fr each prcess t see if it wuld increase the perfrmance f the GPU peratin SHA The cde used fr the GPU implementatin f SHA was develped by Mr. Vilkeliskis. The implementatin was dne fr single hashing thrugh GPU, withut taking full effect f GPU capabilities. He did have a benchmarking technique where he ges thrugh a list f arbitrary values t check the perfrmance. These values are nt passed frm glbal functin but rather, are lped frm within the device. This technique wuldn t have been useful fr ur implementatin as it wuld mean fr each wrd we have t cpy it individually t the device then run it, als desn t take full effect GPU parallelism capabilities. Our implementatin fr SHA n GPU was then cnsistent f tw main tasks, trying t use the MD5 implementatin f GPU that is cpying the wrds as a batch t the device, t try use the shared memry that was used in the MD5 implementatin. This was basically a straightfrward implementatin frm the GPU MD5 functin with a slight tweaking t enable us t prduce SHA hashes rather than MD5 hashes. The SHA implementatin interface was als adpted t use the same interface as the MD5 implementatin. 5.3 Experiments The experiments in this sectin were als dne n the 3 systems mentined in table as per the experimentatin prcedures mentined in sectin 3 f this reprt. We have prvided figure fr bth the SHA MD5 dictinary attack times, with withut memry cnsideratin. We fund ut that memry peratin takes a lt f verhead f the verall GPU prcessing time. It was unexpected t find that even thugh the idkiff prcessing time was extremely fast cmpared t the ther systems, the memry peratin threw ff the results nce we cnsidered the memry peratin f cpying frm t the device m m 2m 3m 4m 8m Figure 5 MD5 GPU withut memry peratin cnsideratin TIme / s Figure 6 MD5 GPU with memry peratin cnsideratin m m 2m 3m 4m 8m Figure 7 SHA GPU withut memry cnsideratin m mil 2mil 3mil 4mil 8mil.5m mil 2mil 3mil 4mil 8mil Figure 8 SHA GPU with memry cnsideratin 6. COMPARATIVE ANALYSIS We nticed verall the perfrmance n the GPU were much higher than that f CPU. In exceptin is the idkiff system where even the prcessing time f each thread was prcessed extremely fast almst 5x faster than the CPU, but with the memry cnsideratin it drps it dwn t arund.5x faster. Thugh there was a prblem with the cpy t the GPU memry, as it is very slw time cnsuming which drpped the GPU perfrmance n that system much slwer than that f the CPU 6-multicre perfrmance. T sum up we added tw extra figure shwing the GPU CPU multi-cre perfrmance n the idkiff server with withut the memry cnsideratin.

5 Time/Secnd Figure 9 system CPU GPU perfrmance withut GPU memry cnsideratin Time/Secnd m m 2m 3m 4m 8m.5m m 2m 3m 4m 8m SHA CPU SHA GPU MD5 CPU MD5 GPU SHA CPU SHA GPU MD5 CPU MD5 GPU 8. REFERENCES [] Znenberg, A. 29. Distributed Hash Cracker: A Crss- Platfrm GPU-Accelerated Passwrd Recvery System. Rensselaer Plytechnic Institute. [2] Ruane, J. 26. General Purpse Cmputing with a Graphics Prcessing Unit. Dublin Institute f Technlgy. Vl. [3] Bernaschi, M. Bissn, M. Gabrielli, E. & Taccni, S. 29. An Architecture fr Distributed Dictinary Attacks n Cryptsystems. Jurnal f Cmputers. Vl 4. N. 5. [4] Vilkeliskis, T. 28. Cmputing SHA message digest n GPU (PwerPint). Retrieved frm [5] Vilkeliskis, T. 28. Cmputing SHA message digest n GPU [Sftware]. Available frm [6] Cllange, S. Daumas, M. Dass, Y. S. & Defur, D. Using Graphics Prcessrs fr Parallelizing Hash-based Data Carving. 29. Prceedings f the 42 nd Hawaii Internatinal Cnference n Cmputer Sciences. Hawaii, United States. [7] Juric, M. 28. CUDA MD5 Hashing Experiments [Sftware]. Available frm [8] Radev, R. 28. GPU Cmputing CUDA (PwerPint). Retrieved frm [9] Farber, R. 28. CUDA, Supercmputing fr the masses. Retrieved frm Figure system CPU GPU perfrmance with GPU memry cnsideratin 7. CONCLUSION AND PERSPECTIVE Finally, we were able t see the difference in perfrming dictinary based attacks n ne-way cryptgraphic hashing functins in particular MD5 SHA. Overall in bth GPU CPU tests cracking MD5 hashed passwrds are faster than that f SHA. Als using GPU t crack the hashed passwrd did give a kick t the speed, except maybe in system where the verhead in memry exchange was a lt. It wuld have been mre interesting t been able t include a wider range f ne-way hashing functins such as SHA256 SHA52 r any f the new hashing functins that have been submitted t the NIST hash functin cmpetitin such as MD6 r Skein in the test that were perfrmed.

B Tech Project First Stage Report on

B Tech Project First Stage Report on B Tech Prject First Stage Reprt n GPU Based Image Prcessing Submitted by Sumit Shekhar (05007028) Under the guidance f Prf Subhasis Chaudhari 1. Intrductin 1.1 Graphic Prcessr Units A graphic prcessr unit