CS4500/5500 Operating Systems Synchronization

Transcription

1 Operating Systems Synchrnizatin Yanyan Zhuang Department f Cmputer Science UC. Clrad Springs

2 Recap f the Last Class Multiprcessr scheduling Tw implementatins f the ready queue Lad balancing Parallel prgram scheduling } Synchrnizatins n shared data and executin phases } Causality amng threads Inter-prcess r thread cmmunicatins 2

3 Inter-Prcess Cmmunicatin (IPC) Three fundamental issues: Hw ne prcess can pass infrmatin t anther Hw t make sure tw r mre prcesses d nt get in each ther s way when engaging in critical activities Hw t maintain prper sequencing when dependencies present Hw abut inter-thread cmmunicatin? Same prblems exist & same slutins apply 3

4 Race Cnditins Race cnditins: when tw r mre prcesses/threads are reading r writing sme shared data and the final results depend n wh runs precisely when Interrupts, interleaved peratins/executin Clck interrupt! printer daemn free_slt = in; Dir[free_slt] = X; in ++; free_slt = in; Dir[free_slt] = Y; in ++; 4 B started using a shared var befre A was finished

5 Mutual Exclusin and Critical Regins Mutual exclusin: makes sure if ne prcess is using a shared variable r file, the ther prcesses will be excluded frm ding the same thing Main challenge/issue t OS: t design apprpriate primitive peratins fr achieving mutual exclusin Critical regins: the part f the prgram where the shared memry is accessed 5

6 Mutual Exclusin and Critical Regins Mutual exclusin: makes sure if ne prcess is using a shared variable r file, the ther prcesses will be excluded frm ding the same thing Main challenge/issue t OS: t design apprpriate primitive peratins fr achieving mutual exclusin Critical regins: the part f the prgram where the shared memry is accessed Fur cnditins t prvide mutual exclusin N tw prcesses simultaneusly in critical regin N assumptins made abut speeds r numbers f CPUs N prcess running utside its critical regin may blck anther prcess N prcess must wait frever t enter its critical regin 6

7 Mutual Exclusin Using Critical Regins Mutual exclusin using critical regins 7

8 Mutual Exclusin with Busy Waiting Disabling interrupts: OS technique, nt users Multi-CPU? Lck variables: Test-set is a tw-step prcess, nt atmic Busy waiting: Cntinuusly testing a variable until sme value appears (spin lck) 8

9 Busy Waiting: Strict Alternatin 0 1 Prpsed strict alternatin slutin t critical regin prblem (a) Prcess 0. (b) Prcess 1. What if P1 s nncritical_regin() has lts mre wrk than P0 s? Taking turns is nt a gd idea when ne is much slwer than the ther 9

10 Busy Waiting: Petersn s Slutin sharing Different frm strict alternatin Petersn's slutin fr achieving mutual exclusin 10

11 Busy Waiting: TSL TSL (Test and Set Lck) Indivisible (atmic) peratin, hw? Hardware (multi-prcessr) Hw t use TSL t prevent tw prcesses frm simultaneusly entering their critical regins? 0 can enter; 1 can t enter Entering and leaving a critical regin using the TSL instructin 11

12 Busy Waiting: Prs and Cns Cns Prs Wastes CPU cycles Fr single-cre system, user-level threads } T1 waiting fr T2 t change lck t 0, but T2 never gets t run when T1 is running } Pririty inversin 2 prcesses n 1 CPU. Prcess H with (strict) high pririty and L with (strict) lw pririty, L is in its critical regin and H becmes ready; des L have chance t leave critical regin? Avids expensive cntext switch when critical regin is very shrt } Sleep/wakeup (an alternative t busy waiting) requires cntext switch Time t put a thread t sleep/wake up might exceed the time a thread has actually slept 12

13 Sleep and Wakeup Issue I: hw t avid CPU-cstly busy waiting? Issue II: pririty inversin prblem Sme IPC primitives that blck instead f wasting CPU time when they are nt allwed t enter their critical regins Sleep and wakeup 13

14 Sleep and Wakeup Prducer-Cnsumer Prblem Prducer: buffer full à sleep, wakeup when item remved Cnsumer: buffer empty à sleep, wakeup when item inserted 14

15 Sleep and Wakeup Prducer-Cnsumer Prblem Q1: What if the wakeup signal sent t a nn-sleep prcess? Interrupt! 15

16 Sleep and Wakeup Prducer-Cnsumer Prblem Q2: wakeup waiting bit wakeup() sent t a prcess that is still awake, wakeup waiting bit is set 16

17 Semaphres and P&V Operatins Semaphres: a variable t indicate the # f pending wakeups (Dijkstra) Dwn peratin (request): lck/sleep Checks if a semaphre is > 0, - if s, it decrements the value and just cntinue - Otherwise (==0), the prcess is put t sleep withut cmpleting the dwn fr the mment 17

18 Semaphres and P&V Operatins Semaphres: a variable t indicate the # f pending wakeups (Dijkstra) Dwn peratin (request): lck/sleep Checks if a semaphre is > 0, - if s, it decrements the value and just cntinue - Otherwise (==0), the prcess is put t sleep withut cmpleting the dwn fr the mment Up peratin (release): unlck/wakeup Increments the value f the semaphre - if ne r mre prcesses are sleeping n the semaphre, ne f them is chsen by the system (randmly) and allwed t cmplete its dwn (semaphre will still be 0) 18

19 Semaphres and P&V Operatins Semaphres: a variable t indicate the # f pending wakeups (Dijkstra) Dwn peratin (request): lck/sleep Checks if a semaphre is > 0, - if s, it decrements the value and just cntinue - Otherwise (==0), the prcess is put t sleep Up peratin (release): unlck/wakeup Increments the value f the semaphre - if ne r mre prcesses are sleeping n the semaphre, ne f them is chsen by the system (randmly) and allwed t cmplete its dwn (semaphre will still be 0) P & V peratins are atmic, hw t implement? Single CPU: system calls, OS disabling interrupts temprarily Multiple CPUs: TSL help 19

20 The Prducer-cnsumer Prblem w/ Semaphres Fr mutual exclusin and synchrnizatin P: dwn(&empty) à empty = N à empty = N-1 P: up(&full) à C sleeps n full à wakeup C, full=0 Binary semaphres: if each prcess des a dwn befre entering its critical regin and an up just leaving it, mutual exclusin is achieved C: dwn(&full) à full=0 à sleep n full C: up(&empty) à empty = N-1 à empty = N 20

21 Mutexes Mutex: A variable that can be in ne f tw states: unlcked r lcked A simplified versin f the semaphres [0, 1] Give thers chance t run s as t save self; What is mutex_trylck()? Either gets the lck r returns a cde fr failure à des nt blck 21

22 Mutexes User-space Multi-threading What is a key difference between mutex_lck and enter_regin in multithreading and multi-prcessing? Fr single-cre, user-space multi-threading, a thread has t allw ther thread t run and release the lck s as t enter its critical regin, which is impssible with busy waiting enter_regin Tw prcesses entering and leaving a critical regin using the TSL instructin 22

23 When t Use Busy-waiting/Sleep-wakeup On a single-cre system Using busy-waiting makes n sense } N ther thread can run, lcks wn t be unlcked Use sleep-wakeup instead On a multi-cre systems, with lcks held fr a very shrt time Time fr putting threads t sleep/waking up might decrease runtime perfrmance Use busy-waiting instead In practice: # f cres and architecture unknwn Hybrid apprach 23

24 Prcesses Sharing Memry Prcesses have disjint address spaces Sme shared data structures Semaphres Stred in kernel, accessed nly by system calls Mst mdern OS ffers a way fr prcesses t share sme part f their address spaces A shared file can be used in the wrst case 24

25 Semaphres/Mutexes easy? 0 N Swap the rder f mutex and empty If the buffer is full Must be careful using semaphres! 25

26 Mnitrs (1) Mnitr: a higher-level synchrnizatin primitive Only ne prcess can be active in a mnitr at any instant, with cmpiler s help; thus, hw abut putting all the critical regins int mnitr prcedures fr mutual exclusin? Prcesses can call prcedures in a mnitr, but nt directly access mnitr s internal data Prgramming-language cnstruct: cmpiler knws they are special and handle calls differently 26

27 Mnitrs (1) Mnitr: a higher-level synchrnizatin primitive Only ne prcess can be active in a mnitr at any instant, with cmpiler s help; thus, hw abut putting all the critical regins int mnitr prcedures fr mutual exclusin? But, hw prcesses blck when they cannt prceed? Cnditin variables, and tw peratins: wait() and signal() 27

28 Mnitrs (2) Wakeup and sleep signals can be lst, but nt wait and signal, why? Cnsumer nt allwed in Prducer nt allwed in Mutual exclusin guarantees e.g., prducer will be able t cmplete wait() withut switching t cnsumer befre wait() cmpletes 28

29 Mnitrs (3) Prs Make mutual exclusin autmatic Make parallel prgramming less errr-prne Cns Cmpiler supprt } Keywrd synchrnized in Java 29

30 All previus methds Wrk n a single cmputer Assuming data can be shared in sme way Data exchange between machines? Message passing } Inter-prcess cmmunicatin using tw primitives, send/receive } send(destinatin, &message); } receive(surce, &message); } System calls rather than language cnstructs 30

31 Message Passing Cmmunicatin withut sharing memry: Infrmatin exchange between machines Whenever prducer has an item fr cnsumer, it takes an empty msg&sends back a full ne The prducer-cnsumer prblem with N messages 31

32 Barriers (at end f each phase) Use f a barrier (fr prgrams perate in phases, neither enters the next phase until all are finished with the current phase) fr grups f prcesses t d synchrnizatin (a) prcesses appraching a barrier (b) all prcesses but ne blcked at barrier (c) last prcess arrives, all are let thrugh 32

33 Class IPC Prblems: Dining Philsphers Philsphers eat/think Eating needs 2 frks Pick ne frk at a time Hw t prevent deadlck & starvatin Deadlck: bth are blcked n sme resurce Starvatin: bth are waiting, but n prgress made The prblem is useful fr mdeling prcesses that are cmpeting fr exclusive access t a limited number f resurces, such as I/O devices 33

34 Dining Philsphers (2) A nn-slutin t the dining philsphers prblem What happens if all philsphers pick up their left frks simultaneusly? Deadlck Or, all wait fr sme time, put dwn left, then check if the right available? Starvatin 34

35 Dining Philsphers (2) A nn-slutin t the dining philsphers prblem Perfrmance if dwn and up n mutex befre acquiring/replacing a frk? Only ne can be eating at any instant 35

36 Dining Philsphers (3): Slutin part1 36

37 Dining Philsphers (4): Slutin part2 37

38 Readers and Writers Prblem Mdels access t a database Acceptable t have multiple prcesses reading the database at same time One prcess writing t the database: n ther prcesses may access (even readers) 38

39 Readers and Writers Prblem 39

40 Readers and Writers Prblem Prblem Additinal readers admitted as they cme alng As lng as there s a steady supply f readers, writer will be suspended Slutin When a reader arrives, if a writer is waiting, the reader is suspended behind the writer 40

41 Summary Mnitrs, message passing, barriers Classical IPC prblems Additinal practice Read Linux dcumentatin: LINUX_SRC/Dcumentatin/spinlcks.txt Find the implementatin f dwn and up in LINUX_SRC/kernel/semaphre.c Spinlck v.s. Mutex: 41