Greg Dias, Alex Wilson. Fermi
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1 Greg Dias, Alex Wilsn Fermi
2 Agenda Cmputer Graphics and Parallelism Basic GPU structure NVIDIA Fermi and CUDA
3 Graphics Rendering Methds Plygn Rendering Ray Tracing
4 Plygn Rendering Apprximatin f cmplex gemetry using simple plygns Triangles are simple t draw Mre plygns = better apprximatin
5 Plygn Rendering Parallelism Functinal Parallelism Subsequent scenes are independent, stages can be pipelined. Data Parallelism Sectins f an image are independent f each ther, these can be prcessed separately and spliced tgether.
6 Ray Tracing Cast rays frm the camera Determine if the ray intersects any bjects. Pixel values are based n the clr/material prperties f the intersected bject. Shadws determined by the psitin f shadw rays in the scene.
7 Ray Tracing Parallelism Functinal Parallelism Subsequent scenes are still independent, stages can be pipelined. Data Parallelism Each ray cast and scatter can be calculated independently. Even better when the static scene can be cpied t multiple prcessing units.
8 GPU Structure On chip memry Data bus Prcessing unit
9 Graphics Memry Stres data used by the prcessing unit t reduce lad n the Nrthbridge hub. Textures Frame buffer Depth buffer Frame buffer size varies Screen reslutin Anti aliasing
10 Data Bus Cnnected t the Nrthbridge via PCI Express Receives cmmands and data directly frm the CPU Receive data frm system memry DMA
11 Multicre GPUs have a greater emphasis n data prcessing than CPUs. Taking advantage f the parallelism in rendering algrithms.
12 Fermi Architecture Streaming Multiprcessrs CUDA Cres Instructin Scheduling Perfrmance Memry Hierarchy
13 Tp Level Architecture 16 Streaming Multiprcessrs 32 CUDA Cres per SM Special Functinal Units per SM GigaThread Scheduler Dispatches warps t SM s 6 banks f DRAM Usually GDDR5 SM
14 SM Architecture A Streaming Multiprcessr is made up f 32 CUDA Cres, 16 Lad/Stre Units, and 4 Special Functin Units SFU s can d sine, csine, reciprcal, and square rt. 16 Lad stres means 16 addresses can be calculated per clck Each CUDA cre is a basic prcessr with dual issue capabilities 2 warp schedulers
15 CUDA Cre Architecture CUDA Cres are cmprised f a fully pipelined ALU and FPU. FPU is duble precisin IEEE Single precisin peratins take 1 cycle; Duble precisin peratins take 2 cycles. ALU supprts 32 bit and 64 bit values.
16 Instructin Scheduling The GigaThread Scheduler schedules a warp f threads t an SM. 1 warp = 32 threads The Warp scheduler will schedule up t 32 instructins ttal frm ne r tw warps per cycle.
17 Cncurrent Kernels Imprved cntext switching between prgrams allws fr cncurrent executin. This allws maximum GPU usage utilizatin per cycle.
18 Perfrmance GFLOP/s
19 Memry Hierarchy All memries have ECC, including register files, cache, and shared/main memry. L1 Cache is partitined int bth cache and Shared Memry. It is cnfigurable t be be 48Kb/16Kb L1/Shared respectively r 16Kb/48Kb L1/Shared respectively.
20 Memry Bandwidth GB/s
21 Cnclusin Highly parallel cmputing prblems d nt lend themselves t being run n general purpse CPUs. The creatin f applicatin specific prcessrs with many cres and high memry thrughput was necessary t satisfy the increasing demand fr parallel cmputing needs. Fermi is an example f an ASP capable f executing many simultaneus instructin frm many threads with extremely high thrughput. Even tday, the need fr mre cres and mre thrughput is still rising, and Fermi is just ne f many slutins t the parallel cmputing prblem.
22 Surces Khut, Jsef. Selected Prblems f Parallel Cmputer Graphics. Tech. n. DCSE/TR N.p., Mar Web. Dec < NVIDIA. NVIDIA CUDA Prgramming Guide NVIDIA Lg Hrizntal. Digital image. NVIDIA Multimedia. NVIDIA, n.d. Web. < 1>. Zahran, Mhamed. "Mdern GPUs A Hardware Perspective." NYU Cmputer Science. Web. Dec < GA /lecture3.pdf> "NVIDIA Fermi." (n.d.): n. pag. NVIDIA. NVIDIA. Web. Dec < Pasini, Filipp. "The Myths Surrunding Graphics Card Memry The Myths Of Graphics Card Perfrmance: Debunked, Part 1." Tm's Hardware. N.p., 10 Feb Web. 04 Dec < card myths, html>. Pirzada, Usman. "Hw Much Difference Des Plygn Cunt and Reslutin Really Make? Xbx One." WCCFTech RSS. N.p., Web. 04 Dec < plygn cunt reslutin xbx ne/>. Glaskwsky, Peter N. "NVIDIA s Fermi: the first cmplete GPU cmputing architecture." White paper (2009). < The_First_Cmplete_GPU_Architecture.pdf>. Trres, Yuri. "Using Fermi Architecture Knwledge t Speed up CUDA and OpenCL Prgrams." IEEE Xplre. IEEE, n.d. Web. 05 Dec <
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