NVIDIA Tesla K20X GPU Accelerator. Breton Minnehan, Beau Sattora

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Leslie Wheeler
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1 NVIDIA Tesla K20X GPU Acceleratr Bretn Minnehan, Beau Sattra

2 Overview Jb f the GPU Histry What is the K20X GK110 Benchmark Perfrmance

3 Jb f the GPU Vertex Shader Applies transfrms n each vertex Applies clr t vertices Calculates nrmal at vertex Fragment Shader Calculates fragment nrmal Calculates fragment pixel clrs and lighting

4 Histry f GPU Started as fixed-functin functin graphics prcessrs As they became increasingly prgrammable and mre pwerful, GPU's started being used in mre scientific applicatins GPU has thusands f smaller, mre efficient cres designed fr parallel cmputatins Required the use f graphics prgramming API's OpenGL, Cg, DirectX GPUs designed fr General Purpse cmputing NVIDIA Tesla GPUs

5 Histry f GPU

6 GPU Cmputing The use f a GPU tgether with a CPU t accelerate general-purpse scientific and engineering applicatins Cmputatinally-intensive intensive prtins f an applicatin ffladed t GPU while the remaining cde runs n the CPU Leverage the parallel prcessing capability in General Purpse Cmputing Researchers riginally tried using OpenGL fr General Purpse Cmputing Had t map scientific calculatins nt prblems that culd be represented by triangles and plygns NVIDIA created CUDA t facilitate use GPU fr General Purpse Cmputing

7 CUDA Launched by NVIDIA in 2006 Currently n iteratin 5 Allws full prgrammability f the GPU C/C++/C#/Frtran/Java Faster slutins t parallel prcessing Autmatically parallelize lps

8 NVIDIA GPGPUs

9 What is the K20X?

10 K20X Specificatins GPU GK110 Number f CUDA Cres 2688 Prcessr Clck Memry Clck Memry Size (GDDR5) Peak Memry Bandwidth Flating Pint Perfrmance 732 MHz 2.6 GHz 6 GB 250 GB/Secnd 3.95 Tflps (single) 1.31 Tflps (duble)

11 Tesla K20X Blck Diagram

12 GK110

13 GK110 Layut Energy Efficiency SMX Memry Dynamic Parallelism Hyper-Q Grid Management Unit NVIDIA GPUDirect

14 GK110 - Layut manufacturing prcess 28 nm Transistrs 7.1 Billin

15 GK110 - Efficiency 3 times the perfrmance per watt cmpared t Fermi 28nm prcess efficiency Sacrificed space fr efficiency Run SMXes at 1x clck vs previus 2x Mre executin units fr same perfrmance Requires less pwer fr clcking lgic

GK110 - SMX 15 SMXes per GK110 14 n K20X Each SMX has 192 CUDA cres (single) 64

16 GK110 - SMX 15 SMXes per GK n K20X Each SMX has 192 CUDA cres (single) 64 duble units 32 special functin units 32 lad/stre units 16 texture filtering units

17 GK110 - SMX Warp Scheduler - fur per SMX Warp is grup f 32 threads Tw Instructin dispatchers per WS Duble precisin can be paired with ther instructins Register screbarding fr lng latency peratins Inter-warp scheduling Remved math datapath data hazard detectin hardware Cmpiler encdes when data will be ready Hardware nly uses data knwn t be ready Thread blck level scheduling

18 GK110 - SMX New ISA encding Allws 255 registers per thread Shuffle Transfer between threads in warp withut shared memry One instructin instead f tw (stre/lad) Bindless textures Texture state stred in bject memry Pass texture by handles

19 GK110 - Memry Six 64-bit memry cntrllers Cache flexibility Higher Bandwidth Fast DRAM I/O 384 bit GDDR5 5.2 GHz memry clck Registers/Multiprcessr L1 cache cnfiguratins (L1 cache/shared memry) 16kb/48kb 32kb/32kb 48kb/16kb

20 GK110 - Memry 48kb read-nly cache accessible by SMX lad peratins full-speed unaligned memry access L2 cache 1536 KB unified acrss SMXes 2x bandwidth f fermi Memry Prtectin Single-Errr Crrect Duble-Errr Detect ECC cde Register files, shared memry, L1 cache, L2 cache, DRAM Single Errr crrectin (parity check) Read-Only Data Cache

21 GK110 - Dynamic Parallelism GPU can start prcesses based n results withut ging t the CPU Kernels can start new kernels Streams can start new streams Benefits nested lps, divide and cnquer tasks, Adaptive grid cmputatins,ease f prgraming

22 GK110 - Hyper-Q 32 independent CUDA Streams Each stream has independent wrk queue Hardware managed Allws up t 32 CPU cres t schedule wrk simultaneusly Maximize utilizatin f GPU Remves false dependencies fr MPI prcesses

23 GK110 - Hyper-Q

24 GK110 - Grid Management Unit Flexible grid management and dispatch cntrl system Able t dispatch 32 active grids Pause dispatch f new grids Manages and priritizes grid queue Pending r suspended grids Paused grids until dependencies cmplete Grids can be created thrugh CUDA in SMX Wrk can be queued withut CPU invlvement

25 GK110 - NVIDIA GPUDirect Multi-GPU cmmunicatin Same Server Acrss netwrk Directly exchange data Independent f CPU Direct access frm SSDs,NICs, and IB adapters Decreases MPI send/receive messages Uses less system memry Frees GPU DMA engines

26 Benchmark Perfrmance

27 Benchmark Perfrmance

28 Benchmark Perfrmance

29 Benchmark Perfrmance

30 Real Wrld Use

NVIDIA S KEPLER ARCHITECTURE. Tony Chen 2015

NVIDIA S KEPLER ARCHITECTURE. Tony Chen 2015 NVIDIA S KEPLER ARCHITECTURE Tny Chen 2015 Overview 1. Fermi 2. Kepler a. SMX Architecture b. Memry Hierarchy c. Features 3. Imprvements 4. Cnclusin 5. Brief verlk int Maxwell Fermi ~2010 40 nm TSMC (sme