Towards Gfps CMOS image sensors. Renato Turchetta Barcelona, Spain

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1 Towards Gfps CMOS image sensors Renato Turchetta Barcelona, Spain

2 Outline Introduction High speed CMOS Towards Gfps

3 Outline Introduction High speed CMOS Towards Gfps

4 Specifications Design Manufacturing Packaging Production Characterisation

5

6 Joint process development with TowerJazz

7 High/Ultra-high speed imagers The camera Record length (frames) resolution is proportional to the shaded area. This is a 1Mpixel sensor Frame rate (fps)

8 Outline Introduction High speed CMOS Towards Gfps

9 Frame rate deconstructed B A) Charge collection B) Time to select a row C) Time to settle the data at the periphery Row control A D) Analogue-to-Digital Conversion C E) I/O D E

10 ADC options Global (chip) Column-parallel Block Per-pixel

11 ADC architectures Single slope Multiple slope Cyclic SAR ΣΔ Adapted from Leñero 2016

12 Frame rate 1Mpixel sensor 16x16 blocks 10 bit accuracy 1 ADC per column 2 Gbit/sec IO 1μsec blanking time (and proportional for block r/o) 512 IOs (10 for Global ADC)

13 Frame rate 1Mpixel sensor 16x16 blocks 10 bit accuracy 8 ADCs per column 1μsec blanking time (and proportional for block r/o) 2 Gbit/sec IO 512 IOs (10 for Global ADC)

14 Frame rate 1Mpixel sensor 8x8 blocks 10 bit accuracy 8 ADCs per column 1μsec blanking time (and proportional for block r/o) 2 Gbit/sec IO 512 IOs (10 for Global ADC)

15 Frame rate 1Mpixel sensor 8x8 blocks 10 bit accuracy 8 ADCs per column 0.2μsec blanking time (proportional for block r/o) 2 Gbit/sec IO 512 IOs (10 for Global ADC)

16 Frame rate 1Mpixel sensor 8x8 blocks 10 bit accuracy 8 ADCs per column 1μsec blanking time (and proportional for block r/o) 5 Gbit/sec IO 512 IOs (10 for Global ADC)

17 High-speed summary.

18 Outline Introduction High speed CMOS Towards Gfps

19 Ramo-Shockley s theorem

20 Consequences

21 Temporal colour cross-talk

22 Overbias on a 12μm thick epi V bias = 1.5V V bias = 5V 20 ns 1 ns Sub-ns collection time > Gfps frame rate

23 What about photon counting? Deadtime in counting systems. Basic models: paralysable and non-paralysable Photons Paralysable system Non-Paralysable system t t t

24 Counting curves

25 Practical implementation Towards Gfps A) Time stamping (photon counting) B) Time Pixel Multiplexing C) Burst (framing) image sensors

26 In-pixel signal conditioning Time stamping Single-photon Avalanche detectors (SPAD) From E.Charbon, 2014

27 Time Pixel Multiplexing

28 Burst (framing) sensors On chip storage A) Voltage storage Sample voltage on capacitor B) Charge storage Charge is stored and transferred to readout node

29 Voltage mode On chip storage Brute force global shutter Data stored in periphery Tochigi, 2013 Capacity density sets the limit to inpixel storage

30 Charges in the diode W effect W 1 W 2 Lahav 2013 W 1 W 2 Miyauchi, 2014

31 Charge storage CCD-in-CMOS Tower 180 nm CIS CCD module developed for the frame storage, in the pixel

32 Kirana pixel Photodiode Memory bank

33 Kirana array

34 Kirana improvements A) Microlenses for improved sensitivity: 2.5 improvement B) High-resistivity wafers for faster collection time C) Optical shielding of the memory cells D) Improved implants for electrical shielding of the memory cell

35 Electronic shutter efficiency Electronic shutter efficiency IISW 2017 Memory cell position Electronic shutter efficiency > 10 7 In excess of 1,000 improvement with respect to the first sensors (presented at IISW 2013)

36 Ultra high-speed summary Kirana

37 Conclusions Continuous frame rate. State of the art > 10Gpixel/sec > 100Gpixel/sec, i.e. 1Mpixel Sensors for Gfps: time stamping, time pixel multiplexing, burst mode sensors Burst mode technologies : charge and voltage sampling Burst mode. State of the art > Tpixel/sec, i.e. 1Mpixel Ultimate limit from charge movement Gfps High density capacitance and 3D stacking can help

38 Thank you!

39

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