A Fast IP Routing Lookup Scheme for Gigabit Switching Routers

Transcription

1 A Fast IP Routng Looup cheme for Ggabt wtchng Routers Nen-Fu Huang, h-mng Zhao, Jen-Y Pan, and Ch-An u Department of Computer cence, Natonal Tsng Hua Unversty Hsn-Chu, Tawan, 343, R.O.C. E-mal: {nfhuang, smzhao, dr443, casu}@cs.nthu.edu.tw Abstract-One of the ey desgn ssues for the new generaton IP routers s the route looup mechansm. For each ncomng IP pacet, the IP routng requres to perform a longest prefx matchng on the address looup n order to determne the pacet s next hop. Ths paper presents a fast route looup mechansm that only needs tny RAM and can be mplemented n a ppelned sll n hardware. d on the proposed scheme, the forwardng table s tny enough to ft n RAM wth very low cost. For example, a large routng table wth 4, routng entres can be compacted to a forwardng table of Kbytes. In the worst case, the number of memory accesses for a looup s three. When mplemented n a ppelne sll n hardware, the proposed mechansm can acheve one routng looup every memory access. Wth current ns RAM, ths mechansm furnshes approxmately mllon routng looups per second. Ths s much faster than any current commercally avalable routng looup schemes. I. INTRODUCTION Due to the advent of the World Wde Web (WWW), the networ traffc n the Internet s doublng every few months. The bandwdth hungry applcatons, such as Vdeo-ondemand, Dstance learnng, Dgtal lbrares, are expected to gve traffc another maor boost. In order to contnue to furnsh good Qo servce, three ey desgn ssues on the next generaton IP routers are: ln speeds, router throughput, and pacet forwardng rates. The frst two ssues are currently readly avalable. For example, fber-optc cables can provde faster ln speeds, and new IP swtchng technology (Layer-3 swtchng or mult-layer swtchng) can be used to transmt pacets from the nput nterface of a router to the correspondng output nterface at ggabt rates. Ths paper deals wth the thrd desgn ssue, pacet forwardng, for whch current mechansms perform poorly as ln speeds ncrease. Although the MAC address looup scheme has been acheved at Mbps (Fast Ethernet) for the Brdges and Layer-2 wtches n the past few years, t s based on the exact matchng on the destnaton (MAC) address. For the Internet routers [], what we need s to perform the longest prefx matchng between a destnaton IP address and the routng table nstead of the exact matchng. Ths also mples that the famous schemes for exact matchng, such as perfect matchng and standard Content Addressable Memores (CAMs) cannot drectly be employed for IP address looups [7]. nce the number of end users as well as the amount of routng nformaton on the Internet grows exponentally, the concept of prefx matchng was ntroduced to reduce routng table entres n the early s. Bascally, the IP addresses space s dvded nto classes A, B, and C and stes are allowed //$. (c) IEEE to have 24, 6, and bts for addressng respectvely. Nevertheless, ths partton s nflexble and may waste of the address space, especally the class B addresses. In order to use ths crucal resource, bundles of class C networs were furnshed nstead of class B addresses. Ths of course ntroduces the growth of the routng table entres. On the other sde, the deployment of Classless Inter-Doman Routng (CIDR) scheme allows for arbtrary aggregaton of networs to reduce the routng table entres []. In the way of CIDR, each IP route s dentfed by a <route prefx, prefx length> par, where the prefx length s n the range between and 32 bts ( stands for default route). When an IP pacet s receved, the IP router computes whch of the prefxes n ts forwardng database has the longest match when compared to the destnaton IP address n the pacet. The pacet s then forwarded to the output ln assocated wth that prefx. For example, a forwardng database may have the entres <.2/6>, <.2.6/24>, and <.2.6.6/32>. An IP address.2.5. has longest prefx matchng wth the frst entry. On the other hand, an IP address has longest prefx matchng wth the last entry. Recently, several fast routng looup mechansms have been proposed [3], [4], [5], [6], [7], [], [2], [3]. For example, a novel forwardng table structure s desgned for quc routng looups by Degermar, Brodn, Carlsson, and Pn [3]. The forwardng tables are very small such that a large routng table wth 4, entres can be compacted to a forwardng table of 5-6 Kbytes. Ths s a software-based soluton. If n hardware mplementaton, the mnmum and maxmum number of memory accesses for a looup s 2 and, respectvely. Gupta, Ln, and McKeown presented fast routng looup schemes based on the huge DRAM [5]. The maxmum number of memory accesses for a looup s 2 wth a forwardng table of 33Mbytes. By addng an ntermedate length table, the forwardng table can be reduced to Mbytes, but the maxmum number of memory accesses for a looup s ncreased to 3. When mplemented n a ppelned fashon n hardware, the proposed schemes can acheve one route looup every memory. Ths furnshes about 2 mllon looups per second. Waldvogel, Varghese, Turner, and Plattner proposed a looup scheme based on the bnary search mechansm [3]. Ths scheme scales very well as address and routng table szes ncrease. It requres a worst case tme of log 2 (address bts) hash looups. Thus, 5 hash looups are needed for IPv4 and 7 for IPv6 (2-bt) [2]. Ths software based bnary search wor s further mproved by employng the cache structure and usng the multway and multcolumn search [6]. For a database of N prefxes wth address length W, the natve bnary search scheme taes O(W*logN) searches. Ths mproved schemes taes only

2 O(W+logN) searches. These software based bnary search schemes are not easy to be mplemented n hardware. Ths paper presents a fast longest prefx matchng mechansm for IP swtchng routers that only needs tny RAM and can be mplemented n a ppelned sll n hardware. d on the proposed scheme, the forwardng database s tny enough to ft n RAM wth very low cost. For example, a large routng table wth 4, routng entres can be compacted to a forwardng table of Kbytes wth the cost less of U$3. Most of the address looups can be done by a memory access. In the worst case, the number of memory accesses for a looup s three. When mplemented n a ppelne sll n hardware, the proposed mechansm can acheve one routng looup every memory access. Wth current ns RAM, ths mechansm furnshes approxmately mllon routng looups per second. Ths s much faster than any current commercally avalable routng looup schemes. The rest of the paper s organzed as follows. The archtecture of the Mult-ggabt swtchng router and the forwardng engne are ntroduced n ecton 2. The proposed longest prefx matchng scheme s presented n ecton 3. The hardware mplementaton and the performance analyss of the proposed scheme are descrbed n ecton 4 and ecton 5, respectvely. Fnally, a concluson remar s gven n ecton 6. number) where the pacet should be forwarded. The MAC address substtuton module then substtutes the source MAC address and the destnaton MAC address of the pacet before t s forwarded nto the nterface port. The source MAC address s replaced by that of the output nterface, and the destnaton MAC address s replaced by that of the mmedate next hop (a router or the destnaton host). The bottlenec of the forwardng engne s the route looup and we wll focus on the desgn and hardware mplementaton of fast looup scheme. CPU wtchng Fabrc.. Ln Interfaces Forwardng Engne Fg.. Archtecture of Ggabt IP swtchng router. II. GIGABIT IP WITCHING ROUTER ARCHITECTURE The archtecture of the Ggabt IP swtchng router s schematcally shown n Fg., where a number of ln nterfaces, a CPU module, and a forwardng engne are nterconnected wth a swtchng fabrc. The forwardng engne employs a forwardng database, a local verson of the routng table, downloaded from the CPU module to mae the routng decson. Although routng updates may occur frequently, t s not necessary to download a new forwardng database for each routng update. Ths s because the routng protocols, such as RIP and OPF, need tme n the order of mnutes to converge, and the forwardng tables can grow a lttle stale and need only be updated once per few seconds. The CPU module executes the routng protocols, such as RIP and OPF, and needs a dynamc routng table for fast updates and fast generaton of forwardng databases. On the other hand, t s better to optmze the forwardng database to furnsh fast looups. Ths also mples that the forwardng databases need not be dynamc. 32 Bts External Data Bus 32 Bts Internal Data Bus Header Verfcaton Route Looup IP TTL Decrement and Checsum Update WBE Bottlenec of Forwardng Engne The archtecture of the forwardng engne (FE) s shown n Fg. 2. For an ncomng IP pacet, the route looup process (based on the destnaton IP address of the pacet), header verfcaton, and header update are ntated smultaneously. If the IP header s not correct, the pacet s dropped and the looup s termnated. Otherwse, the header s updated nto the pacet header (TTL decrement and checsum update) and the route looup module wll provde the next hop (port //$. (c) IEEE B MAC Address ubsttuton Fg. 2. Archtecture of FE wth super-scalar and ppelne desgn.

3 III. IP ROUTING LOOKUP CHEME The most straghtforward looup scheme s to have a forwardng database n whch an entry s desgned for each 32-bt IP address as shown n Fg. 3. Ths desgn needs only one memory access for IP address looup but the sze of forwardng database (next hop array) s too huge (2 32 = 4 GB) [5]. To reduce the sze of forwardng database, the sll of ndrect looup shown n Fg. 4 can be employed [5]. Each IP address s parttoned nto two parts: segment (6-bt) and offset (6-bt). The segmentaton table s wth the sze of 64K entres (2 6 ) and each entry (32-bt) records ether the next hop (port number, value < 256) of the routng or a ponter (value > 255) ponts to the assocated (NHA). Each NHA conssts of 64K entres (2 6 ) and each entry (-bt) records the next hop (port number) of the destnaton IP address. Thus, for a destnaton IP address a.b.x.y, the a.b s used as the ndex of the egmentaton Table and the x.y s employed as that of the assocated NHA, f necessary. Thus, for a segment a.b, f the length of the longest prefx belongs to ths segment s less than or equal to 6 (the segment length), then the correspondng entres of the egmentaton Table store the output port drectly, and the assocated NHA s not necessary. On the other hand, f the length of the longest prefx belongs to ths segment s greater than 6, then an assocated 64KB NHA s requred. In ths desgn, the maxmum number of memory accesses for an IP address looup s two. In [5], the segment length s of 24-bt and therefore a 6 Mbytes segmentaton table s requred. Although the ndrect looup scheme furnshes fast looup (up to 2 memory access), t does not consder the dstrbuton of the prefxes belongs to a segment. A 64KB NHA s requred as long as the length of the longest prefx belongs to ths segment s greater than 6. We now show our dea that by consderng the dstrbuton of the prefxes wthn a segment, we can further reduce the sze of the assocated NHA as shown n Fg. 5. Agan, the IP address s stll parttoned nto segment (6-bt) and offset ( 6-bt). The segment s also 6-bt and the egmentaton table s wth the sze of 64K entres, each one (32-bt) s dvded nto two felds: ponter/next hop (2-bt) and offset length (4-bt). The frst feld records ether the next hop (port number, value < 256) of the routng or a ponter (value > 255) ponts to the assocated NHA. The second feld ndcates the length of the offset ( bts, < 6). For offset of -bt length, the assocated NHA s wth the sze of 2 entres. Remember that for the ndrect looup mechansm [5], the offset s always of length 6. Now, for each segment, the offset length ndcates how many entres are needed n the assocated NHA. Ths depends on the prefxes of the segment. Thus, for segment a.b, assume there are m prefxes and the longest one s of length 32 l > 6, then the offset length for ths segment s l-6. Ths also means that for a destnaton IP address a.b.x.y, the a.b s used as the ndex of the egmentaton Table and the left most bts of x.y (from 6-th bt to (6+-)-th bt) s employed as that of the assocated NHA, f necessary. Actually, t depends on the set of prefxes of the segment as well as the length of each prefx. We now descrbe the mechansm to construct the NHA of a segment. Let l and h denote the length and the next hop (output port) of a route prefx p, respectvely. Let o = l 6 and = max{ o p P } ( NHA s of sze 2 ). Let P = {p, p,, p m- } be the set of sorted prefxes of a segment. Thus, for any par of prefxes p and p, < f and only f l l. For each prefx p n P, let and E denote the data structure of the start pont and end pont of p, respectvely, that should be forwarded to h. Wthout loss of generalty, let ma( ) and ma( E ) stand for the memory address of and E n the NHA, respectvely. Also let op( ) and op( E ) stand for the output port of destnaton addresses of start pont and end pont, respectvely. Assume p = a.b.x.y. Let x,x,x 2,,x 5 denote the bnary form of x.y, s,s,s 2,,s - denote the start pont mas, where s =, < o, and s =, o., and e,e,e 2,,e - denote the end pont mas, where e =, < o, and e =, o., Then we have ma( ) = (x,x,x 2,,x - AND s,s,s 2,,s - ) and ma( E ) = (x,x,x 2,,x - OR e,e,e 2,,e - ). For example, assume p = a.b.5., l = 26, and = 2 (the longest prefx n ths segment s of length 2). Then the bnary form of 5. (-bt) =, s,s,s 2,,s - =, and e,e,e 2,,e - =. We have ma( ) = = 2 and ma( E ) = = 3. Ths also means that NHA = h, ma( ) ma( E ). Pont to.. Fg. 3. Drect looup mechansm. 6 Bts 6 Bts IPv4 Address egment.. 32 Bts IPv4 Address Drectly pread for Exactly Matchng.. (4 GB) egment egmentaton Table (64K Entres)... Format Ponter/ 32 Bts.. Value < 256 ==> (Wthout NHA) Value > 255 ==> Ponter.. The ey pont of ths desgn s the constructon of the NHA. Fg. 4. Indrect looup mechansm //$. (c) IEEE

4 Pont to ( ) ( ).. 2 Fg. 5. Indrect looup mechansm wth varable offset length. We note that for each prefx p n P, we can fnd a par of and E. The memory addresses between ma( ) and ma( E ) can be depcted as an nterval [ma( ), ma( E )], and the set P of prefxes can be presented as a set of ntervals. If all the ntervals are not overlappng to each other, then we can construct the NHA drectly by settng NHA = h, ma( ) ma( E ). However, n most cases, ths may not 6 Bts IPv4 Address egment.. 2 egment egmentaton Table (64K Entres). ( 3 ) Bts () be true. An overlap stands for that for a destnaton IP address, we have more than one matchng. But remember what we are loong for s the longest matchng. Thus, f a memory address belongs to a set P of ntervals smultaneously, then we should set NHA = h, where p s the longest prefx of P. For example, assume each route prefx s presented by prefx/prefx length/next hop (output port). Then the set P of sx sorted prefxes {2.6/6/, 2.6.5//2, 2.6.2/24/, /26/3, /2/5, /32/} can be presented as the sx ntervals 6- Bts Remander Bts ( ) Value < 256 ==> (Wthout NHA) Value > 255 ==> Ponter Format Ponter/ 2 Bts 4 Bts to ndcate length ( +2 ) shown n Fg. 6(a). The correspondng constructed NHA s gven n Fg. 6(b). Now, let us consder another example where we have three prefxes on a segment: p =./6/, p =..5/2/2, and p 2 =..6/24/3. nce the longest prefx s of length 24, the offset length equals to 24-6 = (record as n the offset length feld). Then the NHA for ths segment s of sze 2 = 256 entres. Moreover, we have ma( ) = =, ma( E ) = = 255, ma( ) = = 4, ma( E ) = = 63, ma( 2 ) = = 6, ma( E ) = = 6. Therefore, NHA ~NHA 47 =, 2 NHA 4 ~NHA 63 = 2, NHA 64 ~NHA 67 =, NHA 6 = 3, and NHA 6 ~NHA 255 =. For destnaton IP address...4, the offset s, and the output port can be found n NHA =. For destnaton IP address..6.4, the offset s 6, and the output port can be found n NHA 6 = 3. Consder another extreme case where we have two sorted prefxes for a segment: p =.7/6/ and p =.7.2./32/2. nce the longest prefx s of length 32, the offset length equals to 32-6 = 6 (record as n the offset length feld). Then the NHA for prefx.7 has 2 6 = 64K entres. In ths case, we have ma( ) = =, ma( E ) = = 65535, ma( ) = ma( E ) = = 32. Thus, we have NHA ~NHA 3 =, NHA 32 = 2, and NHA 33 ~NHN =. For destnaton IP address.7.2., the offset s 32, and the output port can be found n NHA 32 = 2. For destnaton IP address.7.x.y, x,y 255, except.7.2., the offset q s (x 256+y), and the output port can be found n NHA q = /32/ p /2/5 p /26/3 p /24/ p 2 p 2.6.5//2 2.6/6/ p 3 5 E 3 E 2 E 2 4 E E 5 E 4 ma( )=, ma(e )= ma( )=, ma(e )=633 ma(2 ) = 23552, ma(e2 )= 237 ma(3 ) = 44, ma(e3 )=4 ma(4 ) = 6552, ma(e4 ) = ma(5 ) = 44, ma(e5 ) = ± (a) Interval presentaton of P (b) Constructed NHA Fg. 6. NHA constructon example //$. (c) IEEE 65535

5 The formal algorthm for constructng the NHA of a segment s gven as follows. Algorthm NHA-Constructon Input: The set of route prefxes of a segment; Output: The correspondng NHA of ths segment. tep. Let l and h be the length and output port of a route prefx p, respectvely. tep 2. Let P = {p,p,,p m- } be the set of sorted prefxes of a segment. Thus, for any par of prefxes p and p, < f and only f l l. tep 3. Let = l m- -6 /* The sze of NHA s 2 */ tep 4. For each prefx p n P, calculate and tep 5. For = to m- do NHA = h, ma( ) ma( E ); tep 6. top E. In the worst case, the number of memory accesses for an IP address looup s stll two for ths desgn, but the total amount of memory requred s reduced sgnfcantly. The forwardng database structure (NHAs) shown n Fg. 5 can be further mproved by employng the concept of compresson. Thus, for each segment wth offset length > 3, the assocated NHA can be replaced by a Code Word Array (CWA) and a compressed NHA (CNHA). To construct the CWA, we employ the technque of compresson bt map (CBM), one bt for each entry n the orgnal NHA. The compresson rule s as follows. Let a denote the value (port number) of the -th entry of the NHA, b stand for the correspondng bt n the CBM, and c denote the value (port number) of the -th entry of the CNHA. Intally, c = a, b =, and =. Then scan the NHA from left to rght. If a + = a, then b + =, else b + =, c = a +, and = +. For example, the NHA shown n Fg. 7(a) can be compressed nto the correspondng CBM and CNHA as shown n Fg. 7(b) (a) An NHA example Compresson Bt Compressed (b) The correspondng CNHA and CBM Fg. 7. NHA compresson example. Actually, the CBM and CNHA of a segment can be constructed drectly wthout constructng the NHA frst. The algorthm to construct the CBM and CNHA drectly from the gven prefxes of a segment s depcted as follows. Before startng, we need to note that for any two dstnct prefxes n a segment, ether one s completely contaned n the other, or the two dstnct prefxes have no entres overlappng wth each other [5]. Algorthm CBM/CNHA-Constructon Input: The set P = {p,p,,p m- } of sorted route prefxes of a segment and L = {, E,, E,,, E }. m m Output: CBM and CNHA. tep. ort L by memory address n the segment. For dentcal memory addresses, eep ther order the same n L. tep 2. Let A = φ and stac C = φ. tep 3. Process the elements n L from left to rght and for each element do Begn If the selected element s a start pont then Push n C. Append n A. Else /* It s an end pont E */ Begn Remove top element from stac C. If the top of stac C s then Begn Append + n A, + where op( ) = op( ), + ma( ) = ma( E )+. Replace the top of stac C by End Else /* tac C s φ */ Do nothng. End End tep 4. Compact A such that for consecutve elements +. and q p, remove q from A f ma( ) = ma( p ), q q remove p from A f op( ) = op( p ). tep 5. Remove each element from A whose ma( ) > ma( E ); tep 6. For = to A - do /* A s the number of elements n A */ Begn Let End tep 7. top be the -th element n A ; CBM p = ; where p = ma( ); CNHA = op( ) //$. (c) IEEE

6 The tme complexty of the proposed algorthm s O(nlogn), where n s the number of prefxes n a segment. nce ths algorthm constructs the CBMs and CNHAs drectly from the gven prefxes, the forwardng table can be bult n a very short tme. The CBM should be encoded as a sequence of code words (Code Words Array, CWA) as follows. Each code word conssts of a map (6-bt) and a base (6-bt). The CBM s treated as a bt-stream and been parttoned nto a sequence of 6-bt maps. Then these maps are put nto the code words, one for each code word, sequentally. The base of each code word equals to the number of s accumulated n the maps of prevous code words. For example, the CBM shown n Fg. 7(b) s encoded as the code words depcted n Fg.. The maps of the frst two code words are and, respectvely. For the frst code word, the base has a value of zero. For the second code word, snce the number of s accumulated n the maps of prevous code words s two, we have a base value of two. The base s used to ndcate the start entry of the assocated CNHA. Thus, for an offset value q, the output port can be computed as follows. Let cw s = map s + base s be the code word contans ths offset, where s = (q DIV 6). Let w = (q MOD 6) denote the correspondng bt of q n map s and w stand for the number of accumulated s from the th bt to the w-th bt of map s. Then the output port of an offset value q s calculated as op q = CHNA t, where t = base s + w -. For example, consder the case shown n Fg. 7 and agan. For offset q =, we have s =, w =, and w = 2, then t = (base + w -) = +2- = and the correspondng output port s CNHA = port. For offset value q = 25, we have s =, w =, and w =, then t = (base + w -) = 2+- = 2 and the correspondng output port s CNHA 2 = port 7. To update the forwardng table, we can ether rebuld a new one n a short tme or through specal hardware desgn, such as dual-port memory or dual-memory bans. IV. HARDWARE IMPLEMENTATION The hgh-level hardware mplementaton of the proposed looup scheme s shown n Fg.. Frst of all, the frst 6 bts (bts ~5) of an ncomng IP address are used as an ndex of the egment Table (64K entres, each wth a length of 24 bts). The correspondng entry of the egment Table records ether the next hop (the value of left 2 bts < 256) of ths destnaton IP address, or a ponter (2-bt), ponts to the startng address of the CWA, and an offset length (4-bt). For each segment, f the offset length > 3, then we need to decode the CNHA by searchng the CWA (wth 2-4 entres) and fndng the assocated code word. From ths code word, we have the map and base. nce the CNHA s placed mmedately follows the CWA, the startng address of CNHA equals to ponter An adder s desgned here to add ths wth base and w. If 3, then the bts, startng from the 6-th bt of the destnaton IP address, are used as the ndex of the NHA (wth 2 entres) to fnd the output port. The value of w can be computed by a parallel adder. For example, assume for a segment wth offset length = and we have a destnaton IP address a.b.5.y wth offset of 5. Then we should loo at the s-th code word, where s = 5 DIV 6 =. Assume the map of ths code word s, then the bt poston for ths offset s 5 MOD 6 = 4. Let B denote the bt stream from the -th bt to -th bt of an IP address and V ( B ) stand for the value of bt stream B. To compute the value of w, we can frst + 2 mas the rght 6- V ( B + 5 ) - bts of the code word nto zero and then calculate the number of s n ths mased code word by the parallel adder n constant tme. For the current AIC technology, ths can be done n ns. We note that the wdth of the code word s 32-bt and s dentcal to that of the data bus. Ths means we only need a memory access to obtan a code word n the CWA. For a destnaton IP address a.b.x.y, we frst use a.b ( V ( B 5 )) as the ndex of the segmentaton table. If the offset length of ths segment s less than or equal to 3, then we get the output port from the NHA drectly. Ths s the case for two memory accesses. If the offset length s greater than 3, then we use 6 ponter+ V ( B + ) as the ndex of the CWA to get the correspondng code word. d on the obtaned map and base, we fnally get the output port on the CNHA. Thus, n ths hardware mplementaton, the maxmum number of memory accesses for a looup s three. Let us use an example to show how the forwardng table (CBMs, and CNHAs) s constructed n ths mplementaton. Assume the routng table contans entres (262 segments) as shown n Fg.. The correspondng egment Table and three CWAs/CNHAs for prefxes 4.5, 4., and 6.5, respectvely are also shown n Fg.. A null value n the CNHA means that the correspondng IP pacets should be forwarded to the default router. Code Word 6 Bts 6 Bts Code Word Array Compressed Fg.. Code Word Array example //$. (c) IEEE

7 Ponter/ eg. Table Length - 2 Bts 4 Bts + 2 m = 6- V ( B )- + 5 Dstn. Addr. 5 V ( B 5 ) 2 6 V ( 6 B +5 ) Ponter+2-4 x4- Yes Ponter Yes + 6 V ( B + ) 6 Bts 2-4 > 3 Code Word Array Mas m Bts 6 Bts Parallel Adder Adder Compressed Array Bts elector +5 No 3 Entry Format of egmentaton Table Ponter/ 2 Bts 4 Bts to ndcate length - V ( 6 B +5 Value < 256 ==> (Wthout CWA/CNHA) Value > 255 ==> Ponter ) Array 2 n Bts Routng Table Prefx Length Port egmentaton Table egment ID Ponter/ Length Null Null PonterA PonterB Fg.. Hardware mplementaton of the proposed looup scheme PonterC 4.2 Null Bts 6 Bts 6 Bts 6 Bts Bts 6 Bts Null Null 6.5 PonterD 3 V. PERFORMANCE ANALYI To evaluate the performance of the forwardng tables constructed by the proposed looup scheme, a number of IP routng tables were collected and nvestgated. The Internet routng tables avalable at the web ste for the Internet Performance Measurement and Analyss (IMPA) proect are referred [,]. For the purpose of comparson, two looup schemes, DIR-24- and DIR-2-3-, proposed by Gupta, et al., [5], and the small forwardng table looup scheme (denoted as FT scheme), proposed by W. Degermar, et al., [3], are also nvestgated. Fg.. Forwardng table example //$. (c) IEEE The performance comparson for these dfferent looup schemes s shown n Table 2. The forwardng table constructed by the FT scheme s the smallest one, and can be mplemented n the RAM. However, the mnmum and maxmum number of memory accesses for an IP address looup s two and nne, respectvely. Ths may not be good enough for ggabt swtchng routers. The mnmum and maxmum number of memory accesses for an IP address looup contrbuted by the DIR-24- scheme s one and two, respectvely. Ths s pretty good for the hgh-speed ggabt swtchng routers. Nevertheless, the forwardng table constructed by ths scheme s of sze 33 Mbytes, the largest

8 one among these schemes. The DIR-2-3- scheme reduces the forwardng table to Mbytes by employng an ntermedate table, but the maxmum number of memory accesses for a looup s up to three. Bascally, the desgn of these two schemes tends to support up to 4, segments wth long prefxes (length > 24). If ths s not requred, then the memory requred can be reduces to 6 Mbytes and Mbytes, respectvely. Due to the usage of huge memory, ths scheme s not easy to put the forwardng table n the faster RAM wth low cost. The looup scheme proposed n ths paper also ntroduces a small forwardng table (45Kbytes ~ 47 Kbytes). Moreover, most of the looup can be fnshed by only one memory access. In the worst case, the number of memory accesses requred for a looup s three. Actually, when mplemented n a ppelne sll n hardware, the proposed mechansm can acheve one routng looup every memory access. Ths small forwardng table s very sutable to be mplemented n faster RAM. Wth current ns RAM, ths mechansm furnshes approxmately 6 routng looups per second. The mplementaton cost s also very compettve. Wth 52 Kbytes RAM, only about U$3 s enough. We note that the forwardng table sze s depends on the number of route prefxes as well as the length dstrbuton of these prefxes. For the DIR-24- and DIR-2-3- looup schemes, an NHA of sze 2 entres (bytes) s needed f the length of the longest prefx n a segment s greater than 24. Thus, the forwardng table sze s hghly depends on the number of segments, each of whch contans at least one long prefx (length > 24). For the FT looup scheme, a specal compressed NHA of sze 2 entres s needed f the length of the longest prefx n a segment s greater than 6. In our proposed looup scheme, a CWA and a CNHA are needed f the length of the longest prefx n a segment s greater than 6 and offset length > 3. But the sze of the CWA equals to bytes, where s the length of the longest prefx n the segment, and the sze of the CNHA equals to the number of non-zero bts n the CWA. To show the performance of these dfferent looup schemes under more extreme cases, we consder a routng table of 4, route prefxes (randomly generated) and 4, dstnct segments contan at least one long prefx (length > 24). Table 3 shows the memory requred by dfferent looup schemes under ths envronment. We can see that the forwardng tables constructed by the DIR-24- and DIR-2-3- looup schemes for ths routng table are 33 Mbytes and Mbytes, respectvely. Ths s because these two looup schemes tend to furnsh up to 4, segments wth long prefxes (length > 24) and are ndependent upon the dstrbuton of the prefxes. The forwardng table produces by the FT scheme s around 5Kbytes ~ 6Kbytes. That for our scheme s of.5 Mbytes ~ 2 Mbytes. Ths s because both the FT scheme and our scheme tae nto account the dstrbuton of the prefxes. VI. CONCLUION Ths artcle ntroduces a novel route looup mechansm that only needs tny RAM and can be easly mplemented n hardware. d on the proposed scheme, the forwardng table s tny enough to ft n RAM wth very low cost. For example, a large routng table wth 4, routng entres can be compacted to a forwardng table of Kbytes wth the cost of less U$3. Most of the address looups can be done by a memory access. In the worst case, the number of memory accesses for a looup s three. When mplemented n a ppelne sll n hardware, the proposed mechansm can acheve one routng looup every memory access. Wth current ns RAM, ths mechansm furnshes approxmately 6 routng looups per second. Ths s much faster than any current commercally avalable routng looup schemes. d on the proposed algorthm, the CBM and CNHA of a segment can be constructed n O(nlogn) tme; where n s the number of prefxes n the segment. Ths provdes an opportunty to update the forwardng table n a quc and effcent way. nce the forwardng table can be constructed n a short tme, we can ether rebuld a new one when necessary or employ the hardware of dual-port memory or dual- memory bans. Table II PERFORMANCE COMPARION OF DIFFERENT LOOKUP CHEME. Loo up cheme No. of memory accesses (Mn/Max) Forwardng Table ze Implemented n RAM Our cheme /3 45KB ~ 47 KB Yes DIR-24- /2 33MB No DIR-2-3- /3 MB No FT 2/ 5KB ~ 6KB Yes Table III MEMORY REQUIRED TO UPPORT 4, EGMENT WITH LONGET PREFIXE Loo up cheme Our cheme DIR-24- DIR-2-3- FT (24 < LENGTH 32). Forwardng Table ze.5 MB ~ 2MB 33MB MB 5KB ~ 6KB REFERENCE [] F. Baer, ed. Requrements for IP Verson 4 Routers. RFC 2, June 5. [2]. Deerng and R. Hnden. Internet Protocol, Verson 6 (Ipv6) pecfcaton. Request for Comments (Proposed tandard) RFC 3, Internet Engneerng Tas Force, January 6. [3] M. Degermar, A. Brodn,. Carlsson, and. Pn. mall Forwardng Tables for Fast Routng Looups. ACM IGCOMM 7, Palas des Festvals, Cannes, France, pp [4] W. Doernger, G. Karoth, and M. Nasseh, Routng on Longest- Matchng Prefxes, IEEE/ACM Transactons on Networng, Vol.4, No., February 6, pp.6-7. [5] P. Gupta,. Ln, and N. McKeown. Routng Looups n Hardware at Memory Access peeds. IEEE INFOCOM, an Francsco, Aprl, esson B-. [6] B. Lampson, V. rnvasan, and G. Varghese, IP Looups usng Multway and Multcolumn earch, IEEE INFOCOM, an Francsco, Aprl, esson B-2. [7] A. McAuley, P. Francs. Fast Routng Looup Usng CAMs. Proc. IEEE INFOCOM 3. [] T. Pe and C. Zuowa. Puttng Routng Tables n llcon. IEEE Networ Magazne, January 2. [] Y. Rehter, T. L, An Archtecture for IP Address Allocaton wth CIDR, RFC 5, eptember 3. [] The Routng Arbter Proect. Internet routng and networ statstc. [] Mchgan Unversty and Mert Networ, Internet Performance Measurement and Analyss (IPMA) Proect, [2] tanford Unversty Worshop on Fast Routng and wtchng, December 6. [3] M. Waldvogel, G. Varghese, J. Turner, B. Plattner. calable Hgh peed IP Routng Looups. ACM IGCOMM 7, Palas des Festvals, Cannes, France, pp //$. (c) IEEE