DESIGN, MODELING AND IMPLEMENTATION OF ZIGBEE TRANSRECEIVER USING VHDL

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1 1038 DESIGN, MODELING AND IMPLEMENTATION OF ZIGBEE TRANSRECEIVER USING VHDL 1 AKSHAY GARG, 2 RITESHGOEL 1 M.Tech Scholar, 2 Assistant Professor, Department of Electronics & Communication Engineering, Kurukshetra Institute of Technology & Management, Kurukshetra University, Kurukshetra, India akshay.garg119@gmail.com ABSTRACT The research paper focuses on the introduction of Zigbee wireless technology, topologies of Zigbee technology and designing of Zigbee Transreceiver chip using VHDL programming language. The emergence of wireless interface devices has created a strong demand for low-data-rate short-range wireless networking. This has led to the development of Zigbee standard, which is a set of new communication protocols for wireless transmission. The Zigbee standard is developed by the Zigbee Alliance, which has hundreds of member companies, from the semiconductor industry and software developers to original equipment manufacturers (OEMs) and installers. The paper emphasis mainly on the VHDL programming implementation of Zigbee transreceiver chip in Xilinx ISE software and functional simulation in Modelsim 10.1 b software. Keywords:Very High Speed Integrated Circuit Hardware Description Language (VHDL), Integrated System Environment (ISE), Institute of Electrical and Electronics Engineering (IEEE) 1. Introduction Zigbee is under the IEEE protocol, IEEE It is a part of the IEEE family of standards for the physical and link layers for Wireless Personal Area Networks (WPANs). The main focus of IEEE is low data rate WPANs, with low complexity and low power consumption requirements. IEEE uses device classification to reduce the complexity of the nodes. The standard classifies two types of devices to reduce complexity, a full function device (FFD) and a reduced function device (RFD). The RFD can only communicate with FFDs, but the FFD can communicate with both FFDs and RFDs. The IEEE supports two Physical Layer (PHY) options. The 868/915MHz PHY known as low-band uses binary phase shift keying (BPSK) modulation whereas the 2.4 GHz PHY (high band) uses Offset Quadrature Phase Shift Keying (O-QPSK) modulation. The IEEE standard also uses two types of channel access method depending upon network configuration. When non-beacon mode is enabled the network uses an un-slotted carrier sense multiple access with collision avoidance (CSMA-CA) channel access method. The beacon method uses an optional slotted CSMA-CA channel access method. The superframe structure is only used in beacon mode. In non beacon mode superframe structure is disabled and nodes compete for channel access via CSMA/CA. The superframe is divided into 16 slots, the first slot contains the transmitting beacon and the other 15 slots are used for node communication. Coordinator node defines the structure of the superframe, with two sections: Connection Access Period (CAP) and Connection Free Period (CFP). The basic superframe structure is shown in figure 1. In a larger network, when the traffic volume is higher, most of the time slots are used for CAP, not for CFP [6]. Therefore this mode is not suitable for a network which involves a larger number of nodes.a non beacon network is more useable than the beacon enabled network. The Media Access Control (MAC) of the non-beacon mode is contention based CSMA/CA. Therefore typically most of the receiver nodes are continuously active. This requires a more robust power supply, but it allows for networks where nodes can receive and transmit data continuously. For larger networks like this vineyard monitoring system, the non beacon mode enabled network is more suitable. Fig. 1:IEEE Superframe Structure [7]

2 Topologies of Zigbee IEEE networks can be separated into two main topologies, star and peer-to-peer. A variation of peerto-peer allows a third topology, which is called cluster tree. Compared to the other two topologies, the star topology has the most structured configuration. The Personal Area Network (PAN) coordinator node always sits in the centre of the network Fig. 2: Star Network TopologyFig. 3: Peer-to-Peer Topology All the other nodes need to communicate via the PAN coordinator node. The PAN Coordinator node relays messages to other nodes in the network. Direct intercommunication between other nodes is not allowed as shown in figure 3. The cluster tree topology is a special case of the peer-to-peer topology. This based on RFDs only can communicate with FFDs. Majority of devices in cluster trees are FFDs as shown in figure 4. Fig. 4:Cluster Tree Topology The Zigbee Alliance was formed in 2002 as a nonprofit organization open to everyone who wants to join. The Zigbee standard has adopted IEEE as its Physical Layer (PHY) and Medium Access Control (MAC) protocols. Hence, a Zigbee device is compliant with the IEEE standard a well. The PHY layer supports three frequency bands: a 2.45 GHz band with 16 channels, a 915 MHz band with 10 channels, and an 868 MHz band with 1 channel. However, this research paper will only be focused on 2.45 GHz band which is used worldwide, with the data rate of 250 kbps. The MAC layer defines two types of nodes: Reduced Function Devices (RFDs) and Full Function Devices (FFDs). RFDs can only act as end-devices and are equipped with sensors or actuators like transducers, light switches and lamps. They may only interact with a single FFD [7, 8]. FFDs are equipped with a full set of MAC layer functions, which enables them to act as a network coordinator or a network end-device [1, 4]. Two main type of Zigbee networking topologies are star and peer-to-peer. In the star topology, every device in the network can communicate only with the personal area network (PAN) coordinator. A FFD takes up a role as PAN coordinator; the other nodes can be RFDs or FFDs. In the peer-to-peer topology, each device can communicate directly with any other device if the devices are close enough together to establish a successful communication link. Any FFD in this topology can play the role of the PAN coordinator [8]. The IEEE defines four MAC frame structures: beacon, data, acknowledgment, and MAC command frames. The beacon frame is used by a coordinator to transmit beacons. The function of beacons is to synchronize the clock of all the devices within the same network. The data frame is used to transmit data.

3 1040 Meanwhile, the acknowledgement frame is used to confirm successful frame reception [1, 8]. The MAC commands are transmitted using a MAC command frame.the Zigbee digital transmitter is designed for an acknowledgment frame which is shown in Figure 5 based on IEEE standard. This is the simplest MAC frame format and does not carry any MAC payload. This frame is constructed from MAC header (MHR) and MAC footer (MFR). The frame control field and direct sequence number (DSN) form the MHR. The MFR is composed of 16-bit frame check sequence (FCS). Both MHR and MFR also known as PHY service data unit (PSDU), which becomes the PHY payload. The PHY payload is prefixed with the synchronization header (SHR), comprised of preamble sequence, start of frame delimiter (SFD), and PHY header (PHR). Together with the SHR, PHR and PHY payload form the PHY protocol data unit (PPDU). length of preamble sequence field is 4 octets. As for SFD, the length is 1 octet. The PHR also contains 1 octet. This is follows by the MHR and the MFR with 3 octets and 2 octets, respectively. Hence, the acknowledgment frame length is totally 11 octets. Fig. 5 The acknowledgment frame [24] Major applications of Zigbee focus on sensor and automatic control, such as healthcare, industrial control, home automation, remote control, and monitoring systems [8]. In healthcare, for example, a patient who is staying at home and wears a Zigbee device can be monitored by his physician continuously. The information of patient heart rate and blood pressure is transmitted over the IEEE network to a personal computer that the physician or nurse uses to monitor the patient. This system could help hospitals improve patient care and relieve hospital overcrowding by enabling them to monitor patients at home. At the industrial level, Zigbee mess networking can help in areas such as energy management, light control, process control, and asset management. As in home automation, the Zigbee system is used for security, meter-reading, irrigation, light control, and multizone heating, ventilation, and air-conditioning (HVAC) systems. Zigbee also can be used in wireless remote control for communication with televisions, DVDs, and other entertainment devices via infrared signals. For monitoring systems, Zigbee can be used to monitor hotel guest room access and fire extinguishers [1, 2]. The transmission range for Zigbee devices is m, based on the environment [5].The battery lifetime is up to 2-year [6]. The digital part of Zigbee transmitters can be designed either with schematic, Matlab, or veryhigh-speed integrated circuit hardware description language (VHDL). However, schematic is inappropriate for large designs, where more logic functionality is usually involved. Shuaib et al.[7] developed and simulated the transmitter design using Matlab. Unfortunately, this design has not yet been implemented. In contrast, Meng et al. has designed, implemented and tested the Zigbee receiver with a commercially available off-the-shelf Zigbee transceiver. The receiver was modeled by using VHDL and verified through Xilinx Virtex-4 LX60 fieldprogrammable gate array (FPGA). The receiver consists of carrier synchronization, IF down-conversion, filtering quadrature demodulation, chip synchronization, and dispreading blocks. 3. Transreceiver Architecture For 2.4 GHz-band Zigbee applications, sixteen channels are available with 5 MHz ample channel spacing. IEEE standard employs direct sequence spread spectrum (DSSS) that uses a digital spreading function representing pseudo-random noise (PN) chip sequences as shown in Table 1. The acknowledgment frame used in this paper contains 11 octets (88 bits) of physical protocol data unit (PPDU). Figure 6 shows the architecture of the proposed Zigbee digital transmitter. Binary data from the PPDU packet are inserted into the cyclic redundancy check (CRC) block to detect errors during transmission. CRC is the most preferred method of encoding because it provides very efficient protection against commonly occurring burst errors [2], and is easily implemented [3]. CRC s can detect all one bits and two bits errors as well as all odd number of bits in error [4, 8]. Since CRC is a technique for detecting errors, but not for making corrections when errors are detected, the whole packet data will be retransmitted if error occurs [5]. For Zigbee Standard, CRC involves a division of the transmitted packet data by a constant called the generator polynomial [1, 8]. In this paper, the CRC block contains the SHR, PHR

4 1041 and PHY payload. In the PHY payload, the FCS mechanism employs a 16-bit CRC in order to detect errors [1, 3]. The FCS is calculated over the MHR and MFR payload parts of the frame using the algorithm in figure 6. Table 1: Symbol-to-chip mapping using DSSS [8] Data Symbol (decimal) Data Symbol (binary) (b 0 b 1 b 2 b 3 ) Chip Values (c 0 c 1. c 30 c 31 ) Then, every four bits of each PPDU octet are mapped onto one data symbol. The mapping takes place in a bitto-symbol block. The 4 least significant bits (LSBs) (b0, b1, b2, b3) of each octet is mapped into one data symbol and the 4 most significant bits (MSBs) (b4, b5, b6, b7) of each octet is mapped into the next data symbol. Each octet of PPDU is processed through the bit-to-symbol block sequentially, beginning with the Preamble field and ending with the last octet of the PSDU. Fig. 6: Detailed architecture of the proposed digital transmitter. The proposed digital transceiver for Zigbee applications is shown in Fig. 7. The acknowledgment frames which is originated from MAC sub-layer is inserted into the CRC block. Then, every 4 bits are mapped into one data symbol in the bit-to-symbol block. The symbol-to-chip block performs the DSSS where each symbol is mapped into a 32-chip PN sequence. After that, these chips are processed by OQPSK modulator and the half-sine pulse shaping block to reduce inter-symbol interference. The resultant signal is transmitted and received by OQPSK demodulator, follows by chip synchronization and de-spreading blocks to regain the original data bits. A symbol-to-chip block follows, and utilizes a DSSS method to map each symbol to a unique 32-chip PN sequence [2]. The IEEE uses this method to improve the receiver sensitivity level and increase the jamming resistance [2]. The DSSS method is also necessary in improving receiver performance in a multipath environment because in most practical scenarios, the transmitted signal may find several different paths to the receiver due to reflections, diffractions and scatterings. These signals have different delays and phase shifts; therefore, the summation will be a distorted signal [7]. The signal quality may become poor and this can result in poor communication. Finally, OQPSK method is applied to the chips. Fig. 7: Detail block diagram of the proposed digital Zigbee transceiver [8]

5 1042 Fig. 8: Algorithms for FCS 4. Results &Discusssion The RTL view of the developed chip is shown in figure 9, which shows the al possible inputs and outputs of the chip and internal schematics, is shown in figure 10. Fig. 9 RTL view of Zigbee transreceiver Fig. 10:Internal architecture of Zigbee transreceiver Modelsim wave form output of Zigbee transreceiver The functional simulation depend on the test inputs in design Step input 1: reset =1, clk is used for synchronization and then run. Step input 2: reset =0, same clk is used for synchronization. Force the value of crc_data [87: 0] = 88 bits value and run we will get the data in data_symbol, chip_value0[31:0] of 32 bits to chip_value15[31:0] of 32 bits. Get result i_phase[15:0] and q_phase[15:0] of 16 bits. Device utilization and timing summary of Zigbee transreceiver block Selected Device: 2vp2fg256-7 Table 2: Device Utilization in Zigbee transreceiver block Device part Number of Slices Number of Slice Flip Flops Number of 4 input LUTs Number of bonded IOBs Number of GCLKs Utilization 141 out of % 239 out of % 72 out of % 93 out of % 1 out of 16 6%

6 1043 Fig. 11:Modelsim waveform of Zigbee transreceiver Timing Summary:Speed Grade: -7 Minimum period: 1.098ns (Maximum Frequency: MHz) Minimum input arrival time before clock: 4.381ns Maximum output required time after clock: 4.088ns Total memory usage is kilobytes Conclusion and future work The present research describes the VHDL based design and implementation of digital transmitter for 2.4 GHzband Zigbee applications. The behaviors of CRC, bit-to-symbol, symbol-to-chip, and OQPSK modulator were characterized using VHDL. These were then integrated to form the digital transmitter. The VHDL code was synthesized, simulated, and implemented successfully on Virtex 2P FPGA. A pattern generator and a logic analyzer were used to stimulate the input data of 72 bits and to measure output data, respectively. The functionality of the proposed transmitter matches its theoretical expectation. With VHDL, the transmitter design area could be reduced to a smaller scale. Implementing the design of Zigbee digital transmitter on ASIC using 0.18 μm technology process is intended in the near future. REFERENCES [1] Baronti. P, Pillai. P, Chook. VWC, Chessa. S, Gotta. A and Fun Hu. Y, Wireless sensor networks: A survey on the state of the art and the and Zigbee standards, Computer Communications, 30(2007): , 2007 Elseveir. [2] Lee. JS, Su. YW and Shen. CC, A comparative study of wireless protocols: Bluetooth, UWB, Zigbee and WiFi, Proceedings of the 33rd Annual Conference of the IEEE Industrial Electronics Society (IECON), 2007, [3] Webb. W, Wireless Communications: The future, John Wiley & Sons Ltd, England, [4] Shuaib. K, Alnuaimi. M, Boulmalf. M, Jawhar. I, Sallabi.F and Lakas. A, Performance evaluation of IEEE : Experimental and simulation results, Journal of Communications, 2, 4(2007): [5] Meng. T, Zhang. C and Athanas.P, An FPGA-based Zigbee receiver on the Harris software defined radio SIP, SDR Forum Technical Conference, Denver, Colorado, [6] Xilinx, Spartan3E FPGA Family: Complete Data Sheet, [7] Oualkadi. AE, Andendorpe. LV and Flandre. D, System-level Analysis of O-QPSK Transceiver for 2.4 GHz band IEEE Zigbee Standard, 14 th International Conference on Mixed Design, 2007, [8] R. Ahmad, O. Sidek, W. M. H. Wan Hassin Development of Verilog-Based OQPSK Demodulator for Zigbee Applications on FPGA European Journal of Scientific Research ISSN X Vol.64 No.4 (2011), pp [9] Shukla. S and Bergmann.NW, Single bit error correction implementation in CRC-16 on FPGA, Proceedings of IEEE International Conference on Field-Programmable Technology 2004,