SD Technology and Ultra High Speed Interface (UHS-II)

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1 SD Association. All rights reserved. SD Association SD Technology SD Technology and Ultra High Speed Interface (UHS-II) and & Test Guideline Ultra High Speed Interface (UHS-II) SD Association SD Association November 20-22, 2013 November 22, SDA 2013 Booth SDA Workshop Presentation

2 SD Association. All rights reserved. SD Association 1 Agenda Today s Presentation 1. SD Standard Overview SD 標準規格概要 2. SD Specification Overview SD 規格仕様概要 3. UHS-II Test Guideline UHS-II テストガイドライン 4. SD Association Booth Topics SDAブース内紹介

6 SD Association. All rights reserved. SDA Organization SD Association: SDA ( Open Standard/ SD Card Standardization Promotion and Adaption of SD Standard Worldwide Board of Directors Financial Committee License Committee Planning Ad-hoc Committee GP Ad-hoc Committee Technical Committee Compliance Committee Marketing Committee Physical Specification File System Security Application SDIO Host Controller Test Guideline Test Tools Interoperability Market Inspection Compliance News Designated Labs Logo Guideline SDA Public Web Site SDA Brochure Press Release Promotional Exhibition Promotional Seminar Member Recruitment Global Workshop Eco-System Committee Industry Collaboration SDA Outreach and Awareness Provides strategy, guidance, and priorities for future SDA specs based on market needs Organization Established in 2000 Member Company : More than 1,000 Companies Worldwide (as of August 2013) #1 Market Share in small size memory card in the world Member Fee: Executive Member $4,500/yr, General Member $2,000/yr

SD Standard Direction for High Speed Interface SD

9 SD Association. All rights reserved. SD Association 8 Market Evolution Driving UHS-II High Capacity / High Speed Drivers High speed Download/Upload 4K DSLR/Video 4K Smart Phone 4K Video Recording (4K videos) 4K Tablet 4K Recorder Matching Internal Data I/O Light Field Lenses Computational Photography microsd Caching streamed content Eliminates bandwidth latency When no internet access available

12 SD Association. All rights reserved. SD Association 11 SD Specifications Structure SD Applications smartsd SDIO Part 4 SD-Audio Part 8 SD-Video Part 15 Separate Delivery Other Applications Picture, Map, Binding... Part 2 SD File System Part 1 Physical Layer Electrical Spec. Bus Signal Timing UHS-I mode Part 3 CPRM Security Mechanical Spec. Standard Size SD Card Addendum microsd Card Addendum smartsd Applications Part A3 ASSD Part A1 McEX / ASSD Extension UHS-II Addendum Part E2, E3 Bluetooth Part E7 Wireless LAN Other Applications GPS, Camera, PHS Part E7 (isdio) Intelligent SDIO Part E1 SDIO Specification NFC Interface Addendum Part A2 Host Controller

13 Bus Speed Modes Bus Speed Mode SDR : Single Data Rate (Use rising clock edge) DDR: Double Data Rate (Use rising and falling clock edge) UHS: Ultra High Speed Maximum Frequency LVDS: Low Voltage Differential Signaling Signal Voltage Bus Maximum Performance Default Speed (DS) 25MHz 3.3V 12.5MB/sec 1.01 High Speed (HS) 50MHz 3.3V 25MB/sec 1.10 UHS-I SDR12 25MHz 1.8V 12.5MB/sec 3.01 SDR25 50MHz 1.8V 25MB/sec SDR50 100MHz 1.8V 50MB/sec SDR MHz 1.8V 104MB/sec DDR50 50MHz 1.8V 50MB/sec Spec. Version UHS-II FD156 52MHz x30 LVDS 156MB/sec 4.00 HD312 52MHz x30 LVDS 312MB/sec 4.20 SD Association. All rights reserved. SD Association 12

SD Association. All rights reserved. SD Association 13 UHS-II Specification Overview 1. High speed I/F up to 312MB/s @Gen 1 (Ver1.

14 SD Association. All rights reserved. SD Association 13 UHS-II Specification Overview 1. High speed I/F up to 1 (Ver1.01) Two pairs of differential signal up to 156MB/s at each lane, considering ease of Host design 312MB/s can be achieved by Half Duplex mode (optional) Target of Gen 2 is up to 624MB/s 2. Continuously-variable data rate covering Covering from 39MB/s to 1 Host can select appropriate clock frequency from 26 MHz to 52 MHz 3. Legacy SD-compatibility UHS-II Card shall also support Legacy SD I/F for fully backward compatibility Encapsulation of Legacy SD Format for reusability of existing resource 4. Low voltage, low power consumption and low EMI Considering availability for mobile equipment Various power saving methods are introduced (Hibernate Mode)

15 SD Association. All rights reserved. SD Association 14 Standard Size SD Card Interface SD Memory Card SD/UHS-I Mode Interface CLK: Clock Pin (5) CMD: Command/Response Pin (2) DAT0 - DAT3: 4-bit Data Pins (7,8,9,1) VDD: 3.3V Power Pin (4) VSS1, VSS2: Ground Pins (3,6) Host CLK CMD DAT[3:0] SD Card Basic Pin Assignment SD Memory Card UHS-II Interface UHS-II Interface D0+, D0-: Lane 0 Differential Data Pins (11,12) D1+, D1-: Lane 1 Differential Data Pins (15,16) RCLK+, RCLK-: Reference Clock Pins (7,8) VDD2: 1.8V Power Pin (14) VSS3, VSS4, VSS5: Ground Pins (10, 13,17) Host Host UHS-II FD156 RCLK D0 D1 UHS-II HD312 RCLK D0 D1 SD Card SD Card 14

16 SD Association. All rights reserved. SD Association 15 Challenge in UHS-II Electrical UHS-I UHS-II Notes Data Rate 104MB/s 312MB/s Achieved 3 times faster Synchronous Clock Yes, direct data sample No, PLL/CDR based data sampling Huge technology gap to serial interface from parallel. Termination No Yes Impedance control is the key for good Impedance Control No Yes data transfer quality. This is new concept that UHS-I doesn t have. Signal Amplitude 1.8V 400mV differential Small amplitude in UHS-II have more sensitivity against loss and noise from system. Noise/Jitter specification SD Card Connector Simple Timing budget between clock and data Electrically Sensitive but no electrical spec Complex Jitter specification for serial data transmission Electrically sensitive and return loss is defined Noise/Jitter spec for serial interface is not simple. Some knowledge about serial link will be required to understand it. Impedance mismatch in SD connector will affect whole UHS-II channel characteristics.

17 SD Association. All rights reserved. SD Association 16 Challenge in UHS-II Electrical UHS-II Speed (1.56Gbps) UHS-II signal is much faster and smaller amplitude. UHS-I Speed (200MHz) *Waveforms are shown in same time/voltage scale.

How to Verify for UHS-II Card and Host SD

20 UHS-II Test Guideline To support adoption & improve interoperability, SD Association developed UHS-II Test Guideline along with UHS-II Spec. Dedicated verification tools, 3 rd party test houses services are available. SD Specifications Part 1 UHS-II PHY Test Guideline SD Specifications Part 1 UHS-II Protocol Test Guideline Version 1.00 Version 1.00 Test Specification for: Part 1 UHS-II Addendum Version 1.01 Test Specification for: Part 1 UHS-II Addendum Version 1.01 Technical Committee SD Card Association Technical Committee SD Card Association SD Association. All rights reserved. SD Association 19

Receiver Tolerance, Return Loss) -UHS-II

21 SD Association. All rights reserved. SD Association 20 UHS-II Test Guideline -UHS-II PHY Test Guideline: Host/Device PHY Electrical Tests ( Signal Integrity, Receiver Tolerance, Return Loss) -UHS-II Protocol Test Guideline: Host/Device Protocol Tests Host RCLK Device

22 SD Association. All rights reserved. SD Association 21 UHS-II Electrical Test Transmitter Test for UHS-II (Demo) -Loopback Mode is defined in the standard spec for TX test. -The oscilloscope and Pulse Pattern generator will be used for this test.

24 SD Association. All rights reserved. SD Association 23 UHS-II Electrical Test Impedance Test -Network Analyzer will be used to test impedance characteristics -This test has to include all system components such as PCB, UHS-II socket

UHS-II Test Tools & Fixtures (Electrical Test Solution) SD Association.

UHS-II Test Tools & Fixtures (Protocol Test Solution) UHS-II Protocol Decode Software for Oscilloscope Beta Version is available now from Granite River Labs, Inc.

30 UHS-II Test Tools & Fixtures (Protocol Test Solution) UHS-II Protocol Decode Software for Oscilloscope Beta Version is available now from Granite River Labs, Inc. UHS-II Card/Host Emulator and Protocol Checker along UHS-II Protocol Test Guidelines. Beta Version will be available early Nov 2013 from TED/Granite River Labs. UHS-II Protocol Analyzer Will be released in Nov 2013 from SolidGear. SD Association. All rights reserved. SD Association 29

33 SD Association. All rights reserved. SD Association 32 Member Seminar & SDA WS Timetable Nov. 20 Wednesday Nov. 21 Thursday Nov. 22 Friday 11:00 14:00 10:00 SDA 11:00-11:45 SDA WS; TC/Ono 12:00 Bayhub 12:30 Agilent 13:00 ATP 13:20 Allion 13:40 SDA 11:00 SDA 11:30 Toshiba 12:00 Bayhub 12:30 Agilent 13:00 GRL 13:30 Murata 10:00-10:45 SDA WS:TC/Takahashi 11:00 SDA 11:30 Toshiba 12:00 SDA 12:20 Agilent 12:40 SDA 13:00 ATP 13:30 Bayhub 14:00-17:00 14:00 SDA 14:30 Toshiba 15:00 Bayhub 15:20 SolidGear 15:40 Agilent 16:00 Fujisoft 16:20 Murata 16:40 SDA 14:00-14:45 SDA WS; TC/Sakamoto 15:00 Bayhub 15:20 SolidGear 15:40 Agilent 16:00 FujiSoft 16:20 ATP 16:40 SDA 14:00 GRL 14:20 Fujisoft 14:40 SDA 15:00 Agilent 15:20 SolidGear 15:40 Bayhub 16:00-16:45 SDA WS: TC/Takahashi

Introduction. SDIO Bus

Introduction. SDIO Bus In this Application Note we discuss the SDIO Protocol, the challenges involved in Protocol breakdown and PGY-SSM comprehensive Protocol Analysis solution for decode and analysis. Introduction. SDIO offers