Module 12: Elementary Input/Output

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1 Module 12: Elementary Input/Output I/O Concepts Typical Organization of an I/O Device Memory-mapped vs Isolated I/O Elementary output with latch and LED Elementary input with buffer and switch 7-segment interfacing Keypad interfacing (extra)

2 Input and Output (I/O) One of the basic and essential features designed in a computer system is its ability to exchange data with other external devices, and to allow the user to interact with the system: Input Devices include: Switches, Keyboards, Mice, Scanners, Cameras, etc. Output devices include: Lamp/LED/LCD displays, Video monitors, Speakers, Printers, etc. One or more interface circuits usually are used between I/O devices and the CPU to: Handle transfer of data between CPU and I/O interface. Handle transfer of data between I/O device and interface. Enable the CPU to request the status of data sent/received by the interface. Common I/O interfaces: Elementary I/O: Simple two-state devices such as LED and switches Peripheral I/O: Non-trivial interaction with complex I/O devices such as printers and keyboards mzabidi@ieee.org 11-2

3 Elementary I/O Two-state peripheral devices May involve more than one bit - e.g., BCD Requirements Bit signals can be written to output devices under program control Bit signals can be read from input devices under program control Devices required Latches such as 74LS374 for output Tri-state buffers such as 74LS244 for input Example Output devices LED, bulbs Relay coils 7-segment display Example Input devices Push button Proximity switch Rotary BCD coder mzabidi@ieee.org 11-3

4 I/O Schemes Memory-mapped I/O The I/O devices and memory components are resident in the same memory space The microprocessor uses the same instruction set for I/O operations CPU Address Data Read Write Memory I/O Device Isolated I/O The microprocessor has a separate address space for I/O devices The microprocessor has dedicated instructions for I/O operations Special bus lines Traditionally, Intel microprocessors use the isolated I/O method, whereas Motorola microprocessors use the memory-mapped I/O method. CPU Address Data Memory I/O Read Write Memory I/O Port I/O Device mzabidi@ieee.org 11-4

5 Memory Mapped I/O Part of the CPU's normal memory space is dedicated to I/O operations and all I/O ports look exactly like normal memory locations. Pros Rich set of addressing modes for I/O operation (e.g. bit manipulation) No overhead on special instructions Cons Processor s address space is allocated to I/O devices Risk of errors due to spurious accesses (elaborated address decoding) Lack of special purpose I/O signals to control the I/O operation Program Data I/O mzabidi@ieee.org 11-5

6 Peripheral I/O Concepts I/O devices (peripheral devices) Equipment that exchange data with a computer. May itself contain a microprocessor! Examples include printers, modems, keyboards, and disk drives. Interface (peripheral) chip A chip whose function is to synchronize data transfer between the CPU and I/O devices. An interface may consist of control registers, status registers, data registers, and control circuitry. An interface chip has data pins that are connected to the CPU and I/O port pins that are connected to the I/O devices. Data transfer between an I/O device and the CPU can be proceeded bit-by-bit (serial) or in multiple bits (parallel) mzabidi@ieee.org

7 I/O Transfer Synchronization The role of an interface chip Synchronizing data transfer between the CPU and the interface chip. Synchronizing data transfer between the interface chip and the I/O device

8 Synchronizing µp and the Interface Chip The polling method Repeatedly checks the status of an I/O device (through a status register of the associated I/O controller) until the desired condition is met This process is called polling Polling involves overhead Repeated testing of condition Can be used to handle only anticipated event The interrupt-driven method Processor gets interrupted when a specified event occurs Very efficient Can be used to handle unanticipated events mzabidi@ieee.org

9 Polled I/O Usually in the interface chip we have Control register a register where the processor is placing commands Data register input and output data registers where the data is made available to/from the processor Status register a register that shows the status of the peripheral device For input -- the microprocessor checks a status bit of the interface chip to find out if new data has been received from the input device. For output -- the microprocessor checks a status bit of the interface chip to find out if it can send new data to the interface chip mzabidi@ieee.org

10 A Generic Interface Chip CPU Chip select Register select Register select R/W Bidirectional data bus CS RS1 RS0 R/W Bus buffers Timing and Control Port A register Port B register Control register Status register I/O data I/O data Control Status I/O Device Inputs E RS1 RS0 Register Selected 1 X X None Port A Register Port B Register Control Register Status Register mzabidi@ieee.org

11 Communicating with External Devices : Parallel Interface Several ports each 1-byte wide A full byte of data or more is transferred on data cycle. Example devices: MC6821 PIA for 6800 CPU MC68230 PIT for CPU They are general purpose devices Direction of data flow is programmable, unlike in elementary I/O Strobe and handshaking lines for more efficient data transfers. May interrupt the CPU if peripheral is ready for data These devices are often quite complex and can operate in one of several modes mzabidi@ieee.org

12 Communicating with External Devices : Serial Interface Serial data transmission One bit is transferred for each clock cycle. cheap, simple, easy to use Connects the µp to another µp or peripheral such as modem Example devices: MC6850 ACIA for 6800 CPU MC68681 DUART for CPU They are programmable devices To use, the designer must program number of bits per character (not necessarily 8 bit/char), parity etc Can interrupt µp when peripheral is ready Possible to connect many device to single serial line (multidrop) mzabidi@ieee.org

13 LEDs Simples Elementary Output An LED is a semiconductor device that converts electrical energy directly into a discrete color of light Can be visible or IR White LEDs are blue LEDs plus phosphor V voltage drop Typically draws ma Semiconductor Diode Wire Bond Epoxy Lens Epoxy Case Reflective Cup Anode Lead Cathode Lead mzabidi@ieee.org 11-13

14 Turning on an LED Note: A zero turns on the LED +5V no light LED No current R +5V 1 output pin +5V LED light +3.2V Current R +0.4V 0 output pin R = voltage current = x 10-3 ~ 220 ohms mzabidi@ieee.org 11-14

15 Interfacing LED with Latch Unlike diodes, Light-emitting diodes have a forward voltage drop from 1.7 to 2.5 volts and most of them flow a forward current 10-20mA. Poor circuit TTL outputs can't source above 1mA so the LED will be very dim. Fair circuit The LED will conduct heavily at about 2V and the extra 3V has to be dropped in the TTL circuitry. This causes high power dissipation in the TTL or the LED fails. Good circuit The resistor limits the current. The resistance can be calculated by assuming its voltage is about 2V and the TTL output is 0.4V. See previous page. The resistor should not less than 100ohm or the LED would fail mzabidi@ieee.org 11-15

16 Simple Interfacing CPU to LED LED EQU $E00010 START ORG $1000 MOVEQ #1,D0 LOOP MOVE.B D0,LED MOVE.L #200000,D1 DELAY SUBQ.L #1,D1 BNE DELAY ROR.B #1,D0 Dari bas data D7 D6 D5 D4 D3 D2 D1 D0 Dari penyahkod alamat D7 D6 D5 D4 D3 D2 D1 D0 LE OE 74LS374 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 220ž 220ž 220ž 220ž 220ž 220ž 220ž 220ž +5V BRA LOOP END START

17 7-Segment Display There are applications where you need to display a decimal digit using a seven segment LED display. The display could represent e.g. the number of times a switch was pressed. Digits 0-9 and hex A-F can be displayed by giving the proper 7-segment codes q g f e d c b a q g f e d c b a A b C d E F mzabidi@ieee.org

18 Types of 7 Segment Displays Common-anode (CA): LED ON when Output is LOW. 8 cathode legs, 1 anode Common-cathode (CC): LED ON when Output is HIGH. 8 anode legs, 1 cathode TTL and CMOS devices are normally not used to drive the common-cathode display directly because of current (ma) requirement. A buffer circuit is used between the decoder chips and common-cathode display mzabidi@ieee.org 11-18

19 Using Lookup Tables Using lookup table to drive the 7-segment displays will result in efficient programs. ; Driver subroutine to display digits ; Digit to be displayed in D0 ; Address of interface is "DISP" ; Table of segments is "DIGTAB" DSPLAY: MOVEM.L A0/DO,-(A7) MOVE.L #DIGTAB,A0 EXT.W D0 EXT.L D0 ADD.L D0,A0 MOVE.B (A0),DISP ;OUTPUT MOVEM.L (A7)+,A0/D0 RTS ; Format of 7-segment: 0gfedcba Common-anode DIGTAB: DC.B % , % DC.B % , % DC.B % , % DC.B % , % DC.B % , % mzabidi@ieee.org 11-19

20 Elementary Input with Simplest input device is the three-state buffer. Buffer is very fast (around 20 ns), so DTACK* does not need to be delayed. Needs only 1 memory address Penimbal D0-D7 atau D8-D15 D0-D7 A1-A23 AS Penyahkod alamat OE V cc DTACK Punca DTACK daripada peranti lain mzabidi@ieee.org 11-20

21 Interfacing Switch with Poor circuit Logic 1 is stable when the switch is closed. But when the switch is open, the input floats to a noise-sensitive high rather than a low. An open TTL pin is usually read as logic 1 but the pin may picks up noise like an antenna. Impossible to get a stable low input. Fair circuit Requires a very small the pull-down resistor. Otherwise, the pin will rise above 0.9V when the resistor passes the 1.6mA sinking current. When the switch is closed, the circuit waste a large current since virtually no current flows into the pin. The only advantage is that a switch closure gives logic mzabidi@ieee.org 11-21

22 Interfacing Switch with Good Circuit When the switch is open, the 10k resistor supplies very small current needed for logic 1. When it is closed, the port pin is short to ground. The voltage is 0V and all the sinking current requirement is met, so it is logic 0. The 10k resistor will pass 0.5 ma (5 Volt/10k ohm). Thus the circuits waste very little current in either state. The drawback is that the closure of switch gives logic 0 and people like to think of a switch closure gives logic 1. But this is not a matter because it is easy to handle in software. To conclude, driving a TTL input should always consider current sinking (pulling input to 0V) mzabidi@ieee.org 11-22

23 Interfacing Switch with ; ; ATURCARA UNTUK MENGUJI SUIS ; SUIS EQU $ LED EQU $A00001 ORG $1000 START MOVE.B SUIS,LED BRA START END ;ALAMAT SEBENAR BERGANTUNG SISTEM Ke bas data D7 D6 D5 D4 D3 D2 D1 D0 Dari penyahkod alamat Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 74LS244 OE1 OE2 D7 D6 D5 D4 D3 D2 D1 D0 +5V 1kž 1kž 1kž 1kž 1kž 1kž 1kž 1kž mzabidi@ieee.org 11-23

24 Switch Debouncing When mechanical switches are opened or closed there are brief oscillations due to mechanical bouncing (switch bounce). key bounce, t BOUNCE V DD R R Set Q Reset (a) Set-reset latch Q Reset Set V DD R 3 basic hardware debouncing methods SR latches Non-inverting CMOS gates Integrating debouncer The most popular and simple one has been the wait and see method. The program simply waits for about 10 ms and reexamines the same key again to see if it is still pressed. V DD R C 4050 V out (b) CMOS gate debouncer V out H Threshold level L Switch closed (c) Integrating RC circuit debouncer Figure 7.42 Hardware debouncing techniques mzabidi@ieee.org 11-24

25 One Hardware Debounce Method

26 BCD-to-7-Segment Decoder/Driver (a) BCD-to-7- segment decoder/driv er driving a commonanode 7- segment LED display; (b) segment patterns for all possible input codes mzabidi@ieee.org 11-26

27 Keypad Decoding: 4x4 or 4x3 keypad CPU checks these lines CPU sends low signal to these lines

28 Decoding the Keyboard Matrix Example: press 5 and E Pressing A B C D E F Col 0 Col 2 Col 1 Col 3 Row 0 Row 1 Row 2 Row 3 Row 1 Col Pressing E (=14) Row 3 Col mzabidi@ieee.org 11-28

29 74C922 Keypad Encoder Performs the decoding and debouncing in hardware Connect to column pins Connect to row pins Connect to oscillator Low to enable output Y1 Y2 Y3 Y4 X1 X2 X3 X4 OSC KBM OE DOA DOB DOC DOD DA 74C Row & col position DA means Data Available High when a key is pressed mzabidi@ieee.org 11-29

30 74C922 Keypad Encoder 74LS244 C1 C1 L C922 Y1 Y2 Y3 Y4 X1 X2 X3 X4 OSC KBM DOA DOB DOC DOD OE DA H D0 D1 D2 D3 D4 D5 D6 D7 To Data Bus 0.068µF 0.68µF U9C LS14 Wait until DA pin high before accepting the 4-bit data mzabidi@ieee.org 11-30

31 Interfacing Other Devices with Latches Buzzers: Most latches do not have the current capacity to drive a buzzer directly so a transistor is added. Diode protects coil transient voltages. Relays: A relay is an excellent way of isolating the latch & CPU from high voltage circuits. Use a relay to control motors, solenoids, lamps etc. 2N3904 D 1 +5V + Piezo Buzzer D 1 +5V Relay N.S. To Indicating Light - N.O. 12 VDC From latch 2N3904 NPN 2.2KΩ B E C Q1 From latch 2N3904 NPN 2.2KΩ B E C Q1 DC Motor mzabidi@ieee.org 11-31

32 Example: System Having Only Elementary I/O

33 Liquid Crystal Displays: HD44780 The HD44780 is an industry standard LCD controller. An I/O port can easily be used to interface with the HD By controlling the value of RS and R/W the MCU can easily either sends instructions or data to the controller. Most operations require 40 micro seconds to complete

34 Multiplexing

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