Table of Contents. Introductory Material

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1 Table of Contents Introductory Material 0.1 Equipment Introduction... 1 breadboard area... 2 stimulator board... 2 prototype board... 2 the Vector 4613 Plugboard... 4 Edge Connector Signals... 6 The TDS340 oscilloscope Getting Started with The Computer... 9 Starting Basic... 9 Interactive Mode (Immediate Execution)... 9 INPUT Statement INP function OUT statement Compiling in QuickBASIC IBM PC Hardware I/O Channel Description Appendix A: Lab Integrated Circuits Inventory Appendix B: Pin Outs and Descriptions Logic Gates State Chips Flip-Flops, Registers and Counters Decoders and Multiplexers Appendix C: Data Sheets Laboratory Scripts Lab 1: Logic Gates, Flip Flops and Registers Lab 2: Counters Lab 3: Address Decoding Lab 4: Buffers and Latches Lab 5: The 8255 Programmable Peripheral Interface Lab 6: The 8253 Programmable Interval Timer Lab 7: ANALOG I/O Lab 8: Stepping Motors (1)...71 Lab 9: Stepping Motors (2)...75 Lab 10: The GPIB Interface... 79

2 Notes The schematics in the lab manual usually indicate the 7400 series logic chips without the letters indicating the family. Two common families in current use are the 74LSxx, low power TTL, and the 74HCxx CMOS variant. In the text it is indicated that we generally use the 74LS family. Several pages have been left blank so that sections and lab scripts will begin on the righthand pages. Acknowledgments The original contents of this manual were prepared by M. Thewalt and have been used for three semesters in its original handwritten form. This version is mainly a typewritten and redrafted form of the original except for a few revisions and corrections. A. Steele and T. Steiner have also contributed to the hardware and software sides of these labs. Any mistakes which may have crept in during this revision must be blamed on myself. Please let me know of any corrections that are needed. Thanks are due to D. Yang, A. Thng and C. Lock for helping to proofread this version and to E. Lo for typing the text. Maria and Mehrdad Rastan were invaluable in helping to revise the text and diagrams for the fourth edition Neil Alberding, fourth edition: 1994 fifth edition: 1999

3 Equipment Introduction Physics 430 Laboratory Manual Equipment Introduction Physics 430 Laboratory Manual This lab involves digital electronics and interfacing to the bus of IBM PC XT computer and its clones. The XT bus is a subset of the ISA bus which has been standard for a number of years. Although better and faster busses such as PCI are now becoming more common, the the XT subset of the ISA bus is a convenient platform on which to learn the basics of computer interfacing. Devices designed to work on the XT bus should also work on the ISA bus which is still in many desktop computers. The All work is done on an experimental box (Fig. 0.1) which consists of: 1. a fully buffered IBM PC bus socket 2. a breadboarding area 3. a breadboard stimulator 4. a removable prototyping plugboard for wire-wrapping prototype circuits Buffered bus edge connector Top edge of bus buffer Two 50-wire ribbon cables to computer bus. Prototyping Card (pins up) 16 pin connector for jumper Breadboard Area Stimulator Jumper cable from stimulator to prototype card. Fuse On/Off Figure 0.1: The Experimental Box The +5V and ±12V appearing on the bus edge connector come from the box power supply, not the computer. The 5V is not used in this lab and comes directly from the computer. The bus buffer obtains its power from the computer, so the computer can run with the box power either on or off (off, only if no prototype circuit is in place).

4 2 Physics 430 Laboratory Manual Equipment Introduction Insert jumpers to create a continuous bus from one side to the other. Use the horizontal bus pins for the voltages shown here. +12 V +5 V gnd 12 V ic ic Th co Th no These 25 holes are connected. Fig. 0.2 The Breadboard Area These 25 holes are connected But not to those on the left-han side. The breadboard area is meant to accept IC leads, small diameter resistor and capacitor leads, and #22 solid, not stranded, wire. Do not force larger diameter wires into it. It is not meant to accept the thinner wire-wrap wire good contact may not be obtained. Note that the bare breadboard is divided into four identical areas. The four horizontal bus lines in each area, which are meant to distribute ground and power, are all divided at the center. If you wish them to be continuous, you must install small jumpers. Mount the ICs consistently. A convenient convention is to mount the ICs so that pin 1 is on the left when viewed from the top, as on the breadboard, but with pin 1 on right when viewed from the bottom, as on the prototype board. The small circular sockets on the stimulator board are also designed to accept #22 solid wire. This makes interconnection between the breadboard and stimulator board simple. The stimulator board (Fig. 0.3) contains LEDs, pushbuttons, switches, a 10 kω potentiometer, power supply outputs, and several clock frequency outputs. There is a sixteen-pin connector to jumper some of these outputs the prototype board. The prototype board (Vector 4613 plugboard, Figs. 0.4 and 0.5) has wirewrap pins for all the bus signals. Also ground and +5 V are on alternate strips which traverse the entire board. Wirewrap pins for ground and +5 V are distributed on these traces. Always double check when connecting to the power and ground pins. Place the IC sockets with the wirewrap pins poking up through the board. The sockets will straddle the power or ground traces. Make sure you don't accidently put the pins into holes which are connected to the ground or supply lines or to other IC sockets. There are numbered plastic labels pads to identify the pin numbers of all the IC sockets.

5 Equipment Introduction Physics 430 Laboratory Manual 3 These are indispensible. Try to keep wiring outside the socket areas so they don't cover the pads. Fig 0.6 shows the bus signals on the PC bus edge connector. Fig The Stimulator Board

6 4 Physics 430 Laboratory Manual Equipment Introduction Fig 0.4 Layout of the Vector 4613 Plugboard

7 Equipment Introduction Physics 430 Laboratory Manual 5 Vector 4613 plugboard wirewrap side B1 A1 GND B31 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A20 A31 PC Bus Edge Connector < pin 1 this way Wirewrap pins Wirewrap pins Wirewrap pins Wirewrap pins Wirewrap pins Wirewrap pins Wirewrap pins Wirewrap pins Ground Ground Ground Ground Ground +5 V +5 V +5 V A Fig. 0.5 Diagram of the Vector 4613 prototyping plugboard

8 6 Physics 430 Laboratory Manual Equipment Introduction SIGNAL PIN PIN SIGNAL A d d r e s s L i n e s Note the confusion between pin labels and address lines. D a t a L i n e s A0 A31 B31 GND A1 A30 B30 OSC A2 A29 B29 +5V A3 A28 B28 ALE A4 A27 B27 T/C A5 A26 B26 DACK2 A6 A25 B25 IRQ3 A7 A24 B24 IRQ4 A8 A23 B23 IRQ5 A9 A22 B22 IRQ6 A10 A21 B21 IRQ7 A11 A20 B20 CLOCK A12 A19 B19 DACK0 A13 A18 B18 DRQ1 A14 A17 B17 DACK1 A15 A16 B16 DRQ3 A16 A15 B15 DACK3 A17 A14 B14 IOR A18 A13 B13 IOW A19 A12 B12 MEMR AEN A11 B11 MEMW I/O CH RDY A10 B10 GND D0 A9 B9 +12V D1 A8 B8 RESERVED D2 A7 B7 12V D3 A6 B6 DRQ2 D4 A5 B5 5V D5 A4 B4 IRQ2 D6 A3 B3 +5V D7 A2 B2 RESET DRV I/O CH CK A1 B1 GND Fig 0.6 Edge Connector Signals

9 Equipment Introduction Physics 430 Laboratory Manual 7 The TDS340 oscilloscope has many options which can make it difficult to operate at first. If you have trouble read the manual. Fig. 0.7 shows some settings for simple operation. If nothing seems to be happening, press the AUTOSET button. General Purpose knob Cursor control Miscellaneous controls Acquisition controls TDS 34 Menu controls Menu controls Vertical controls Horizontal controls Trigger controls Fig. 0.7 The Tektronix TDS 340 Digital Oscilloscope Control Panel

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11 Computer Introduction Physics 430 Laboratory Manual Getting Started with The Computer 1. Power up with System Disk in Drive A: (the top floppy disk drive) 2. Put the QuickBASIC disk in Drive B: (the bottom floppy disk drive) The system disk contains MS-DOS 3.2 and some utilities you might need to manage your disk files. It also has BASICA, the advanced basic interpreter, and UNIFORTH, a threadedinterpretive compiler. The QuickBASIC disk contains QuickBASIC 2.0, a basic compiler, and the programs used in this course. There is probably enough extra space on this disk to store most of the programs you modify or write yourself. Neither disk is write protected so be careful. If you modify a program that has been supplied, save it under another name so that the original isn t changed. For example, you might add your initials to the program name. Starting Basic All of your programming will be done with BASICA (Advanced Basic) or QuickBASIC (Compiled Basic). Set the default drive to B: (type B: <RET>); put the DOS system disk in A: and your disk in B:; start BASICA by typing A:BASICA <RET> and now you're in! Since BASICA is an interpreter, it performs instructions as it gets them, either in a program or simply from the editor. Programs are distinguished by line numbers. The first characters in any program line must be the number which identifies the order in which the program runs. Variables may be "TYPED" as follows: A Defaults To Single Precision A% Integer Value A! Single Precision Real A# Double Precision Real A$ String Variable To specify a hexadecimal number in a statement, you must precede it with "&H", e.g., A% = &H32F (For more information see "Handbook of General Programming Information" starting on page 3-8) Interactive Mode (Immediate Execution) When you type a statement without a line number, BASIC tries to execute it immediately or interactively. For example, type PRINT 5+7 and 12 is printed on screen immediately. Type LPRINT 77 and 77 is printed on printer Type A% = 16 and the integer 16 is assigned to variable A% (Nothing happens on screen except that the "OK" prompt returns)

12 10 Physics 430 Laboratory Manual Computer Introduction Three commands you should get familiar with are: INPUT, INP, and OUT INPUT Statement Purpose: Receives input from the keyboard during program execution Format: INPUT [;] ["prompt";][, variable] Remarks: "prompt" variable is a string constant that prompts for the desired input. is the name of the numeric or string variable or array element that receives the input. When the program sees an INPUT statement, it pauses and displays a question mark on the screen to indicate that it is waiting for data if a "prompt" is included, the string is displayed. If "prompt" is followed by the semicocolon (;), a question mark will follow the displayed string; if "prompt" is followed by a comma, the question mark is not displayed. You can use a comma instead of a semicolon after the prompt string so suppress the question mark. For example, the statement. INPUT "ENTER BIRTHDATE", B$ prints the prompt without the question mark. This statement can be used to ask for the port number and data in your experiment. Example: 10 INPUT"Name", A$ 20 PRINT "Hello", A$ RUN Effect: Name? Joe Blow Hello Joe Blow OK starts program Enter your name Program complete INP function Purpose: Returns the byte read from port n Format:v = INP(n) Remarks: n must be in the range 0 to 65535

13 Computer Introduction Physics 430 Laboratory Manual 11 INP performs the same function as the IN instruction in assembly language. INP is the complementary function to the OUT statement. See OUT statement. Example: This instruction reads a byte from port 255 and assigns it to the variable A. 100 A = INP(255) If "100" is not included, this executes immediately. Example: OUT statement Print INP(255) will print the byte read from port 255 on screen. Purpose: Sends a byte to a machine output port Format: OUT n,m Remarks: n is a numeric expression for the port number in the range 0 to m is a numeric expression for the data to be transmitted, in the range 0 to 255 OUT performs the same function as the OUT instruction in assembly language. OUT is the complementary statement to the INP function. See INP function. The INPUT and OUT statements can be used together in a simple loop program which asks you for the port, the data, then puts out the data to the port and does it again. 10 INPUT "Port, Data"; P%, D% 20 OUT P%, D% 30 GOTO 10 The "GOTO" statement causes this to loop and, since it is unconditional, it will loop forever! (To stop this, you would have to type CTRL-BREAK) Substituting "INP(Chan)" and a " PRINT" statement into this program would be a simple way of printing the data byte at port "Chan" to the screen. Compiling in QuickBASIC After you have a working, bug-free BASIC version of your program, you will want to compile it using the QuickBASIC disk in your disk box. Because QuickBASIC reads only ASCII files, you must first save your program in this format. To do so, while in the BASIC editor, type SAVE "B:MYPROG.BAS",A The extension.bas is necessary if you wish "MYPROG" to run, and the parameter ",A" tells the editor to save "MYPROG.BAS" in ASCII rather than binary format. Now return to "SYSTEM" and type B: to make the bottom drive the default drive. Type "QB" to start the QuickBASIC editor.

14 12 Physics 430 Laboratory Manual Computer Introduction Your screen looks like this when QuickBASIC starts: Microsoft QuickBASIC 2.0 QuickBASIC is ready for you to enter a command Press Shift-PrtSc to print this screen. Press Esc to make this box go away Press F1 to view the help window Entering Commands in QuickBASIC Enter commands by selecting them from a menu Menu names are listed at the top of the display Each menu contains a list of commands. To display the commands in a menu: 1. Hold down the Alt key 2. Type the first letter of the menu name. To select a command from a menu: 1. Use the Up/Down direction keys to highlight the command (in reverse video). 2. Press Enter. (the command will be executed) To make a menu go away without executing a command: + Press the Esc key To Exit QuickBASIC: Select Quit from the File menu. To Load a Program: Select Load from the File menu. Fig The QuickBASIC Startup Screen You can get this help screen anytime by typing F1. To load your program, type ALT-F and obtain the File menu. QuickBASIC commands are organized in menus on the menu bar. The File menu looks like this. Fig The File Menu This is a list of the file management commands. You want to Load... so type: ALT-L When you have done ALT-F and ALT-L, you are given the list of files you can load (i.e. those with.bas extensions) Fig The Load dialog box.

15 Computer Introduction Physics 430 Laboratory Manual 13 When the Load dialog box first opens, the specification *.bas is selected in the text box, and all the files in the current directory with the extension.bas appear in the list box. Text boxes are used to enter information for commands, such as a file name, or text to be searched for. When the text box has the input focus, QuickBASIC is ready for you to enter or edit the text in the box. The flashing undersocre indicates when the text box has the input focus. What you type appears to the left of the cursor. You can press BACKSPACE to correct typing errors in a text box, or use the QuickBASIC editing keys. The TAB key moves the input focus from the text box to the other items in the dialog box.your screen may look different from the illustration. Type the name of your program (in the example so far it is MYPROG.BAS) then <RET>. Your program will then be listed on screen, and you can COMPILE... and RUN it now. Press ALT-R to display the Run menu Fig 0.13 The Run Menu To get the COMPILE option type C (highlights Compile F5) and C once more (highlights compile ). When the option you want is highlighted, press space to start it up. The Compile... option dialog box looks like this, and each option is specified on the screen. After the program is compiled (with whatever options you specified) you can RUN it simply by typing CTRL-R. Fig 0.14 The Compile Dialog Box Always select Memory. TAB moves the input focus.

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17 Interfacing Introduction Physics 430 Laboratory Manual 15 IBM PC Hardware The purpose of this course is to teach you digital electronics from the point of view of designing and constructing interface devices which connect directly to a computer bus. The bus used in the lab is the IBM PC BUS, as implemented on IBM PC XT clones. This is also called the ISA (Industry Standard Architecture) bus. We will not be too concerned with the inner workings of the computer or the 8088 processor, but a general overview of the system board is useful (Fig. 0.15). In general, the BUS always consists of address lines 20 in the XT, giving 2 20 bytes or one megabyte of address space. these are OUT (meaning from computer to devices) only. data lines There are eight in the IBM PC, so data transfers are one byte wide. These lines are bidirectional (I/O). control lines These control the operation of external devices and memory. Some are input, some are output. The IBM PC supports two methods of reading or writing data to an I/O device: Memory Mapped I/O and I/O Data Transfers. (Read means device to computer, write means computer to device). Interrupts and direct memory access will be discussed later in the course. 1. Memory Mapped I/O: here we pretend that the device is a memory location. We write to it by storing the byte to be transmitted at the appropriate memory location, and read by loading from that location. This, of course, requires that there be no actual memory at that address, either RAM, ROM or display memory. Since most PCs now come with almost the full one megabyte byte of memory, this mode is not too useful, and in addition might interfere with later expansion. Fig Data Flow Diagram of the IBM PC System Board The 20 bit address is derived using a segmented scheme. All instructions are given as a 16 bit address (64K) with respect to a 4 bit segment offset. So, only 64K of memory can be accessed without changing the segment register.

18 16 Physics 430 Laboratory Manual Interfacing Introduction Fig Derivation of Physical Address from Segment Register and Offset Address The computer reads memory (or a memory-mapped I/O device) by 1. putting the 20 bit address on the address bus and 2. waiting for the memory (or device) to settle 3. issuing a MEMORY READ signal instructing the memory (or device) to put the byte onto the data lines, at which point it is loaded into the computer. Similarly, it writes to memory (or a memory-mapped device) by 1. putting the 20 bit address onto the address bus, 2. putting the byte to be transmitted onto the data lines and 3. issuing a MEMORY WRITE signal which instructs the selected memory location (or device) to store the data.

19 Interfacing Introduction Physics 430 Laboratory Manual 17 Fig System Memory Map Fig Another System Memory Map 2. I/O Data Transfers: The usual way to transfer data to or from I/O devices is to use I/O data transfers. The operation is very similar to the above, but for writing, an IOWRITE (IOW) signal is generated, while for reading, an IOREAD (IOR) is used. The processor supports these I/O transfers for addresses from O to FFFFH (hexadecimal) = 64K, but the PC design only uses addresses from 0 to 3FFH = 1K. Fig Available I/O Port Addresses Only 0200H to 03FFH are available for external I/O devices, i.e., the ones you will be building. Fig 0.20 System Board I/O Addresses and Decoding Scheme The first 512 I/O addresses (0 to 1FFH) are for the exclusive use of I/O devices on the system board. Some of the specific addresses are given here for reference.

20 18 Physics 430 Laboratory Manual Interfacing Introduction Fig I/O Address Map As you can see, the number of available external I/O addresses not already reserved for existing devices is rather small! We will be using 300H to 31FH (768 to 799) or 32 different addresses. Fig Pin and Signal definitions for the Card Slots O - output (computer to card), I - input (card to computer), IO - bidirectional I/O Channel Description The following describes the I/O channels. All lines are TTL-compatible. Lines needed in the initial part of this course are denoted with an asterisk (*). A0-A19* (O) Address bits 0 to 19: These lines are used to address memory and I/O devices within the system. The 20 address lines allow access of up to 1 Mbyte of memory. A0 is the least significant bit (LSB) and A19 is the most significant bit (MSB). These lines are generated by either the microprocessor of DMA controller. They are active high. AEN (O) Address Enable: This line is used to de-gate the microprocessor and other devices from the I/O channel to allow DMA transfers to take place. When this line is active (high), the DMA controller has control of the address bus, data bus, Read command lines (memory and I/O) and the Write command lines (memory and I/O) I/O CH CK (I)

21 Interfacing Introduction Physics 430 Laboratory Manual 19 I/O Channel Check: This line provides the microprocessor with parity (error) information on memory or devices in the I/O channel. When this signal is active low, a parity error is indicated. I/O CH RDY (I) I/O Channel Ready: This line, normally high (ready), is pulled low (not ready) by a memory or I/O device to lengthen I/O or memory cycles. It allows slower devices to attach to the I/O channel with a minimum of difficulty. Any slow device using this line should drive it low immediately upon detecting a valid address and a Read of Write command. This line should never be held low longer than 10 clock cycles. Machine cycles (I/O or memory) are extended by an integral number of clock cycles (210 ns). IOR* (O) I/O Read Command: This command line instructs an I/O device to drive its data onto the data bus. It may be driven by the microprocessor or the DMA controller. This signal is active low. IOW* (O) I/O Write Command: This command line instructs an I/O device to read its data on the data bus. It may be driven by the microprocessor or the DMA controller. This signal is active low. IRQ2 IRQ7 Interrupt Request 2 to 7: These lines are used to signal the microprocessor that an I/O device requires attention. They are prioritized with IRQ2 as the highest priority and IRQ7 as the lowest. An interrupt request is generated by raising an IRQ lines (low to high) and holding it high until it is acknowledged by the micrprocessor (interrupt service routine). CLK (O) System clock: it is a divide-by-3 of the oscillator and has a period of 210 ns (4.77 MHz). The clock has a 33% duty cycle. D0 D7* (I/O) Data Bits 0 to 7: These lines provide data bus buts 0 to 7 for the microprocessor, memory, and I/O devices. D0 is the LSB and D7 is the MSB. These lines are active high. ALE (O) Address Latch Enable: This line is provided by the 8288 bus controller and is used on the system board to latch valid addresses from the microprocessor. It is available to the I/O channel

22 20 Physics 430 Laboratory Manual Interfacing Introduction as an indicator of a valid micorprocessor address (when used with AEN). Microprocessor addresses are latched with the falling edge of ALE. DACK0 to DACK4 (O) DMA Acknowledge 0 to 3: These lines are used to acknowledge DMA requests (DRQ1 DRQ3) and refresh system dynamic memory ( DACK0). They are active low. DRQ1 DRQ3 (I) DMA Request 1 to 3: These lines are asynchronous channel requests used by peripheral devices to gain DMA service. They are prioritized with DRQ3 being the lowest and DRQ1 being the highest. A request is generated by bringing a DRQ line to an active level (high). A DRQ line must be held high until the corresponding DACK line goes active. MEMR (O) Memory Read: This command line instructs the memory to drive its data onto the data bus. It may be driven by the microprocessor or the DMA controler. This signal is active low. MEMW (O) Memory Write: This command line instructs the memory to store the data present on the data bus. It may be driven by the microprocessor or the DMA controller. This signal is active low. OSC (O) Oscillator: High-speed clock with a 70 ns period ( MHz). It has a 50% duty cycle. RESET DRV* (O) Reset Drive: This line is used to reset or initialize system logic upon power-up or during a low line-voltage outage. This signal is synchronized to the falling edge of CLK and is active high. T/C (O) Terminal Count: This line provides a pulse when the terminal count for any DMA channel is reached. This signal is active high.

23 Appendix A: Lab Inventory Physics 430 Laboratory Manual 21 Appendix A - Lab Integrated Circuits Inventory number I.C. Function 2 74LS00Quad 2-in NAND 2 74LSO2 Quad 2-in NOR 2 74LS04hex inverter hex open collector buffer 1 74LS10triple 3-in NAND 1 74LS20dual 4-in NAND 1 74LS308-in NAND 2 74LS73dual JK flip flop 2 74LS74dual D flip flop 1 74LS86quad excl. OR 2 74LS90decade counters 1 74LS123 dual monostables 2 74LS138 1 of 8 decoders 1 74LS153 dual 4 to 1 multiplexer 2 74LS161 4 bit binary counter 1 74LS174 hex D flip flop 1 74LS240 inverting octal buffer 1 74LS241 octal buffer 2 74LS245 octal transceiver 1 74LS273 octal D flip flop 1 74LS374 octal D flip flop (3 state) programmable timer programmable interface 1 SAA1027 stepper motor controller 1 MC1408 D/A converter 1 ADC0801 A/D Converter

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25 Appendix B: IC Pinouts Physics 430 Laboratory Manual 23 Pin Outs and Descriptions TOP VIEW. Logic Gates 74LS00 Quad 2-input NAND Gate 74LS02 Quad 2-input NOR Gate 74LS04 Hex Inverter 7407 Hex Driver (Open-collector to 30 V) 74LS10 Triple 3-input NAND Gate 74LS20 Dual 4-input NAND Gate 74LS30 8-input NAND Gate 74LS86 Quad 2-input Exclusive OR Gate 3-State Chips 74LS240 Octal Buffer/Line Driver with 3-state Outputs 74LS241 Octal Buffer/Line Driver with 3-state Outputs

26 24 Physics 430 Laboratory Manual Appendix B: IC Pinouts 74LS245 Octal Transceiver/3-state Line Driver Outputs Flip-Flops, Registers and Counters 74LS73 Dual J-K Flip-Flops with Clear 74LS74 Dual D-type Positive-Edge Triggered Flip-Flops with Preset and Clear 74LS174 Hex D-type Flip-Flop 74LS273 8-bit Register with Master Reset 74LS374 Octal Transparent Latch with 3-state Outputs

27 Appendix B: IC Pinouts Physics 430 Laboratory Manual 25 74LS90 Decade Counter 74LS161 Synchronous 4-bit Binary Counter with Asynchronous Clear 74LS123 Retriggerable Monostable Multivibrators Decoders and Multiplexers 74LS138 1 of 8 Decoder 74LS153 4-input Multiplexer

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29 Appendix C: Data Sheets Physics 430 Laboratory Manual 27 Appendix C: Data Sheets The following Data Sheets are provided: 74LS138 Decoders/Demultiplexers (Texas Instruments) 8255A/8255A-5 Programmable Peripheral Interface (Intel) 8253/8253/5 Programmable Interval Timer (Intel) MC1408/MC1508 Eight-bit Multiplyig Digital-to-Analog Converter (Motorola) ADC0801/ADC0804 Eight-bit A/D Converters (National Semiconductor) D82236-M4 Stepping Motor (North American Phillips, Airpax) SAA1027 Stepping Motor Driver (North American Phillips, Airpax) H21A1 Photon Coupled Interrupter Module (GE)