CS2630: Computer Organization Homework 3 Combinational logic and Logisim Due October 14, 2016, 11:59pm
|
|
- Arlene Arnold
- 5 years ago
- Views:
Transcription
1 CS2630: Computer Organization Homework 3 Combinational logic and Logisim Due October 14, 2016, 11:59pm Instructions: You must submit your files to Assignments > Homework 3 on ICON. Make sure your programs assemble and run successfully, and make sure to test them on multiple inputs. The files to submit are: hw4-1.circ hw4-2.circ hw4-3.circ For each circuit file, you are responsible for following this checklist: the file name is correct inputs and outputs are labeled exactly as asked for. Labeling an input looks like this: and is different from the text tool. you ve tested your circuit as described Goals for this assignment Understand the relationship between between truth tables, boolean algebra, and logic circuits Learn to build using various digital components, like gates, shifters, and MUXs Get practice using Logisim Do this part immediately! This assignment requires the Logisim tool for creating and simulating circuits. Just as MARS was your IDE for MIPS programming, Logisim will be your IDE for digital logic.
2 Go to the resources page for directions on downloading and running Logisim ( 1. Take the Logisim tutorial Steps 0-4 at a) Build the circuit in the tutorial. b) Include labels on the inputs, as the tutorial shows in step 3. c) Save the circuit as a file called hw4-1.circ. 2. Consider the following truth table A B C Z A,B, and C are inputs. Z is the output.
3 a) Open a new circuit file and save it as hw4-2.circ. On paper, convert the truth table to a boolean expression. Put that boolean expression in your file as a text label (use ~ for NOT). b) Simplify the expression using the laws of boolean algebra Put that final boolean expression in your file as a text label. c) In the file, build your circuit in terms of AND, OR, and NOT gates. You must label the inputs and outputs A,B,C, and Z. d) Test your circuit to make sure it adheres to the truth table. You must check all 8 inputs. To do this test: click the poke tool. Using that tool, you can poke the inputs to toggle them between 0 and You will now build a 4-bit variable shifter for both shift-right-arithmetic and shift-rightlogical. Along the way, you will learn how to create subcircuits. a) Open a new circuit file and save it as hw4-3.circ. Click Project > Add circuit and for Circuit Name put right_shift_1. You ll now see that there are two circuits in your file Add a 4-bit input labeled in, a 1-bit input labeled arithmetic, and a 4-bit output labeled out. b) Build the circuit so that out is the in signal shifted to the right by one. Arithmetic should determine whether the shift is shift-right-logical (0) or shiftright-arithmetic (1). You might use the Shifting by a constant from lecture 13 as inspiration. Note that the splitter is located under wiring: You ll want to make sure that the Fan Out and Bit Width In are both set to 4:
4 c) Using the poke tool, test your circuit on both positive and negative two s complement numbers. d) Now, you will build a 4-bit variable right shifter, using right_shift_1 as a component (or subcircuit in Logisim vocabulary). Double-click main so that the magnifying glass in the explorer pane is on main circuit. Build your 4-bit variable right shifter. It should have a 4-bit input labeled in, a 2-bit input labeled shamt, and a 1-bit input labeled arithmetic (0=logical, 1=arithmetic), and a 4-bit output labeled out. To place a right_shift_1 in your main circuit, single-click right_shift_1 to highlight it, then bring your mouse over to the editing area. It should look something like this. You might use the 8-bit variable left shifter from lecture 13 as inspiration (shown below). However, mind the differences! In particular, you should use right_shift_1 to do each shift and NOT the built-in Logisim shift (box with left arrow).
5 e) Using the poked tool, test your 4-bit variable right shifter on a variety of inputs, both positive and negative, logical and arithmetic. More documentation on subcircuits is available at
CSC258H: Logisim-Evolution Reference
1 Introduction CSC258H: Logisim-Evolution Reference Alexander Kemenchuk Logisim is a powerful logic circuit simulation environment. In CSC258, we will use Logisim-Evolution (a fork of the original Logisim)
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.5 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Boolean Operations Laws of Boolean Algebra Rules of Boolean Algebra
More informationCOS 116 The Computational Universe Laboratory 8: Digital Logic II
COS 116 The Computational Universe Laboratory 8: Digital Logic II In this lab you ll learn that, using only AND, OR, and NOT gates, you can build a circuit that can add two numbers. If you get stuck at
More informationCS2630: Computer Organization Project 2, part 1 Register file and ALU for MIPS processor Due July 25, 2017, 11:59pm
CS2630: Computer Organization Project 2, part 1 Register file and ALU for MIPS processor Due July 25, 2017, 11:59pm Goals for this assignment Apply knowledge of combinational logic and sequential logic
More informationMidterm Exam Review. CS 2420 :: Fall 2016 Molly O'Neil
Midterm Exam Review CS 2420 :: Fall 2016 Molly O'Neil Midterm Exam Thursday, October 20 In class, pencil & paper exam Closed book, closed notes, no cell phones or calculators, clean desk 20% of your final
More informationTo practice combinational logic on Logisim and Xilinx ISE tools. ...
ENGG1203: Introduction to Electrical and Electronic Engineering Second Semester, 2017 18 Lab 1 Objective: To practice combinational logic on Logisim and Xilinx ISE tools. 1 Find your lab partner You will
More informationCS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c/su06 CS61C : Machine Structures Lecture #14: Combinational Logic, Gates, and State 2006-07-20 CS 61C L14 Combinational Logic (1) Andy Carle What are Machine Structures? Software
More informationMany ways to build logic out of MOSFETs
Many ways to build logic out of MOSFETs pass transistor logic (most similar to the first switch logic we saw) static CMOS logic (what we saw last time) dynamic CMOS logic Clock=0 precharges X through the
More informationCS2630: Computer Organization Project 2, part 1 Register file and ALU for MIPS processor
CS2630: Computer Organization Project 2, part 1 Register file and ALU for MIPS processor Goals for this assignment Apply knowledge of combinational logic and sequential logic to build two major components
More informationCOMP2611: Computer Organization Introduction to Logisim & simple combinational circuit
COMP2611 Fall2015 COMP2611: Computer Organization Introduction to & simple combinational circuit Content 2 Today we will learn: How to download and run ; How to use basic operations; How to build a simple
More informationChapter 3 Arithmetic for Computers
Chapter 3 Arithmetic for Computers 1 Arithmetic Where we've been: Abstractions: Instruction Set Architecture Assembly Language and Machine Language What's up ahead: Implementing the Architecture operation
More informationLab #9: Introduction to Logisim CS 0447/COE 0147: Spring 2012
Lab #9: Introduction to Logisim CS 0447/COE 0147: Spring 2012 You have 2 weeks to do this lab, as always. Each of you should submit your own solution according to the instructions at your TA's website.
More informationASSIGNMENT ECE514 (COMPUTER ORGANIZATION) ASSIGNMENT NO. 3
ASSIGNMENT ECE514 (COMPUTER ORGANIZATION) ASSIGNMENT NO. 3 This is an individual assignment for ECE514. It carries a mark of 10%. The rubric of marks is given in Appendix 3. This assignment is about designing
More informationThe UNIVERSITY of NORTH CAROLINA at CHAPEL HILL
The UNIVERSITY of NORTH CAROLINA at CHAPEL HILL Comp 541 Digital Logic and Computer Design Spring 2015 Lab #3: Designing an ALU Issued Wed 1/21/15; Due Wed 1/28/15 (11:59pm) This lab assignment consists
More informationLECTURE 4. Logic Design
LECTURE 4 Logic Design LOGIC DESIGN The language of the machine is binary that is, sequences of 1 s and 0 s. But why? At the hardware level, computers are streams of signals. These signals only have two
More informationPART 1. Simplification Using Boolean Algebra
Name EET 1131 Lab #5 Logic Simplification Techniques OBJECTIVES: Upon completing this lab, you ll be able to: 1) Obtain the experimental truth table of a logic circuit. 2) Use Boolean algebra to simplify
More informationEEE130 Digital Electronics I Lecture #4_1
EEE130 Digital Electronics I Lecture #4_1 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi 4-6 Standard Forms of Boolean Expressions There are two standard forms: Sum-of-products form
More informationTopics. Computer Organization CS Exam 2 Review. Infix Notation. Reverse Polish Notation (RPN)
Computer Organization CS 231-01 Exam 2 Review Dr. William H. Robinson October 11, 2004 http://eecs.vanderbilt.edu/courses/cs231/ Topics Education is a progressive discovery of our own ignorance. Will Durant
More informationLSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology
LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a
More informationLecture (04) Boolean Algebra and Logic Gates
Lecture (4) Boolean Algebra and Logic Gates By: Dr. Ahmed ElShafee ١ Dr. Ahmed ElShafee, ACU : Spring 26, Logic Design Boolean algebra properties basic assumptions and properties: Closure law A set S is
More informationLecture (04) Boolean Algebra and Logic Gates By: Dr. Ahmed ElShafee
Lecture (4) Boolean Algebra and Logic Gates By: Dr. Ahmed ElShafee Boolean algebra properties basic assumptions and properties: Closure law A set S is closed with respect to a binary operator, for every
More informationComputer Architecture Set Four. Arithmetic
Computer Architecture Set Four Arithmetic Arithmetic Where we ve been: Performance (seconds, cycles, instructions) Abstractions: Instruction Set Architecture Assembly Language and Machine Language What
More informationReview. Pipeline big-delay CL for faster clock Finite State Machines extremely useful You ll see them again in 150, 152 & 164
CS61C L17 Combinatorial Logic Blocks (1) inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture #17 Combinatorial Logic Blocks 2007-7-24 Scott Beamer, Instructor Review Pipeline big-delay CL
More informationUC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks
2 Wawrzynek, Garcia 2004 c UCB UC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks 1 Introduction Original document by J. Wawrzynek (2003-11-15) Revised by Chris Sears
More informationUC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks
UC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks Original document by J. Wawrzynek (2003-11-15) Revised by Chris Sears and Dan Garcia (2004-04-26) 1 Introduction Last
More informationQUESTION BANK FOR TEST
CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice
More informationCOSC 243. Data Representation 3. Lecture 3 - Data Representation 3 1. COSC 243 (Computer Architecture)
COSC 243 Data Representation 3 Lecture 3 - Data Representation 3 1 Data Representation Test Material Lectures 1, 2, and 3 Tutorials 1b, 2a, and 2b During Tutorial a Next Week 12 th and 13 th March If you
More informationSYNERGY INSTITUTE OF ENGINEERING & TECHNOLOGY,DHENKANAL LECTURE NOTES ON DIGITAL ELECTRONICS CIRCUIT(SUBJECT CODE:PCEC4202)
Lecture No:5 Boolean Expressions and Definitions Boolean Algebra Boolean Algebra is used to analyze and simplify the digital (logic) circuits. It uses only the binary numbers i.e. 0 and 1. It is also called
More informationArithmetic-logic units
Arithmetic-logic units An arithmetic-logic unit, or ALU, performs many different arithmetic and logic operations. The ALU is the heart of a processor you could say that everything else in the CPU is there
More information1. Prove that if you have tri-state buffers and inverters, you can build any combinational logic circuit. [4]
HW 3 Answer Key 1. Prove that if you have tri-state buffers and inverters, you can build any combinational logic circuit. [4] You can build a NAND gate from tri-state buffers and inverters and thus you
More informationStandard Forms of Expression. Minterms and Maxterms
Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:
More informationIS1200/IS1500. Lab 5 Processor Design v1.0
IS1200/IS1500 Lab 5 Processor Design 2015-10-20 v1.0 Introduction Welcome to the fifth lab! In this laboratory exercise, you will learn the fundamentals of processor design. After finishing this lab, you
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of
More informationIntroduction to Electronics Workbench
Introduction to Electronics Workbench Electronics Workbench (EWB) is a design tool that provides you with all the components and instruments to create board-level designs on your PC. The user interface
More informationCOS 116 The Computational Universe Laboratory 7: Digital Logic I
COS 116 The Computational Universe Laboratory 7: Digital Logic I In this lab you ll construct simple combinational circuits in software, using a simulator, and also in hardware, with a breadboard and silicon
More information1. What is y-chart? ans: The y- chart consists of three domains:- behavioral, structural and geometrical.
SECTION- A Short questions: (each 2 marks) 1. What is y-chart? ans: The y- chart consists of three domains:- behavioral, structural and geometrical. 2. What is fabrication? ans: It is the process used
More informationUniversity of Florida EEL 3701 Dr. Eric M. Schwartz Department of Electrical & Computer Engineering Revision 0 12-Jun-16
Page 1/14 Quartus Tutorial with Basic Graphical Gate Entry and Simulation Example Problem Given the logic equation Y = A*/B + /C, implement this equation using a two input AND gate, a two input OR gate
More informationLecture 3: Binary Subtraction, Switching Algebra, Gates, and Algebraic Expressions
EE210: Switching Systems Lecture 3: Binary Subtraction, Switching Algebra, Gates, and Algebraic Expressions Prof. YingLi Tian Feb. 5/7, 2019 Department of Electrical Engineering The City College of New
More informationCircuit analysis summary
Boolean Algebra Circuit analysis summary After finding the circuit inputs and outputs, you can come up with either an expression or a truth table to describe what the circuit does. You can easily convert
More informationLogic Design: Part 2
Orange Coast College Business Division Computer Science Department CS 6- Computer Architecture Logic Design: Part 2 Where are we? Number systems Decimal Binary (and related Octal and Hexadecimal) Binary
More informationLogic Gates and Boolean Algebra ENT263
Logic Gates and Boolean Algebra ENT263 Logic Gates and Boolean Algebra Now that we understand the concept of binary numbers, we will study ways of describing how systems using binary logic levels make
More informationCS101 Lecture 25: The Machinery of Computation: Computer Architecture. John Magee 29 July 2013 Some material copyright Jones and Bartlett
CS101 Lecture 25: The Machinery of Computation: Computer Architecture John Magee 29 July 2013 Some material copyright Jones and Bartlett 1 Overview/Questions What did we do last time? Can we relate this
More informationCombinational Circuits Digital Logic (Materials taken primarily from:
Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a
More informationEE292: Fundamentals of ECE
EE292: Fundamentals of ECE Fall 2012 TTh 10:00-11:15 SEB 1242 Lecture 22 121115 http://www.ee.unlv.edu/~b1morris/ee292/ 2 Outline Review Binary Number Representation Binary Arithmetic Combinatorial Logic
More informationCS 61C: Great Ideas in Computer Architecture Introduction to Hardware: Representations and State
CS 61C: Great Ideas in Computer Architecture Introduction to Hardware: Representations and State Instructors: Krste Asanović and Randy H. Katz http://inst.eecs.berkeley.edu/~cs61c/fa17 9/21/17 Fall 2017
More informationComputer Organization and Levels of Abstraction
Computer Organization and Levels of Abstraction Announcements PS8 Due today PS9 Due July 22 Sound Lab tonight bring machines and headphones! Binary Search Today Review of binary floating point notation
More informationThe UNIVERSITY of NORTH CAROLINA at CHAPEL HILL
The UNIVERSITY of NORTH CAROLINA at CHAPEL HILL Comp 541 Digital Logic and Computer Design Fall 2014 Lab #3: Designing an ALU Issued Thu 9/4/14; Due Wed 9/10/14 (11:59pm) This lab assignment consists of
More informationBoolean Analysis of Logic Circuits
Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem - IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 7 Lecture Title:
More informationHours / 100 Marks Seat No.
17333 13141 3 Hours / 100 Seat No. Instructions (1) All Questions are Compulsory. (2) Answer each next main Question on a new page. (3) Illustrate your answers with neat sketches wherever necessary. (4)
More informationComputer Organization and Levels of Abstraction
Computer Organization and Levels of Abstraction Announcements Today: PS 7 Lab 8: Sound Lab tonight bring machines and headphones! PA 7 Tomorrow: Lab 9 Friday: PS8 Today (Short) Floating point review Boolean
More informationLaboratory Exercise 1
Laboratory Exercise 1 Switches, Lights, and Multiplexers The purpose of this exercise is to learn how to connect simple input and output devices to an FPGA chip and implement a circuit that uses these
More informationArithmetic Logic Unit. Digital Computer Design
Arithmetic Logic Unit Digital Computer Design Arithmetic Circuits Arithmetic circuits are the central building blocks of computers. Computers and digital logic perform many arithmetic functions: addition,
More informationIntroduction to Computer Engineering (E114)
Introduction to Computer Engineering (E114) Lab 1: Full Adder Introduction In this lab you will design a simple digital circuit called a full adder. You will then use logic gates to draw a schematic for
More informationMicrocomputers. Outline. Number Systems and Digital Logic Review
Microcomputers Number Systems and Digital Logic Review Lecture 1-1 Outline Number systems and formats Common number systems Base Conversion Integer representation Signed integer representation Binary coded
More information1010 2?= ?= CS 64 Lecture 2 Data Representation. Decimal Numbers: Base 10. Reading: FLD Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
CS 64 Lecture 2 Data Representation Reading: FLD 1.2-1.4 Decimal Numbers: Base 10 Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Example: 3271 = (3x10 3 ) + (2x10 2 ) + (7x10 1 ) + (1x10 0 ) 1010 10?= 1010 2?= 1
More informationWhat s a Tri-state Buffer?
What s a Tri-state Buffer? 2003 by Charles C. Lin. All rights reserved. Introduction Before we talk about tri-state buffers, let s talk about an inverter. You can read about inverters in the notes about
More informationEE 101 Homework 4 Redekopp Name: Due: See Blackboard
EE 101 Homework 4 Redekopp Name: Due: See Blackboard Score: In this homework we will use Xilinx to complete the indicated designs. Using Xilinx to perform this homework. Please download the Xilinx EE 101
More informationCS 2630 Computer Organization. Meeting 13: Faster arithmetic and more operations Brandon Myers University of Iowa
CS 2630 Computer Organization Meeting 13: Faster arithmetic and more operations Brandon Myers University of Iowa Where we are going Compiler Instruction set architecture (e.g., MIPS) translating source
More informationSimplification of Boolean Functions
COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 5 -- page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean
More informationBasic circuit analysis and design. Circuit analysis. Write algebraic expressions or make a truth table
Basic circuit analysis and design Circuit analysis Circuit analysis involves figuring out what some circuit does. Every circuit computes some function, which can be described with Boolean expressions or
More informationCARLETON UNIVERSITY. Laboratory 2.0
CARLETON UNIVERSITY Department of Electronics ELEC 267 Switching Circuits Jan 3, 28 Overview Laboratory 2. A 3-Bit Binary Sign-Extended Adder/Subtracter A binary adder sums two binary numbers for example
More informationUC Berkeley CS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c UC Berkeley CS61C : Machine Structures Lecture 24 Introduction to CPU Design 2007-03-14 CS61C L24 Introduction to CPU Design (1) Lecturer SOE Dan Garcia www.cs.berkeley.edu/~ddgarcia
More informationDepartment of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic
Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic Question 1: Due October 19 th, 2009 A convenient shorthand for specifying
More informationArithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU) Introduction to Computer Yung-Yu Chuang with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken (www.nand2tetris.org) and Harris & Harris (DDCA) Let's
More informationHomework 1 (r1.0) Due: Part (A) Feb, 2018, 11:55pm Part (B) Feb, 2018, 11:55pm
Second Semester, 2017 18 Homework 1 (r1.0) Due: Part (A) -- 28 Feb, 2018, 11:55pm Part (B) -- 28 Feb, 2018, 11:55pm Instruction: Submit your answers electronically through Moodle. There are 3 major parts
More informationFormat. 10 multiple choice 8 points each. 1 short answer 20 points. Same basic principals as the midterm
Final Review Format 10 multiple choice 8 points each Make sure to show your work Can write a description to the side as to why you think your answer is correct for possible partial credit 1 short answer
More informationLecture 10: Combinational Circuits
Computer Architecture Lecture : Combinational Circuits Previous two lectures.! TOY machine. Net two lectures.! Digital circuits. George Boole (85 864) Claude Shannon (96 2) Culminating lecture.! Putting
More informationIntroduction to LogicWorks (Version 5) by: Kevin Su
Introduction to LogicWorks (Version 5) January 24, 2005 by: Kevin Su 0. INTRODUCTION These notes are meant as a supplement for students taking CS 2513 (Computer Organizaition I ), especially for those
More informationReview. Steps to writing (stateless) circuits: Create a logic function (one per output)
MIPS ALU Review Steps to writing (stateless) circuits: Create a truth table Go through all different combinations of inputs For each row, generate each output based on the problem description Create a
More informationBoolean Unit (The obvious way)
oolean Unit (The obvious way) It is simple to build up a oolean unit using primitive gates and a mux to select the function. Since there is no interconnection between bits, this unit can be simply replicated
More informationFinal Project. Project Idea. Sample Project Idea 2/11/2019. CS 362: Computer Design Lecture 7: DeMorgan s, XOR, Universal Gates
Final Project CS 362: Computer Design Lecture 7: DeMorgan s, XOR, Universal Gates Original by: Mitchell Theys University of Illinois at Chicago September 18, 2018 Groups of 2 4 Number people x requirement
More informationExperiment 3: Logic Simplification
Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed El-Saied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions
More informationInjntu.com Injntu.com Injntu.com R16
1. a) What are the three methods of obtaining the 2 s complement of a given binary (3M) number? b) What do you mean by K-map? Name it advantages and disadvantages. (3M) c) Distinguish between a half-adder
More informationBinary Adders: Half Adders and Full Adders
Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order
More informationParallel logic circuits
Computer Mathematics Week 9 Parallel logic circuits College of Information cience and Engineering Ritsumeikan University last week the mathematics of logic circuits the foundation of all digital design
More informationCombinational Logic Use the Boolean Algebra and the minimization techniques to design useful circuits No feedback, no memory Just n inputs, m outputs
Combinational Logic Use the Boolean Algebra and the minimization techniques to design useful circuits No feedback, no memory Just n inputs, m outputs and an arbitrary truth table Analysis Procedure We
More informationHomework 1. Due Date: Wednesday 11/26/07 - at the beginning of the lecture
Homework 1 Due Date: Wednesday 11/26/07 - at the beginning of the lecture Problems marked with a [*] are a littlebit harder and count as extra credit. Note 1. For any of the given problems make sure that
More informationReview of Last Lecture. CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Representation II. Agenda. Dealing With Large Immediates
CS 61C: Great Ideas in Computer Architecture MIPS Instruction Representation II Guest Lecturer: Justin Hsia 2/11/2013 Spring 2013 Lecture #9 1 Review of Last Lecture Simplifying MIPS: Define instructions
More informationThe Guide to Being a Logisim User
The Guide to Being a Logisim User Logisim is an educational tool for designing and simulating digital logic circuits. With its simple toolbar interface and simulation of circuits as they are built, it
More informationBUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book
BUILDING BLOCKS OF A BASIC MICROPROCESSOR Part PowerPoint Format of Lecture 3 of Book Decoder Tri-state device Full adder, full subtractor Arithmetic Logic Unit (ALU) Memories Example showing how to write
More informationASIC = Application specific integrated circuit
ASIC = Application specific integrated circuit CS 2630 Computer Organization Meeting 19: Building a MIPS processor Brandon Myers University of Iowa The goal: implement most of MIPS So far Implementing
More informationRead this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 1 for Fall Semester,
More informationViewing and Filtering the Calendar Scheduling Grid in Astra
Viewing and Filtering the Calendar Scheduling Grid in Astra Astra Home screen. Astra will default to Guest access which can view all general use lecture and conference rooms. Click on the Calendar tab.
More informationCS1 Lecture 3 Jan. 22, 2018
CS1 Lecture 3 Jan. 22, 2018 Office hours for me and for TAs have been posted, locations will change check class website regularly First homework available, due Mon., 9:00am. Discussion sections tomorrow
More informationSCHEMATIC DESIGN IN QUARTUS
SCHEMATIC DESIGN IN QUARTUS Consider the design of a three-bit prime number detector. Figure 1 shows the block diagram and truth table. The inputs are binary signals A, B, and C while the output is binary
More informationCS 24: INTRODUCTION TO. Spring 2015 Lecture 2 COMPUTING SYSTEMS
CS 24: INTRODUCTION TO Spring 2015 Lecture 2 COMPUTING SYSTEMS LAST TIME! Began exploring the concepts behind a simple programmable computer! Construct the computer using Boolean values (a.k.a. bits )
More informationBinary Arithmetic Intro to Assembly Language CS 64: Computer Organization and Design Logic Lecture #3
Binary Arithmetic Intro to Assembly Language CS 64: Computer Organization and Design Logic Lecture #3 Ziad Matni Dept. of Computer Science, UCSB Adding this Class The class is full I will not be adding
More informationBinary Values. CSE 410 Lecture 02
Binary Values CSE 410 Lecture 02 Lecture Outline Binary Decimal, Binary, and Hexadecimal Integers Why Place Value Representation Boolean Algebra 2 First: Why Binary? Electronic implementation Easy to store
More informationOutline. EECS Components and Design Techniques for Digital Systems. Lec 11 Putting it all together Where are we now?
Outline EECS 5 - Components and Design Techniques for Digital Systems Lec Putting it all together -5-4 David Culler Electrical Engineering and Computer Sciences University of California Berkeley Top-to-bottom
More informationCS1800 Discrete Structures Final Version A
CS1800 Discrete Structures Fall 2017 Profs. Aslam, Gold, & Pavlu December 11, 2017 CS1800 Discrete Structures Final Version A Instructions: 1. The exam is closed book and closed notes. You may not use
More informationECE468 Computer Organization & Architecture. The Design Process & ALU Design
ECE6 Computer Organization & Architecture The Design Process & Design The Design Process "To Design Is To Represent" Design activity yields description/representation of an object -- Traditional craftsman
More information2/8/2017. SOP Form Gives Good Performance. ECE 120: Introduction to Computing. K-Maps Can Identify Single-Gate Functions
University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing Two-Level Logic SOP Form Gives Good Performance s you know, one can use a K-map
More informationPrinciples of Digital Techniques PDT (17320) Assignment No State advantages of digital system over analog system.
Assignment No. 1 1. State advantages of digital system over analog system. 2. Convert following numbers a. (138.56) 10 = (?) 2 = (?) 8 = (?) 16 b. (1110011.011) 2 = (?) 10 = (?) 8 = (?) 16 c. (3004.06)
More informationCOMP combinational logic 1 Jan. 18, 2016
In lectures 1 and 2, we looked at representations of numbers. For the case of integers, we saw that we could perform addition of two numbers using a binary representation and using the same algorithm that
More informationCMPE 413/ CMSC 711. Project Specification: 16 bit 2 s complement Adder and 8 bit 2 s complement multiplier. GND. Input bus. Latches I[8]-I[15]
Project Specification: 16 bit 2 s complement Adder and 8 bit 2 s complement multiplier. Assigned: Fri, Nov 3rd Due: Tue, Dec. 19th Description: con1 I[15] I[14] I[13] GND I[12] I[11] I[10] I[9] con2 O[15]
More informationData III & Integers I
Data III & Integers I CSE 351 Spring 2017 Instructor: Ruth Anderson Teaching Assistants: Dylan Johnson Kevin Bi Linxing Preston Jiang Cody Ohlsen Yufang Sun Joshua Curtis Administrivia Everyone has VM
More informationIntroduction to Digital Logic Using Logisim
Introduction to Digital Logic Using Logisim Gates, Plexers, Decoders, Registers, Addition and Comparison Autumn 2010 Uppsala University karl.marklund@it.uu.se ...open up a command shell and type logisim
More informationUniversity of Florida EEL 3701 Dr. Eric M. Schwartz Madison Emas, TA Department of Electrical & Computer Engineering Revision 1 5-Jun-17
Page 1/14 Example Problem Given the logic equation Y = A*/B + /C, implement this equation using a two input AND gate, a two input OR gate and two inverters under the Quartus environment. Upon completion
More informationInstructions: Language of the Computer
CS359: Computer Architecture Instructions: Language of the Computer Yanyan Shen Department of Computer Science and Engineering 1 The Language a Computer Understands Word a computer understands: instruction
More informationCprE 281: Digital Logic
CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative
More information