联系人黄生 : QQ: General Description The KN02GxxA series are low-cost 32-bit microcontroller with embedded ARM Cortex -M0 core for i

Transcription

1 联系人黄生 : QQ: ARM Cortex -M0 32-bit microcontroller 1 of 10 Release Date: 18 December 2013 Rev: 1.0

2 联系人黄生 : QQ: General Description The KN02GxxA series are low-cost 32-bit microcontroller with embedded ARM Cortex -M0 core for industrial control and applications which need high performance, high-integration low cost requirements. The KN02GxxA series can run up to 25MHz. The KN02GxxA series provides 4K~28Kbytes embedded program flash, flexibility data flash (Shared with program flash) and fixed 3Kbytes boot code address for the ISP and 2Kbytes embedded SRAM. Many system level peripheral functions, such as GPIO ports, Timer, UART, SSP, IIC, PWM, Watchdog Timer, 12-bits SAR ADC and low voltage detector, have been incorporated into the KN02GxxA series. The useful functions make the KN02GxxA series powerful for a wide range of applications. Additionally, the KN02GxxA series is equipped with ISP (In-System Programming) and ICP (In-Circuit Programming) functions, which allow the user to update the embedded program and data flash without removing the chip from the actual end product. 2 of 10 Release Date: 18 December 2013 Rev: 1.0

3 联系人黄生 : QQ: Feature Core - ARM Cortex -M0 core runs up to 25MHz - Built-in Nested Vectored Interrupt Controller (NVIC) - Built-in 24-bit system tick timer - A single-cycle 32-bit hardware multiplier - Supports Serial Wire Debug (SWD) interface and 2 watchpoints / 4 breakpoints Memory - Embedded Flash memory 4~28Kbytes on-chip flash memory Flexibility data flash Fixed 3 Kbytes boot memory map for ISP application Minimum 100,000 program/erase cycles Minimum 10 years data retention - 2KByte on-chip SRAM. Clock Control - Programmable system clock source. - External crystal input (up to 25Mhz) - Internal MHz high speed oscillator 25 C) - Internal 10KHz low speed oscillator I/O Port - Up to 25 general-purpose I/O(GPIO) pins - I/O pin configuration: Quasi-bidirectional (Pull-up Enable) Push-Pull (Output) Open drain (Pull-up Disable) Input only (High-impedance) Analog input for ADC - I/O pin can be configured as interrupt source with edge/level setting - High ESD: over 4KV Timer - Provides two channel 32/16 bits timer - Independent clock source for each timer - Selectable One-shot mode, Periodic timer mode or Free-running mode Watchdog Timer - clock source is internal 10KHz - 32-bit free running counter - Selectable timer-out interval Capture/ PWM - Built-in four 16-bit PWM generators - 8-channels PWM output - Clock divider for four PWM generator - Support 16-bit digital Capture mode with rising/falling/rising to falling/falling to rising capture input UART - Three sets UART interface - Compatible with industry-standard 16C450 and 16550A UARTs - Programmable baud-rate generator - Internal 16 Bytes TXFIFO, 16 Bytes RXFIFO - IrDA modulation/demodulation SSP/SPI - One SSP interface - Support Master/Slave mode - Full duplex synchronous serial data transfer - Programmable serial clock phase and polarity - Programmable serial clock frequencies on Master mode. - Variable length of transfer and receive data from 4 to 16 bits - 8 frame FIFOs for both transmit and receive I2C - One I2C interface - Supports master/slave mode - Support 7-bit/10-bit addressing 3 of 10 Release Date: 18 December 2013 Rev: 1.0

4 - Support Multi-master - Programmable clocks allow versatile rate control - Supports Fast-mode Plus (up to 1 Mbit/s), Fast-mode (up to 400 Kbit/s) and Standard-mode (up to 100 Kbit/s) ADC - 12-bit SAR ADC with 200ksps - Up to 8 channel single-ended input. - Supports single mode/continuous scan mode - Each channel with an individual result registers Flash Memory Controller (FMC) - Build-in internal Flash controller for In-Application-Programming (IAP) Power Management Unit - Support Deep Power down mode - Support Low speed mode - Support Sleep mode Operating Temperature: -40 ~ +85 Packages: - Green package (RoHS) PDIP 28/24/20/16 SOP 28/24/20 TSSOP 24/20 联系人黄生 : QQ: of 10 Release Date: 18 December 2013 Rev: 1.0

5 Series 联系人黄生 : QQ: Pin Configuration 3.1 Package: 28-pin P2.2 P2.1 WAKEUP/RESET/P1.4 SWCLK/P VDD 27 R6K8 26 P P2.7 SWDIO/P1.2 XTAL2/P1.1 XTAL1/P1.0 P KN02GxxA 24 P P P P1.7 P P0.5 P0.1 P1.5 P2.6 P P P P P2.3 VSS P2.4 Figure 3.1 Package: 28-pin 5 of 10 Release Date: 18 December 2013 Rev: 1.0

6 Series 3.2 Package: 24-pin 联系人黄生 : QQ: P VDD P R6K8 WAKEUP/RESET/P P0.7 SWCLK/P P0.6 SWDIO/P P1.6 XTAL2/P P1.7 XTAL1/P P0.5 P P0.4 P0.0 9 KN02GxxA 16 P0.3 P P0.2 P P2.3 VSS P2.4 Figure 3.2 Package: 24-pin 6 of 10 Release Date: 18 December 2013 Rev: 1.0

7 Series 3.3 Package: 20-pin 联系人黄生 : QQ: WAKEUP/RESET/P VDD SWCLK/P R6K8 SWDIO/P1.2 3 KN02GxxA 18 P0.7 XTAL2/P P0.6 XTAL1/P P1.6 P P1.7 P P0.5 P P0.4 P P0.3 VSS P0.2 Figure 3.3 Package: 20-pin 7 of 10 Release Date: 18 December 2013 Rev: 1.0

8 Series 3.4 Package: 16-pin 联系人黄生 : QQ: WAKEUP/RESET/P VDD SWCLK/P1.3 2 KN02GxxA 15 R6K8 SWDIO/P P0.7 XTAL2/P P0.6 XTAL1/P P0.5 P P0.4 P P0.3 VSS 8 9 P0.2 Figure 3.4 Package: 16-pin 8 of 10 Release Date: 18 December 2013 Rev: 1.0

9 联系人黄生 : QQ: Pin Description Pin number Function Symbol Configuration SWD_CLK P22 TXD0 RXD1 TXD2 SCL SSP_SS RTS0 PWM0A 2 2 SWD_DAT P21 RXD0 TXD1 RXD2 SDA SSP_CLK CTS0 PWM1B Reset/Wakeup P14 TXD0 RXD1 TXD2 SCL SSP_MOSI RTS1 PWM1A SWD_CLK P13 RXD0 TXD1 RXD2 SDA SSP_MISO CTS1 PWM2B SWD_DAT P12 TXD0 RXD1 TXD2 SCL SSP_SS RTS0 PWM2A XTAL2 P11 RXD0 TXD1 RXD2 SDA SSP_CLK CTS0 PWM3B XTAL1 P10 TXD0 RXD1 TXD2 SCL SSP_MOSI RTS1 PWM3A SWD_CLK P20 RXD0 TXD1 RXD2 SDA SSP_MISO CTS1 PWM1A SWD_DAT P00 TXD0 RXD1 TXD2 SCL SSP_SS RTS0 PWM0A SWD_CLK P01 RXD0 TXD1 RXD2 SDA SSP_CLK CTS0 PWM0B SWD_DAT P15 TXD0 RXD1 TXD2 SCL SSP_MOSI RTS1 PWM1B 12 SWD_CLK P26 RXD0 TXD1 RXD2 SDA SSP_MISO CTS1 PWM2B 13 SWD_DAT P25 TXD0 RXD1 TXD2 SCL SSP_SS RTS0 PWM2A VSS SWD_DAT P24 RXD0 TXD1 RXD2 SDA SSP_CLK CTS2 PWM3A SWD_CLK P23 TXD0 RXD1 TXD2 SCL SSP_MOSI RTS2 PWM3B SWD_DAT P02 RXD0 TXD1 RXD2 SDA SSP_MISO CTS2 ADC SWD_CLK P03 TXD0 RXD1 TXD2 SCL SSP_SS RTS2 ADC SWD_DAT P04 RXD0 TXD1 RXD2 SDA SSP_CLK CTS2 ADC SWD_CLK P05 TXD0 RXD1 TXD2 SCL SSP_MOSI CLKOUT ADC SWD_DAT P17 RXD0 TXD1 RXD2 SDA SSP_MISO CTS2 ADC SWD_CLK P16 TXD0 RXD1 TXD2 SCL SSP_SS RTS2 PWM0B SWD_DAT P06 RXD0 TXD1 RXD2 SDA SSP_MOSI CTS2 ADC SWD_CLK P07 TXD0 RXD1 TXD2 SCL SSP_MISO RTS2 ADC6 25 SWD_DAT P27 RXD0 TXD1 RXD2 SDA SSP_CLK PWM0B ADC7 26 SWD_CLK P30 TXD0 RXD1 TXD2 SCL SSP_SS RTS2 PWM0A R6K VDD 9 of 10 Release Date: 18 December 2013 Rev: 1.0

10 联系人黄生 : QQ: Selection Table Part No. Flash Memory (K Bytes) SRAM (K Bytes) EEPROM I/0 Timer WDT PWM 32-bits Connectivity UART SPI I2C ADC 12-bit INT ISP/ICP SWD Special function Package KN02G01A V up to 25 2 V up to up to 8ch up to 25 V V KN02G02A V up to 25 2 V up to up to 8ch up to 25 V V KN02G04A V up to 25 2 V up to up to 8ch up to 25 V V KN02G07A V up to 25 2 V up to up to 8ch up to 25 V V LVR IRC MHz Low speed clock 10KHz LVR IRC MHz Low speed clock 10KHz LVR IRC MHz Low speed clock 10KHz LVR IRC MHz Low speed clock 10KHz PDIP 16/20/24/28 SOP 20/24/28 TSSOP 20/24 PDIP 16/20/24/28 SOP 20/24/28 TSSOP 20/24 PDIP 16/20/24/28 SOP 20/24/28 TSSOP 20/24 PDIP 16/20/24/28 SOP 20/24/28 TSSOP 20/24 KN 02 G 07 A S 28 ARM Cortex-M0 Low Pin Count Series General Purpose Flash Size (KB) 01: 4+3K 02: 8+3K 04: 16+3K 08: 28+3K Pin Count 16: 16Pin 20: 20Pin 24: 24Pin 28: 28Pin Package Type D: DIP S: SOP T: TSSOP Reserve 10 of 10 Release Date: 18 December 2013 Rev: 1.0