30 August CS101L PROGRAMMING LAB 2
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1 UNIT 1
2 Introduction Microprocessors and Microcontrollers-its computational functionality and importance - 30 August CS101L PROGRAMMING LAB 2
3 Microcontrollers Embedded Systems Operations managed behind the scenes by a microcontroller Microcontroller (MCU) Integrated electronic computing device that includes three major components on a single chip Microprocessor (MPU) Memory I/O (Input/Output) ports 330_01 3
4 Microcontrollers Support Devices Timers A/D converter Serial I/O Common communication lines System Bus 330_01 4
5 Block Diagram 330_01 5
6 Microprocessor (MPU) MPU (CPU) Read instructions Process binary data 330_01 6
7 Memory Storage Device Addresses Registers Major Categories Read/Write Memory (R/W) Read-only-Memory (ROM) D 7 D 0 330_01 7
8 Input/Output (I/O) Input Devices Switches and Keypads Provide binary information to the MPU Output devices LEDs and LCDs Receive binary information from the MPU 330_01 8
9 Microprocessor-Based Systems 330_01 9
10 Microprocessor Architecture MPU communicates with Memory and I/O using the System Bus Address bus Unidirectional Memory and I/O Addresses Data bus Bidirectional Transfers Binary Data and Instructions Control lines Read and Write timing signals 330_01 10
11 Microprocessor-Based System 330_01 11
12 Example Microprocessor System 330_01 12
13 Software Machine Language Binary Instructions Difficult to decipher and write Error-prone All programs converted into machine language for execution Instructio n Hex Mnemonic Description 330_01 13 Processor ADD B Add reg B to Acc Intel ADD A, R0 Add Reg R0 to Acc Intel B ABA Add Acc A and B Motorola 6811
14 Software Assembly Language Machine instructions represented in mnemonics One-to-one correspondence Efficient execution and use of memory Machine-specific 330_01 14
15 Software High-Level Languages BASIC, C, and C++ Written in statements of spoken languages Machine independent Easy to write and troubleshoot Larger memory and less efficient execution 330_01 15
16 Data Format (8-bit) Unsigned Integers All eight bits represent the magnitude of a number Bit7 to Bit0 Range 00 H to FF H (0 10 to ) 330_01 16
17 Data Format (8-bit) Signed Integers 2's Complement Bit7 is sign bit Positive numbers: 00 H to 7F H (0 10 to ) Negative numbers: 80 H to FF H (-1 10 to ) 330_01 17
18 Data Format (8-bit) Binary Coded Decimal Numbers (BCD) 8-bit number divided into two groups of four Each group represents a decimal digit from 0 to 9 A H through F H are invalid Example: BCD = _01 18
19 Data Format (8-bit) American Standard Code for Information Interchange (ASCII) 7-bit alphanumeric code with 128 combinations (00 H to 7F H ) Represents English alphabet, decimal digits from 0 to 9, symbols, and commands 330_01 19
20 MPU-Based Systems System hardware Discrete components Microprocessor, Memory, and I/O Components connected by buses Address, Data, and Control System software Group of programs that monitors the functions of the entire system 330_01 20
21 MPU-Based System 330_01 21
22 MCU-Based Systems Microprocessor, memory, I/O ports, and support devices on a single chip Buses generally not available to a system designer I/O ports generally multiplexed and can be programmed to perform different functions 330_01 22
23 MCU-Based System 330_01 23
24 Computer Architectures Princeton versus Harvard Architecture CISC versus RISC processors Microprocessors and Microcontrollers 330_01 24
25 8086 architecture 30 August CS101L PROGRAMMING LAB 25
26 Architecture of 8086 Unlike microcontrollers, microprocessors do not have inbuilt memory. Mostly Princeton architecture is used for microprocessors where data and program memory are combined in a single memory interface. Since a microprocessor does not have any inbuilt peripheral, the circuit is purely digital and the clock speed can be anywhere from a few MHZ to a few hundred MHZ or even GHZ. This increased clock speed facilitates intensive computation that a microprocessor is supposed to do. We will discuss the basic architecture of Intel 8086 before discussing more advanced microprocessor architectures. Internal architecture of Intel 8086: Intel 8086 is a 16 bit integer processor. It has 16-bit data bus and 20-bit address bus. The lower 16-bit address lines and 16-bit data lines are multiplexed (AD0-AD15). Since 20-bit address lines are available, 8086 can access up to 2 20 or 1 Giga byte of physical memory. 30 August CS101L PROGRAMMING LAB 26
27 he internal architecture of Intel 8086 is divided into two units, viz., Bus Interface Unit (BIU) and Execution Unit (EU). Bus Interface Unit (BIU ) The Bus Interface Unit (BIU) generates the 20-bit physical memory address and provides the interface with external memory (ROM/RAM). As mentioned earlier, 8086 has a single memory interface. To speed up the execution, 6-bytes of instruction are fetched in advance and kept in a 6- byte Instruction Queue while other instructions are being executed in the Execution Unit (EU). Hence after the execution of an instruction, the next instruction is directly fetched from the instruction queue without having to wait for the external memory to send the instruction. This is called pipe-lining and is helpful for speeding up the overall execution process. 8086's BIU produces the 20-bit physical memory address by combining a 16-bit segment address with a 16-bit offset address. There are four 16-bit segment registers, viz., the code segment (CS), the stack segment (SS), the extra segment (ES), and the data segment (DS). These segment registers hold the corresponding 16-bit segment addresses. A segment address is the upper 16-bits of the starting address of that segment. The lower 4-bits of the starting address of a segment is always zero. The offset address is held by another 16-bit register. The physical 20-bit address is calculated by shifting the segment address 4-bit left and then adding that to the offset address
28 1 -A Historical Background 2- The Microprocessor-Based Personal Computer System 30 August CS101L PROGRAMMING LAB 28
29 In 1978 Intel released the 8086; a year or so later, it released the Both devices are 16-bit microprocessors. executed instructions in as little as 400 ns (2.5 millions of instructions per second) major improvement over execution speed of & 8088 addressed 1M byte of memory. 16 times more memory than the August CS101L PROGRAMMING LAB 29
30 1M-byte memory contains 1024K byte-sized memory locations or 1,048,576 bytes Higher speed and larger memory size allowed 8086 & 8088 to replace smaller minicomputers in many applications. Another feature was a 4- or 6-byte instruction cache or queue that prefetched instructions before they were executed. 30 August CS101L PROGRAMMING LAB 30
31 queue sped operation of many sequences of instruction basis for the much larger instruction caches found in modem microprocessors. Increased memory size and additional instructions in 8086/8088 led to many sophisticated applications. Improvements to the instruction set included multiply and divide instructions. missing on earlier microprocessors 30 August CS101L PROGRAMMING LAB 31
32 Number of instructions increased. from 45 on the 4004, to 246 on the 8085 over 20,000 variations on the 8086 & 8088 These microprocessors are called CISC (complex instruction set computers). additional instructions eased task of developing efficient and sophisticated applications 30 August CS101L PROGRAMMING LAB 32
33 16-bit microprocessor also provided more internal register storage space. additional registers allowed software to be written more efficiently evolved to meet need for larger memory systems These microprocessors are called CISC (complex instruction set computers). additional instructions eased task of developing efficient and sophisticated 30 August CS101L PROGRAMMING LAB 33
34 applications 16-bit microprocessor also provided more internal register storage space. additional registers allowed software to be written more efficiently evolved to meet need for larger memory systems Popularity of Intel ensured in 1981 when IBM chose the 8088 in its personal computer. 30 August CS101L PROGRAMMING LAB 34
35 Spreadsheets, word processors, spelling checkers, and computer-based thesauruses were memory-intensive. required more than 64K bytes of memory found in 8-bit microprocessors to execute efficiently The 16-bit 8086 and 8088 provided 1M byte of memory for these applications 30 August CS101L PROGRAMMING LAB 35
36 The Microprocessor Even the 1M-byte memory system proved limiting for databases and other applications. Intel introduced the in 1983 an updated 8086 Almost identical to the 8086/8088. addressed 16M-byte memory system instead of a 1M-byte system Instruction set almost identical except for a few additional instructions. 30 August CS101L PROGRAMMING LAB 36
37 80286 clock speed increased in 8.0 Mhz version. executed some instructions in as little as 250 ns (4.0 MIPs) Some changes to internal execution of instructions led to eightfold increase in speed for many instructions. 30 August CS101L PROGRAMMING LAB 37
38 The 32-Bit Microprocessor Applications demanded faster microprocessor speeds, more memory, and wider data paths. Led to the in 1986 by Intel. major overhaul of 16-bit architecture Intel s first practical microprocessor to contain a 32-bit data bus and 32-bit memory address. Intel produced an earlier, unsuccessful 32-bit 30 August CS101L PROGRAMMING LAB 38 microprocessor called iapx-432
39 Through 32-bit buses, addressed up to 4G bytes of memory. 1G memory = 1024M, or 1,073,741,824 locations 1,000,000 typewritten, double-spaced pages of ASCII text data 80386SX addressed 16M bytes of memory through a 16-bit data and 24-bit address bus. 30 August CS101L PROGRAMMING LAB 39
40 80386SL/80386SLC addressed 32M bytes memory via 16-bit data, 25-bit address bus SLC contained an internal cache to process data at even higher rates. 30 August CS101L PROGRAMMING LAB 40
41 Intel released 80386EX in Called an embedded PC. contains all components of the AT class computer on a single integrated circuit 24 lines for input/output data. 26-bit address bus; 16-bit data bus. DRAM refresh controller. Programmable chip selection logic 30 August CS101L PROGRAMMING LAB 41
42 Applications needing higher speeds and large memory systems include software systems that use a GUI, or graphical user interface Modern graphical displays contain 256,000 or more picture elements (pixels, or pels). VGA (variable graphics array) resolution is 640 pixels per scanning line by 480 lines. 30 August CS101L PROGRAMMING LAB 42
43 resolution used to display computer boot screen To display one screen of information, each picture element must be changed. requires a high-speed microprocessor GUI packages require high microprocessor speeds and accelerated video adapters for quick and efficient manipulation of video text and graphical data. 30 August CS101L PROGRAMMING LAB 43
44 the most striking system is Microsoft Windows GUI often called a WYSIWYG (what you see is what you get) display. 32-bit microprocessor needed due to size of its data bus. transfers real (single-precision floating-point) numbers that require 32-bit-wide memory To process 32-bit real numbers, the microprocessor must efficiently pass them 30 August CS101L PROGRAMMING LAB 44 between itself and memory.
45 with 8-bit data bus, takes four read or write cycles only one read or write cycle is required for 32 bit Significantly increases speed of any program that manipulates real numbers. High-level languages, spreadsheets, and database management systems use real numbers for data storage. also used in graphical design packages that use 30 August CS101L PROGRAMMING LAB 45
46 vectors to plot images on the video screen CAD (computer-aided drafting/design) systems as AUTOCAD, ORCAD had higher clocking speeds and included a memory management unit. allowed memory resources to be allocated and managed by the operating system 30 August CS101L PROGRAMMING LAB 46
47 80386 included hardware circuitry for memory management and assignment. improved efficiency, reduced software overhead earlier microprocessors left memory management completely to the software Instruction set, memory management upward-compatible with 8086, 8088, and additional instructions referenced 32-bit 30 August CS101L PROGRAMMING LAB 47
48 registers and managed the memory system Features allowed older, 16-bit software to operate on the microprocessor. 30 August CS101L PROGRAMMING LAB 48
49 The Microprocessor 30 August CS101L PROGRAMMING LAB 49
50 Real mode memory Addressing Protected mode Memory Addressing 30 August CS101L PROGRAMMING LAB 50
51 Real Mode - Memory Addressing Segment << 4 + offset = 20 bit EA Segment size is a fixed 64K DS = 0x1004 mov [0x1000], EAX The mov will store the content of EAX in 0x x1000 = 0x11040 Why this stuff? - To get 1 MB addressing using 16- bit Segment Registers
52 Protected Mode Addressing mov [DS:1000], EAX Let value of DS be 0x10. This is used to select a segment descriptor in a descriptor table. The segment descriptor contains information about the base address of the segment, to which 1000 is added to get the effective address. The value stored in DS is called a selector. Henceforth we discuss protected mode.
53 Protected Mode Addressing Logical Address SELECTOR OFFSET Descriptor Table Segment Descriptor Base Address Linear Address
54 A process always executes from Code segment. It should not execute by accessing from adjoining Data or stack area or any other code area too. A stack should not overgrow into adjoining segments C S ES SS Every segment is specified a start address and limit. Architecture checks if limit is not exceeded. jmp mov POP [ES:498], AX CS:250 //Let SP AX be //This 2, it is is fine jmp mov PUSH CS:501 POP [ES:498], EAX //This //Let EAX is SP a //This violation be be 2, 498, is Violation!!! a as it violation!!! is limit fineis 500 Intra and Inter process Protection
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