Architecture of 8086 Microprocessor

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1 MCQ on Microprocessor and Interfacing Technique S.E.Compure (Sem-II) UNIT 1 Architecture of 8086 Microprocessor 1 marks Questions 1. Which is first microprocessor? (a) 8008 (b) 8085 (c) 8086 (d) The 8086 microprocessor is designed by (a) Intel (b) Motorola (c) General instruments (d) Zilog (a) 20 pins (c) 40 pins (b) 30 pins (d) 64 pins 9. The 8086 microprocessor can support. pipelining. (a) 2 stage (b)3 stage (c) 4 stage (d) 5 stages 10. What are the operating modes of 8086? 3. Microprocessor IC contains.. (a) Minimum mode (b) maximum mode (a) Memory (b) input/output ports (c) Both (a) and (b) (d) none of above (c) CPU (d) all above 11. What is the size of registers in microprocessor is.bit 8086 microprocessor? microprocessor. (a) 16-bit (b) 8-bit (a) 8 (b) 16 (c) 20-bit (d) 24-bit (c) 24 (d) Which data types are supported 5. The 8086 microprocessor has..bit by 8086 microprocessor? data bus. (a) 8 (b) 24 (a) Bit (c) Word (b) byte (d) all above (c) 16 (d) Which data types are supported 6. The 8086 microprocessor has..bit by 8086 microprocessor? address bus. (a) 32 (b) 20 (a) Double word (c) ten bytes (b) quad word (d) all above (c) 16 (d) Why 8086 microprocessor is 7. The 8086 microprocessor can access up to of memory. called as 16-bit microprocessor? (a) Size of data bus is 16-bit (a) 64 KB (b) 1 KB (b) Size of registers is 16-bit (c) 4 GB (d) 1 MB (c) Size of ALU is 16-bit (d) All above 8. How many pins are present in 8086 microprocessor? Matoshri College of Engineering,Nasik Page 1

2 15. The 8086 microprocessor IC contains. (a) CPU (b) memory (c) I/P & O/P ports (d) all above (c) To store the offset address of extra (d) To store the offset address of stack 16. What is the function of BIU? (a) Read data from memory or input port (b) Write data to memory or output port (b) To store the offset address of data (c) Send address on address bus (d) All above (c) To store the offset address of extra 17. What is size of s of (d) Both (b) and (c) memory in 8086 microprocessor? (a) 1 KB (b) 64 KB 22. What is the use of SP register? (c) 1 MB (d) variable (a) To store the offset address of code 18. What is the function of (b) To store the offset address of data registers? (a) To store the starting address of (c) To store the offset address of corresponding stack (b) To store data required for arithmetic (d) To store the offset address of extra or logical operations (c) To store address within the (d) All above 19. What is the use of IP register? stack (a) To store the offset address of code (b) To store the offset address of data (b) To store the offset address of data (c) To store the offset address of extra (c) To store the offset address of stack (d) To store the offset address of code (d) To store the offset address of extra 20. What is the use of SI register? (a) To store the offset address of code (b) To store the offset address of data 21. What is the use of DI register? (a) To store the offset address of code 23. What is the use of BP register? (a) To store the offset address of 24. What is the use of code (CS) register? (a) To store the starting address of code (b) To store the starting address of data (c) To store the starting address of extra Matoshri College of Engineering,Nasik Page 2

3 (d) To store the starting address of stack 30. The content of CS, DS, ES or SS register is called as What is the use of DS register? (a) Offset address (b) logical address (a) To store the starting address of code (c) Linear address (d) physical address (b) To store the starting address of data 31. The content of IP, SP, BP, SI or DI (c) To store the starting address of extra register is called as.. (a) Offset address (b) logical address (d) To store the starting address of stack (c) Linear address (d) physical addrss 32. What is the size of offset address? 26. What is the use of ES register? (a) 8 bit (b) 16 bit (a) To store the starting address of code (c) 20 bit (d) (b) or (c) (b) To store the starting address of data 33. What is the size of logical address? (c) To store the starting address of (a) 8 bit (b) 16 bit extra (c) 20 bit (d) 24 bit (d) To store the starting address of stack 34. What is the size of physical address? 27. What is the use of SS register? (a) 8 bit (b) 16 bit (a) To store the starting address of code (c) 20 bit (d) 24 bit (b) To store the starting address of data 35. What is the size of instruction queue? (c) To store the starting address of extra (a) 16 bit (b) 20 bit (c) 6 byte (d) 64 KB (d) To store the starting address of stack 36. Which principal is used in queue? (a) FILO (b) FIFO 28. What is the size of CS, DS, ES and (c) LIFO (d) None of above SS registers? (a) 16 bit (b) 64 KB 37. Which block is not present in (c) 20 bit (d) 1 MB BIU? (a) Segment registers (b) Queue 29. What is the size of CS, DS, ES and (c) IP (d) Decoder SS s? (a) 16 bit (b) 64 KB 38. Which block is not present in EU? (c) 20 bit (d) 1 MB (a) ALU (b) flag register Matoshri College of Engineering,Nasik Page 3

4 (c) Control unit (d) IP 39. What is the use of AX register? (a) Input/output operations (b) In multiply and arithmetic instructions (c) To store data (d) All above 40. What is the use of BX register? (a) To store the offset address of data (b) To store immediate data (c) To perform arithmetic or logical operation (d) All above 41. What is the use of CX register? (a) Input/Output operations (b) To store offset address of data (c) To store counter value (d) In multiply and arithmetic operations 45. How many control flags are present in 8086 microprocessor? (a) 3 (b) 6 (c) 9 (d) How many unused flags are present in 8086 microprocessor? (a) 3 (b) 6 (c) 9 (d) What is the use of decoding unit? (a) To find meaning of opcodes (b) To generate control signals (c) Both (a) and (b) (d) None of above 48. What is the use of timing and control unit? (a) To find meaning of opcodes (b) To generate control and timing signal (c) To execute the instruction completely 42. What is the use of DX register? (a) Input/Output operations (b) To store counter value (c) To store offset address of data (d) Both (a) and (c) 43. What is the size of flag register in 8086 microprocessor? (a) 8 bit (b) 16 bit (c) 20 bit (d) 24 bit 44. How many status flags are present in 8086 microprocessor? (a) 3 (b) 6 (c) 9 (d) When carry flag is set? (a) If carry generated out of MSB (b) If carry generated out of D7 bit in 8 bit addition (c) If carry generated out of D15 bit in 16 bit addition 50. When parity flag is set? (a) If result contains even number of 1 s (b) If higher byte of result contains even number of 1 s (c) If lower byte of result contains even number of 1 s (d) If result contains odd number of 1 s 51. When auxiliary flag is set? Matoshri College of Engineering,Nasik Page 4

5 (a) If carry is generated out of MSB (b) If carry is generated out of D7 bit 58. The total number of nonoverlapped is.. (c) If carry is generated out of D3 bit (d) If carry is generated out of D15 bit (a) Unlimited (c) 20 (b) 16 (d) cannot calculate 52. When overflow is set? (a) If carry is generated out of D6 bit in 59. In 8086 microprocessor, at a time signed number operation how many s can be active? (b) If carry is generated out of D7 bit in (a) 2 (b) 3 signed number operation (c) 4 (d) 16 (c) If carry is generated out of D14 bit in signed number operation (d) (a) or (c) 60. In 8086 microprocessor, who converts logical address to physical 53. What is the use of direction flag? address? (a) To auto increment SI and DI (b) To auto decrement SI and DI (c) To perform string operations (a) BIU (b) EU (c) Both (a) and (b) (d) None of (a) and (b) 61. Which registers are used to 54. What is the use of trap flag? (a) To debug the program generate physical address from logical address? (b) To execute one instruction at a time (a) Segment registers (b) Offset register (c) To check registers or memory contents before complete execution (c) Both (a) and (b) (d) General purpose register 62. The DX is.bit 55. What is the maximum value of microprocessor. registers? (a) 16 (b) 24 (a) FFFFH (b) FFFF0H (c) 8 (d) 32 (c) FF00H (d) F000H 63. What is the size of data bus in 56. What is the maximum value of 80386DX microprocessor? offset registers? (a) 8-bit (b) 16-bit (a) FFFFH (b) FFF0H (c) 32-bit (d) 64-bit 57. Why memory s are of What is the size of registers in KB size in 8086 (a) Size of offset 80836DX microprocessor? register is 16 bit (b) Size of register is 16 bit (c) Size of all registers is 16 bit (a) 8-bit (c) 24-bit (b) 16-bit (d) 32-bit Matoshri College of Engineering,Nasik Page 5

6 65. How much physical memory can (c) 64-bit (d) 80-bit be accessed by 80386DX microprocessor? 72. How many functional units are (a) 1 MB (b) 4 MB present in 80386DX? (c) 4 GB (d) 64 TB (a) 6 (b) 8 (c) 10 (d) How much virtual memory can be accessed by microprocessor? 73. If PE = 1, then DX (a) 1 MB (b) 4 MB microprocessor operates in (c) 4 GB (d) 64 TB (a) Real mode (b) Protected mode (c) Virtual 86 mode (d) Special mode 67. The DX microprocessor has. (a) Pipelined architecture (b) separate data bus and address bus (c) Multitasking (d) all of above 74. Actually how many pins are used in address generation of 80386DX microprocessor? (a) 32 pins (b) 34 pins (c) 20 pins (d) 36 pins 68. What is the size of prefetch queue in 80386DX? (a) 6 bytes (b) 10 bytes 75. Which pins acts as hardware interrupt pins in 80386DX (c) 12 bytes (d) 16 bytes microprocessor? (a) NMI (b) RESET 69. What is the function of bus interface in 80386DX? (c) INTR (d) all of above (a) To communicate between different parts of 80386DX (b) To generate control signals 76. What happens after providing reset to 80386DX microprocessor? (a) It starts execution from address (c) To interface between 80386DX and FFFFFFF0H input/output devices and memory (b) ESP = FFFFFFFFH (c) operates in real mode 70. If paging unit is enabled then (a) It translates linear address to physical address 77. Which hardware interrupt pin has highest priority? (b) It translates virtual address to physical address (c) (a) and (b) are same (a) INTR (c) RESET (b) NMI (d) cannot define (d) (a) or (b) 78. Which flag is not present in 8086 microprocessor but present in 71. What is the size of barrel shifter 80386DX microprocessor? in 80386DX? (a) Nested Task Flag (b) Sign Flag (a) 32-bit (b) 48-bit (c) Trap Flag (d) Zero Flag Matoshri College of Engineering,Nasik Page 6

7 79. Which IOPL value has highest priority? (a) 00 (b) 02 (c) 01 (d) When zero flag is set? (a) After comparison instruction if source and destination are equal (b) If ALU result is zero (c) Both (a) and (b) (d) It depends on programmer. 86. What is the size of offset register in 80386DX microprocessor? (a) 16 bit (b) 32 bits (c) 48 bit (d) 64 bits 87. What is the size of general purpose registers in 80386DX microprocessor? (a) 16 bit (b) 32 bits (c) 48 bit (d) 64 bits 88. What is the size of control registers in 80386DX 81. What is the use of base registers microprocessor? and offset registers? (a) To hold 16-bit relative address present within the (a) 16 bits (c) 48 bits (b) 32 bits (d) 64 bits (b) To perform arithmetic and logical operations 89. How many control registers are present in 80386DX microprocessor? (c) To hold the data temporary (a) 1 (c) 3 (b) 2 (d) Which register cannot be divided 90. What is the size of debug registers into 8 bit data? in 80386DX microprocessor? (a) AX (b) CX (c) DX (d) SI 83. How many registers are 91. How many debug registers are present in 80386? present in microprocessor? (a) 4 (b) 2 (a) 3 (b) 4 (c) 6 (d) 8 (c) 7 (d) How many data s are 92. How many break point addresses present in 80386DX microprocessor? we can load in debug registers of (a) 2 (b) DX microprocessor? (c) 4 (d) 5 (a) 4 (b) 5 (c) 7 (d) What is the size of selector in 80386DX microprocessor? 93. What is the size of test registers? (a) 16 bit (b) 32 bit (c) 48 bit (d) 64 bit Matoshri College of Engineering,Nasik Page 7

8 94. What is the use of test registers (d) in All of above 80386? (a) To test complete memory 102. What is the use of LDTR in management unit 80386DX microprocessor? (b) To test complete (a) To select descriptor for microprocessor LDT (c) To test translation look-aside (b) To contain base address of LDT buffer (c) To contain limit of LDT (d) Both (b) and (c) 95. In task register, how many bits are accessible by user? 103. Which control register is called as page directory base register? (a) CR0 (b) CR1 (c) CR2 (d) CR3 96. What is the size of the LDTR? 104. Which debug register is called as debug status register in 80386? (a) DR5 (b) DR4 (c) DR6 (d) DR7 97. What is the size of GDTR? 105. Which debug register is called as debug control register in 80386? (a) DR4 (b) DR5 98. What is the size of IDTR? (c) DR6 (d) DR Which data type is not present in 80386DX microprocessor? 100. What GDTR and IDTR contains? (a) Byte string (b) Word string (a) Segment base address and limit (c) Double word string (b) Access Right Byte (d) Quad word string (c) Type of 101. What is the use of registers in 80386DX microprocessor? (a) To hold base address of in real mode (b) To select one of the descriptor in protected mode (c) To select GDT or LDT in protected mode 107. What is the maximum size of data which can be handled by 80386? (a) 32 bits (b) 48 bits (c) 64 bits (d) 80 bits 108. When an instruction is read from the memory, it is called (a) Memory Read cycle (b) Fetch cycle (c) Instruction cycle (d) Memory write cycle Matoshri College of Engineering,Nasik Page 8

9 109. A port can be 117. What is the duty cycle of clock in (a) Strictly Input (b) Strictly Output 8086 microprocessor? (c) Bidirectional (a) 50% (b) 25% (c) 33% (d) 100% 110. Which bus is bidirectional? (a) Control Bus (b) Data Bus 118. The address of a memory is a 20 (c) Address Bus (d) None of these bit address for the 8086 microprocessor: 111. To prevent another master from (a) Physical taking over the bus during a critical (c) Both (b) Logical (d) None of these operation, the can assert its.signal. (a) LOCK# (b) HOLD or BOFF (c) HLDA (d) HOLD 112. What is the range of BCD number? (a) 0 to 7 (b) 0 to 9 (c) 0 to 15 (d) 0 to 9 and A to F 113. Which is not unpacked BCD number? (a) 05H (b) 00H (c) 09H (d) 10H 119..is the most important and it contains the actualassembly languageinstruction to be executed by the microprocessor: (a) Data (b) Code (c) Stack (d) Extra 120. The offset of a particular varies from.in 8086 microprocessor. (a) 000H to FFFH (b) 0000H to FFFFH (c) 00H to FFH (d) 00000H to FFFFFH 114. If DS = 3000H, CS = 4000H and 121. IP Which is responsible for all the = 7A23H, then physical address is outside world communication by the (a) 47A34H (b) 47A23H microprocessor? (c) AA230H (d) BA230H (a) BIU (b) PIU (c) TIU (d) EU 115. If DS = 2000H, IP = 2000H and DI = 3000H, then physical address is In which microprocessor does (a) 22000H (b) 40000H the concept of pipeline first (c) 50000H (d) 23000H introduced? (a) 8086 (b) If ES = 5000H, IP = 2000H, SI = (c) (d) H, DI = 2A32H, then physical address is.. (a) 52A32H (b) 52000H 123. If CS = 24F6 and IP = 634A, the physical address is (c) 51111H (d) 61110H (a) 24F6: 634A (b) 34F5F (c) 2B2AA (d) 24F60 Matoshri College of Engineering,Nasik Page 9

10 124. An operating system that allows 132. A gigabyte represents. several processors to perform (a) 1 billion bytes (b) 1000 kilobytes computation at the same time is called as.. (c) 230 bytes (d) 1024 bytes (a) Single program (b) Multitasking 133. A megabyte represents (c) Multiprocessing (a) 1 million bytes (b) 1000 kilobytes (d) None of the above (c) 230 bytes (d) 1024 bytes 125. What is the range of 8-bit unsigned integer? 134. Pipelining improves CPU performance due to. (a) 0 to 255 (b) 128 to +127 (a) Reduced memory access time (c) 0 to (d) 32,768 to +32,767 (b) Increased clock speed (c) The introduction of parallelism 126. What is the range of 8-bit signed (d) Additional functional units integer? (a) 0 to 255 (b) 128 to The system bus is made up (c) 0 to (d) 32,768 to +32,767 of. (a) Data bus 127. What is the range of 16-bit unsigned integer? (b) Data bus and address bus (c) Data bus and control bus (a) 0 to 255 (b) 128 to +127 (d) Data bus, control bus and address (c) 0 to (d) 32,768 to +32,767 bus 128. What does microprocessor speed depends on? 136. A machine cycle refers to (a) Fetching an instruction (a) Clock (b) Data bus width (b) Clock speed (c) Address bus width (d) Control bus width (c) Fetching, decoding and executing an instruction (d) Executing an instruction 129. Numbers are stored and transmitted inside a computer in 137. CPU performance may be (a) Binary form (b) ASCII code form measured in (c) Decimal form (d) alphanumeric form (a) BPS (b) MIPS (c) MHz (d) VLSI 130. The ASCII code of A is (a) 66D (b) 41H 138. Stack overflow causes (c) (d) (a) Hardware interrupts (b) External interrupt 131. The ASCII code of 0 (zero) is.. (c) Internal interrupts (a) 30H (b) 32H (d) Software interrupt (c) (d) 42H Matoshri College of Engineering,Nasik Page 10

11 139. Which of the following is not possible by a microprocessor? (a) Reading from Memory (b) Writing into Memory (c) Reading from Input port (d) Writing into Input port Matoshri College of Engineering,Nasik Page 11

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