Power Reduction and Low Risk Implementation of UFS v2.0 Design
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1 Power Reduction and Low Risk Implementation of UFS v2.0 Design Hezi Saar Staff Product Marketing Manager Mobile Forum 2014 Copyright 2014 Synopsys
2 Agenda UFS system overview and challenges Power saving features and techniques in UFS sub-systems Reducing risk for current and future UFS implementations MIPI IP Solutions for Mobile SoCs Q&A
3 UFS System Overview and Challenges UFS Device Storage UniPro Tx Rx M-PHY Rx Tx M-PHY UniPro UFS Host Contrl System bus SoC Core Point to point topology Achieving throughput goals can be challenging Best practices are required to maximize throughput
4 How to Overcome Throughput Challenges? Configurable and scalable parameters assist in meeting required throughput Burst length (2 to 32) FIFOs / buffer sizes Data bus widths (currently 64, scalable to 128) Number of outstanding requests SoC Group acknowledge Rx Tx M-PHY Unipro UFS Host Contlr System Bus Core SW
5 Power Saving Features and Techniques in UFS sub-systems
6 UFS Power Mode State Machine MPHY low power states HIBERN8 STALL SLEEP UniPro low power states HIBERN8 SLEEP Further hooks DEEP SLEEP DEEP STALL UFS Power States
7 Additional Power Savings with Low Power Features & Techniques Clock Gating Reduces the dynamic power Power Gating Multi power rails Reduces the leakage power Deep power saving in Hibernate power state Only a small portion of the entire UFS Controller hierarchy will be on Always-On Power Domain; Rest of the core can be switched off
8 Clock Gating and Power Gating Clock Gating at various functional states: UFS idle Hibernate Power gated Hibernate Non active Tx Burst Power Gating states supported: S/W Hibernate: DWC_ufshc can be power gated when S/W programs Hibernate Entry through UIC command interface Auto Hibernate: DWC_ufshc can be power gated in AH8 state In the above states, PSW power domain can be switched off to save power
9 Multi Power Rails Implementation Always On Domain: Modules in this power domain are not switched off in Hibernate Power-Down Domain: Modules in this power domain can be switched off in Hibernate Power Domains are well mated to the UniPro and MPHY layers
10 Power Savings Achieved Few Examples % The numbers are normalized values with respect to Normal mode without any power saving technique applied
11 Reducing Risk for Current and Future UFS Implementations
12 Growth and Maturity in Mobile Devices Mainstream Smartphone High End Smartphone Tablet Portable PC Desktop PC Source: IDC Worldwide Quarterly Smart Connected Device Tracker, September 11, 2013
13 High End Mobile Market Commands Premium and Drives High end mobile device Innovation Feature-rich smartphones, tablets and laptops Multiple image sensors Very high resolution display High data traffic to the storage device Data transmission Image, video capture and playback
14 Development Costs Continue to Rise
15 Future Speeds Demand Scalable IP Features Scalable UFS Host and UniPro Controller IP features Without compromising on latency and operating frequency Wide and Flexible Data bus width Higher number of outstanding RTTs Out-of-order execution granularity on system bus side Future versions of the UFS Specification can (and will) demand higher throughput G3L2, G4L1 G3L4, G4L2 Architectural amenability to add Inline encryption schemes
16 Reducing Risk for Current and Future UFS Implementations UFS System should be: Driving and developing specifications for rapid adoption Compliant with latest JEDEC Universal Flash Storage (UFS) standard and JEDEC UFS Host Controller interface specification Integrated with UniPro Controller, compliant with latest MIPI Alliance UniPro specification Single traffic class Support M-PHY v3.x and access to attributes Gear4 Performance Low-power operation, small area, and low latency Deployed in UFS Host and Device ICs
17 MIPI IP Solutions for Mobile SoCs
18 Integrate High-Quality UFS IP in Mobile SoCs Future Proof, Interoperable Host & Device Solution Future Proof M-PHY, UFS IP Power Modes Compact and Configurable Host and Device Customers UFS Software Drivers Linux, OS-less UFS Host v2.00 Fully Verified, Gear3 UniPro v1.60 Fully Verified, Flexible Din C C Dout RMMI Prototyping System Deployed Silicon-Proven M-PHY HS-Gear3 Compliant to v3.x
19 MIPI Connectivity IP between Various ICs DesignWare MIPI IP Solutions JEDEC UFS v2.0 Contributor since 2006
20 Synopsys UFS Solution in Action Reads HD Video Stream from UFS Device and Plays on PC UFS Host System 3rd Party UFS Device M-PHY v3.0 UFS Host Controller
21 THANK YOU
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