PCMCIA / JEIDA SRAM Card
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1 Daashee PCMCIA / JEIDA SRAM Card Version 10 Preliminary Version 10 Page1
2 Documen Version Version Descripion Dae Edior Approved by 8 Updae 2, April, 2002 Greg Lin Greg Lin 9 Updae 10, Aug., 2010 Amos Chung Ken Liu 10 Daa Reenion 3, Nov, 2014 Ryan Lee Norman Chiu This documen provides informaion regarding o Preec PCMCIA / JEIDA SRAM Card produc specificaion and is subjec o change wihou any prior noice. No par in his repor shall be disribued, reproduced or disclosed in whole or in par wihou prior wrien permission of Preec. All righs reserved. PRETEC/C-ONE TECHNOLOGY CORP. Preliminary Version 10 Page2
3 Conens 1 INTRODUCTION GENERAL DESCRIPTION FEATURES PRODUCT NUMBER DEFINITION ORDERING INFORMATION PRODUCT SPECIFICATION PIN CONFIGURATION PIN DESCRIPTION BLOCK DIAGRAM PIN LOCATION RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS COMMENTS PRODUCT MODEL FUNCTION WITHOUT WRITE PROTECTED FUNCTION WITH WRITE PROTECTED COMMON MEMORY ADDRESS CONFIGURATION Using 8-bi Daa Bus (CE2*=V IH, CE1*=V I L) Using 8-bi Daa Bus (CE2*=V I L, CE1*=V IH) Using 16-bi Daa Bus (CE2*=V I L, CE1*=V I L) DC ELECTRICAL CHARACTERISTIC AC ELECTRICAL CHARACTERISTICS (COMMON MEMORY) Read Cycle Wrie Cycle Tes Condiions Inpu / Oupu Capaciance Timing Diagram AC ELECTRICAL CHARACTERISTICS (ATTRIBUTE MEMORY) Read Cycle Wrie Cycle Timing Diagram Baery Volage Deecion MAIN BATTERY SPECIFICATIONS Daa Reenion Tha Wihou Exernal Power Supply Preliminary Version 10 Page3
4 3.8. CARD DETECTION POWER-UP / POWER-DOWN CHARACTERISTICS Power-up Timing Diagram Power-down Timing Diagram OUTLINE DIMENSIONS...27 Preliminary Version 10 Page4
5 1 Inroducion 1.1. General Descripion Preec high performance SRAM cards conform o he PCMCIA / JEIDA inernaional sandard and consis of muliple very low power consumpion CMOS SRAM ICs, decoder IC and power conrol IC mouned on a very hin prined circui board using surface mouning echnology. Wih he dual back-up baery design, each SRAM card conains a replaceable bu non-rechargeable 3V lihium baery (main baery) and an on-board rechargeable bu non-replaceable baery (auxiliary baery) for daa reenion. This design allows replacemen of main baery wihou daa loss for 20 minues approximaely. Digial signals on he BVD1*/BVD2* pins were used o alarm he user wheher he main baery should be replaced o preven he sored daa from loss. Wih he flexible and user-friendly design, boh BR2325 and CR2025 can be used as main baery. There is baery case lock sysem o preven baery dropping from he card. Also, wih he wrie-proec swich design, daa will no be wrien ino he card by acciden. Memory card aribue informaion represens various aribue informaion of a card and is sored a EVEN address of an aribue memory space which is enabled by assering REG* signal. Regarding o he aribue informaion forma, please refer o he PCMCIA 2.0 or JEIDA 4.1 specificaion. Wih he flexible design of his series cards, hey provide 8K byes E2PROM available for aribue memory or here is no aribue memory Feaures Inerface: PCMCIA / JEIDA sandard Capaciy: 256K byes ~ 8M byes Daa bus selecable: Bye (x8) / word (x16) Buil-in wrie proec swich Credi card size: 54.0 x 85.6 x 3.3 (mm) Fas access ime: 120ns (maximum) Aribue memory: 8 KB (opional 2KB/0KB by special reques) Single +5V operaing volage Connecor ype: 2-piece, 2-row, 68 pins Baery: Dual back-up baery design Boh BR2325 and CR2025 used as main baery Baery volage deecion funcion Baery case lock sysem Preliminary Version 10 Page5
6 1.3. Produc Number Definiion X1 X2 X3 X4X5X6 - X7 SRAM CARD S: SRAM A/M ( Aribue Memory ) N: No A/M A: Wih 2KB Read/Wrie A/M 6: Wih 8KB Read/Wrie A/M Operaing Volage 5: 5V Memory Capaciy 256: 256KB 512: 512KB 001: 1MB 002: 2MB 004: 4MB 006: 6MB 008: 8MB Exended Temperaure None (Commercial): 0 C~+70 C I (Indusrial): -20 C ~ +85 C E (Exended): -40 C ~ +85 C Noe: A/M means aribue memory Preliminary Version 10 Page6
7 1.4. Ordering Informaion Commercial Grade: 0 C~+70 C Iem No. Par Number Capaciy Aribue Memory Descripion 1 SA KB 256KB 2KB A/M SRAM Card 2 SA KB 512KB 2KB A/M SRAM Card 3 SA5001 1MB 1MB 2KB A/M SRAM Card 4 SA5002 2MB 2KB E 2 PROM 2MB 2KB A/M SRAM Card 5 SA5004 4MB 4MB 2KB A/M SRAM Card 6 SA5006 6MB 6MB 2KB A/M SRAM Card 7 SA5008 8MB 8MB 2KB A/M SRAM Card 8 S KB 256KB 8KB A/M SRAM Card 9 S KB 512KB 8KB A/M SRAM Card 10 S MB 1MB 8KB A/M SRAM Card 11 S MB 8KB E 2 PROM 2MB 8KB A/M SRAM Card 12 S MB 4MB 8KB A/M SRAM Card 13 S MB 6MB 8KB A/M SRAM Card 14 S MB 8MB 8KB A/M SRAM Card 15 SN KB 256KB no A/M SRAM Card 16 SN KB 512KB no A/M SRAM Card 17 SN5001 1MB 1MB no A/M SRAM Card 18 SN5002 2MB None 2MB no A/M SRAM Card 19 SN5004 4MB 4MB no A/M SRAM Card 20 SN5006 6MB 6MB no A/M SRAM Card 21 SN5008 8MB 8MB no A/M SRAM Card Preliminary Version 10 Page7
8 Indusrial grade: -20 C ~ +85 C Iem No. Par Number Capaciy Aribue Memory Descripion 1 SA5256-I 256KB 256KB 2KB A/M SRAM Card 2 SA5512-I 512KB 512KB 2KB A/M SRAM Card 3 SA5001-I 1MB 1MB 2KB A/M SRAM Card 4 SA5002-I 2MB 2KB E 2 PROM 2MB 2KB A/M SRAM Card 5 SA5004-I 4MB 4MB 2KB A/M SRAM Card 6 SA5006-I 6MB 6MB 2KB A/M SRAM Card 7 SA5008-I 8MB 8MB 2KB A/M SRAM Card 8 S65256-I 256KB 256KB 8KB A/M SRAM Card 9 S65512-I 512KB 512KB 8KB A/M SRAM Card 10 S65001-I 1MB 1MB 8KB A/M SRAM Card 11 S65002-I 2MB 8KB E 2 PROM 2MB 8KB A/M SRAM Card 12 S65004-I 4MB 4MB 8KB A/M SRAM Card 13 S65006-I 6MB 6MB 8KB A/M SRAM Card 14 S65008-I 8MB 8MB 8KB A/M SRAM Card 15 SN5256-I 256KB 256KB no A/M SRAM Card 16 SN5512-I 512KB 512KB no A/M SRAM Card 17 SN5001-I 1MB 1MB no A/M SRAM Card 18 SN5002-I 2MB None 2MB no A/M SRAM Card 19 SN5004-I 4MB 4MB no A/M SRAM Card 20 SN5006-I 6MB 6MB no A/M SRAM Card 21 SN5008-I 8MB 8MB no A/M SRAM Card Preliminary Version 10 Page8
9 Exended grade: -40 C ~ +85 C Iem No. Par Number Capaciy Aribue Memory Descripion 1 SA5256-E 256KB 256KB 2KB A/M SRAM Card 2 SA5512-E 512KB 512KB 2KB A/M SRAM Card 3 SA5001-E 1MB 1MB 2KB A/M SRAM Card 4 SA5002-E 2MB 2KB E 2 PROM 2MB 2KB A/M SRAM Card 5 SA5004-E 4MB 4MB 2KB A/M SRAM Card 6 SA5006-E 6MB 6MB 2KB A/M SRAM Card 7 SA5008-E 8MB 8MB 2KB A/M SRAM Card 8 S65256-E 256KB 256KB 8KB A/M SRAM Card 9 S65512-E 512KB 512KB 8KB A/M SRAM Card 10 S65001-E 1MB 1MB 8KB A/M SRAM Card 11 S65002-E 2MB 8KB E 2 PROM 2MB 8KB A/M SRAM Card 12 S65004-E 4MB 4MB 8KB A/M SRAM Card 13 S65006-E 6MB 6MB 8KB A/M SRAM Card 14 S65008-E 8MB 8MB 8KB A/M SRAM Card 15 SN5256-E 256KB 256KB no A/M SRAM Card 16 SN5512-E 512KB 512KB no A/M SRAM Card 17 SN5001-E 1MB 1MB no A/M SRAM Card 18 SN5002-E 2MB None 2MB no A/M SRAM Card 19 SN5004-E 4MB 4MB no A/M SRAM Card 20 SN5006-E 6MB 6MB no A/M SRAM Card 21 SN5008-E 8MB 8MB no A/M SRAM Card Preliminary Version 10 Page9
10 2. Produc Specificaion 2.1. Pin Configuraion Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name Pin No GND D3 D4 D5 D6 D7 CE1* A10 OE* A11 A9 A8 A A14 WE* BUS Y* VCC VPP1 A16 A15 A12 A7 A6 A5 A4 A A2 A1 A0 D0 D1 D2 WP GND GND CD1* D11 D12 D D14 D15 CE2* VS1* NC NC A17 A18 A19 A20 A21 VCC VPP Pin Name A22 A23 A24 A25 VS2* RES ET WAIT * NC REG* BVD2 * BVD1 * D8 D9 Pin No Pin Name D10 CD2* GND Noe: * mean low acive VPP1, VPP2, A23, A24, A25, RESET, WAIT* is NC CD1*, CD2* conneced o ground Preliminary Version 10 Page10
11 2.2. Pin Descripion Symbol Funcion I/O A0 - A23 Addresses I D0 - D15 Daa Inpus/Oupus I/O CE1*/CE2* Card Enable I OE* Oupu Enable I WE* Wrie Enable I REG* Aribue Memory Enable I WP Wrie-proec Deec O BVD1*/BVD2* Baery Volage Deec O BUSY* Busy Oupu (Open drain) O CD1*/CD2* Card Deec (ied o GND inernally) O VCC +5 Vol Power Supply (3.3Vol opional) - GND Ground - NC No Connecion - Noe: * mean low acive 2.3. Block Diagram (256KB - 8MB SRAM Card) Figure 1: The Block Diagram of SRAM Card Noe: A0, A21, A22 are chip decoding address pins. Preliminary Version 10 Page11
12 2.4. Pin Locaion Figure 2: Boom View (Connecor Side) 2.5. Recommended Operaing Condiions Parameer Symbol Min. Max. Uni Supply Volage VCC V Inpu High Volage VIH 0.7VCC VCC V Inpu Low Volage VIL V Baery Volage VBAT V Operaing Temperaure (Commercial) TOPR 0 60 C Operaing Temperaure (Indusrial) TOPR C Relaive Humidiy (non-condensing) HUM - 95 % 2.6. Absolue Maximum Raings Parameer Symbol Value Uni Supply Volage VCC -0.5 o V Inpu Volage VIN -0.5 o VCC (6V max.) V Oupu Volage VOUT -0.5 o V Operaing Temperaure (Commercial) TOPR -10 o + 70 C Sorage Temperaure (Commercial) TSTR -20 o + 70 C Operaing Temperaure (Indusrial) TOPR -40 o + 85 C Sorage Temperaure (Indusrial) TSTR -40 o + 85 C Relaive Humidiy (non-condensing) HUM 95 (maximum) % 2.7. Commens Sress above hose lised under Absolue Maximum Raings may cause permanen damage o he producs. These are sress raing only. Funcional operaion of hese producs a hese or any oher condiions above hose indicaed in he operaional secions of his specificaion is no implied. Exposure o absolue maximum raing condiions for exended periods may affec produc reliabiliy Preliminary Version 10 Page12
13 3. Produc Model 3.1. Funcion wihou wrie proeced Funcion REG* CE2* CE1* A0 OE* WE* WP D15 - D8 D7 - D0 Read C/M (x8) H H L L L H L High - Z Even Bye Daa Ou Read C/M (x8) H H L H L H L High - Z Odd Bye Daa Ou Read C/M (x8) H L H X L H L Odd Bye Daa Ou High - Z Read C/M (x16) H L L X L H L Odd Bye Daa Ou Even Bye Daa Ou Wrie C/M (x8) H H L L H L L X Even Bye Daa In Wrie C/M (x8) H H L H H L L X Odd Bye Daa In Wrie C/M (x8) H L H X H L L Odd Bye Daa In X Wrie C/M (x16) H L L X H L L Odd Bye Daa In Even Bye Daa In Sandby X H H X X X L High - Z High - Z Oupu Disable X X X X H H L High - Z High - Z Read A/M (x8) L H L L L H L High - Z Even Bye Daa Ou Read A/M (x8) L H L H L H L High - Z Daa Ou (invalid) Read A/M (x8) L L H X L H L Daa Ou (invalid) High - Z Read A/M (x16) L L L X L H L Daa Ou (invalid) Even Bye Daa Ou Wrie A/M (x8) L H L L H L L X Even Bye Daa In Wrie A/M (x8) L H L H H L L X X Wrie A/M (x8) L L H X H L L X X Wrie A/M (x16) L L L X H L L X Even Bye Daa In Noe: * mean low acive Preliminary Version 10 Page13
14 3.2. Funcion wih wrie proeced Funcion REG* CE2* CE1* A0 OE* WE* WP D15 - D8 D7 - D0 Read C/M (x8) H H L L L H H High - Z Even Bye Daa Ou Read C/M (x8) H H L H L H H High - Z Odd Bye Daa Ou Read C/M (x8) H L H X L H H Odd Bye Daa Ou High - Z Read C/M (x16) H L L X L H H Odd Bye Daa Ou Even Bye Daa Ou Wrie C/M (x8) H H L L H L H X X Wrie C/M (x8) H H L H H L H X X Wrie C/M (x8) H L H X H L H X X Wrie C/M (x16) H L L X H L H X X Sandby X H H X X X H High - Z High - Z Oupu Disable X X X X H H H High - Z High - Z Read A/M (x8) L H L L L H H High - Z Even Bye Daa Ou Read A/M (x8) L H L H L H H High - Z Daa Ou (invalid) Read A/M (x8) L L H X L H H Daa Ou (invalid) High - Z Read A/M (x16) L L L X L H H Daa Ou (invalid) Even Bye Daa Ou Wrie A/M (x8) L H L L H L H X X Wrie A/M (x8) L H L H H L H X X Wrie A/M (x8) L L H X H L H X X Wrie A/M (x16) L L L X H L H X X Noe: Definiion: C/M = Common Memory, A/M = Aribue Memory L = VIL; H = VIH; X = Don care (can be eiher VIH or VIL) * mean low acive Preliminary Version 10 Page14
15 3.3. Common Memory Address Configuraion Using 8-bi Daa Bus (CE2*=V IH, CE1*=V I L ) A23 o A0 D15 -- D8 D7 -- D High - Z Address High - Z Address High - Z Address High - Z Address High - Z Address High - Z Address Using 8-bi Daa Bus (CE2*=V I L, CE1*=V IH ) A23 o A0 D15 -- D8 D7 -- D X Address 1 High - Z X Address 3 High - Z X Address 5 High - Z X Address High - Z X Address High - Z X Address High - Z Using 16-bi Daa Bus (CE2*=V I L, CE1*=V I L ) A23 o A0 D15 -- D8 D7 -- D X Address 1 Address X Address 3 Address X Address 5 Address X Address Address X Address Address X Address Address Noe: The above ables are examples for 8M byes / 4M words SRAM cards. Definiion: L = VIL; H = VIH; X = Don care (can be eiher VIH or VIL) Preliminary Version 10 Page15
16 3.4. DC Elecrical Characerisic Symbol Parameer - Min. Max. Uni Tes Condiions ua VIN = 0V o Vcc (Noe 3) ILI Inpu Leakage Curren ua VIN = 0V o Vcc (Noe 4) Noe: ILO Oupu Leakage Curren ua CE1* = CE2* = VIH or OE* = VIH, VI/O = 0V o Vcc (Noe 1) VOH Oupu High Volage V IOH = -2mA (Noe 2) VOL Oupu Low Volage V IOL = 3.2mA (Noe 2) VIH Inpu High Volage - 0.7V Vcc+ V - VIL Inpu Low Volage V V - ICC Vcc Operaing Curren ma Min. cycle, IOu = 0mA ISB IBU VBDET1 VBDET2 Vcc Sandby Curren ( CE1* = CE2* = VIH or CE1* = CE2 * VCC - 0.2V ) Baery Back-up Curren (All pins open, VBAT = 3V Vcc = 0V) Baery Deec Reference Volage 1 Baery Deec Reference Volage Excep BVD1*, BVD2*, CD1*, CD2* pins 2. Excep CD1*, CD2* pins 3. Excep CE1*, CE2*, WE*, REG* pins 4. For CE1*, CE2*, WE*, REG* pins 0.1 ma For page 7 & 8, iem ma For page 7 & 8, iem ma For page 7 & 8, iem ma For page 7 & 8, iem ma For page 7 & 8, iem ma For page 7 & 8, iem ma For page 7 & 8, iem ma For page 7 & 8, iem 1 & ma For page 7 & 8, iem 2 & ma For page 7 & 8, iem 3 & ma For page 7 & 8, iem 4 & ma For page 7 & 8, iem 5 & ma For page 7 & 8, iem 6 & ma For page 7 & 8, iem 7 & ua 1uA (Ta = 25 C) 5-80 ua 2uA (Ta = 25 C) 1-50 ua 1uA (Ta = 25 C) ua 2uA (Ta = 25 C) M4-200 ua 4uA (Ta = 25 C) ua 4uA (Ta = 25 C) ua 8uA (Ta = 25 C) V 2.37V (Typ.) Vcc = 5V, Ta = 25 C V 2.65V (Typ.) Vcc = 5V, Ta = 25 C Preliminary Version 10 Page16
17 3.5. AC Elecrical Characerisics (Common Memory) Read Cycle Symbol Parameer Min. Max. Uni cr Read Cycle Time ns a(a) Address Access Time ns a(ce) Card Enable Access Time ns a(oe) Oupu Enable Access Time - 60 ns dis(ce) Oupu Disable Time (CE*) - 60 ns dis(oe) Oupu Disable Time (OE*) - 60 ns en(ce) Oupu Enable Time (CE*) 5 - ns en(oe) Oupu Enable Time (OE*) 5 - ns v(a) Daa Hold Time (from address changed) 0 - ns Wrie Cycle Symbol Parameer Min. Max Uni cw Wrie Cycle Time ns w(we) Wrie Pulse Widh 80 - ns su(a) Address Seup Time 20 - ns su(a-weh) Address Seup Time (WE*) ns su(ce-weh) CE* Seup Time (WE*) ns su(d-weh) Daa Seup Time (WE*) 50 - ns h(d) Daa Hold Time 20 - ns rec(we) Wrie Recovery Time 20 - ns dis(we) Oupu Disable Time (WE*) - 60 ns dis(oe) Oupu Disable Time (OE*) - 60 ns en(we) Oupu Enable Time (WE*) 5 - ns en(oe) Oupu Enable Time (OE*) 5 - ns en(oe-we) Oupu Enable Seup Time (WE*) 10 - ns h(oe-we) Oupu Enable Hold Time (WE*) 10 - ns Preliminary Version 10 Page17
18 Tes Condiions Inpu Pulse Level VOH = 0.7Vcc, VIL= 0.8V Inpu Rise and Fall Time 5ns (max) Timing Measuremen Reference Level VIH / VIL = 2.4V / 0.6V, VOH / VOL = 2V / 0.8V Oupu Load 1TTL Gae + 100PF (Figure 3) Figure 3: The Tes Condiions of AC Characerisics Inpu / Oupu Capaciance (Ta = 25 C, f = 1MHZ, Vin/Vou = 0V), hese parameers are sampled no 100% esed. Symbol Parameer Min. Max. Uni Cin Inpu Capaciance PF Ci/o I/O Capaciance - 35 PF Preliminary Version 10 Page18
19 Timing Diagram Read Cycle (WE*=REG*=VIH) Address (A0-An) a(a) cr v(a) CE1* or/and CE2* a(ce) dis(ce) OE* a(oe) Daa Ou High-Z en(ce) en(oe) DATA VALID dis(oe) Figure 4: The Timing Diagram of Read Cycle (Common Memory) Noe: 1. For 64KB, An = A KB, An = A KB, An = A KB, An = A18. 1MB, An = A19. 2MB, An = A20. 4MB, An = A21 6MB, An = A The shaded area may be eiher high or low. Wrie Cycle (REG*=VIH, WE* conrolled) Address (A0-An) CW CE1* or/and CE2* su(a-weh) su(ce-weh) OE* WE* su(a) su(oe-we) w(we) rec(we) h(oe-we) su(d-weh) h(d) Daa In High-Z DATA INPUT VALID Daa Ou dis(oe) dis(we) High-Z en(oe) en(we) Figure 5: The Timing Diagram of Wrie Cycle (REG*=VIH, WE* conrolled) (Common Memory) Preliminary Version 10 Page19
20 Wrie Cycle (CE* conrolled, OE*=REG*=VIH) Address (A0-An) CE1* or/and CE2* WE* su(a) su CW (CE-WEH) rec (WE) Daa In High-Z su (D-WEH) DATA INPUT VALID h (D) Figure 6: The Timing Diagram of Wrie Cycle (CE* conrolled, OE*=REG*=VIH) Noe: 1. For 64KB, An = A KB, An = A KB, An = A KB, An = A18. 1MB, An = A19. 2MB, An = A20. 4MB, An = A21 6MB, An = A The shaded area may be eiher high or low Preliminary Version 10 Page20
21 3.6. AC Elecrical Characerisics (Aribue Memory) Read Cycle Symbol Parameer Min. Max Uni cr Read Cycle Time ns a(a) Address Access Time ns a(ce) Card Selec Access Time ns a(oe) Oupu Enable Access Time ns dis(ce) Oupu Disable Time (from CE*) ns dis(oe) Oupu Disable Time (from OE*) ns en(ce) Oupu Enable Time (from CE*) 5 - ns en(oe) Oupu Enable Time (from OE*) 5 - ns v(a) Daa Hold Time (from address changed) 0 - ns Wrie Cycle Symbol Parameer Min. Max. Uni cw Wrie Cycle Time - 1 ms AS Address Seup Time 30 - ns AH Address Hold Time 50 - ns WP Wrie Pulse Widh ns CS Card Enable Time o WE* 15 - ns CH Card Enable Hold Time from WE* High 0 - ns DS Daa Seup Time 70 - ns DH Daa Hold Time 30 - ns OES OE* Seup Time 30 - ns OEH OE* Hold Time 30 - ns DB Delay from WE* high o BUSY* Assered - 50 ns Preliminary Version 10 Page21
22 Timing Diagram Read Cycle (REG*=VIL, WE*=VIH) Address (A1-A11) a(a) cr v(a) CE1* or/and CE2* a(ce) dis(ce) OE* Daa Ou en(ce) en(oe) a(oe) DATA VALID dis(oe) Figure 7: The Timing Diagram of Read Cycle (Aribue Memory) Wrie Cycle (REG*=VIL) Address (A1-A11) AH CE1* or/and CE2* CS CH WE* AS WP OE* OES OEH h(d) DS Daa In DATA INPUT VALID RDY/BUSY* DB CW Figure 8: The Timing Diagram of Wrie Cycle (Aribue Memory) Preliminary Version 10 Page22
23 Baery Volage Deecion BVD1*/BVD2* pins are used o monior he volage of he main baery which should be mainained a 2.65V or greaer for daa reenion. The following able described he main baery saus by reading he signals on BVD1*/BVD2* pins. BVD1* BVD2* Main Baery Commens H H VBAT 2.65V Daa reenion is OK. Baery is operaional H L 2.37V VBAT 2.65V Daa reenion is OK. Bu baery should be replaced. L L VBAT 2.37V Daa inegriy is no guaraneed. Baery mus be replaced. Noe: if he main baery is removed, BVD1* and BVD2* pins will no funcion 3.7. Main Baery Specificaions 3V Lihium baery Diameer Thickness Brand Model No. RAYOVAC BR mm 2.5mm FDK CR2325 PANASONIC BR2325 Recommended pars (Please refer o he able below) Diameer Thickness Brand Model No. TOSHIBA CR mm 2.5mm FDK CR2025 PANASONIC CR2025 Preliminary Version 10 Page23
24 Daa Reenion Tha Wihou Exernal Power Supply (Ta=25 C, Humidiy=60% R.H.) Parameer Memory Size Memory Back-up ime Unis Condiion 256KB KB 18 Baery backup ime is a Baery 1MB 18 calculaed value and is no Backup 2MB 18 Monhs guaraneed. This is should no Time 4MB 10 be use o schedule baery 6MB 7 recharging ( Temp. 25 C) 8MB 5 Noe: Baery Backup ime is densiy and emperaure dependen. For baery back-up ime denoe using Card Deecion CD1*, CD2* pins are used o deec he inserion of he card ino he sysem. When he memory card has been correcly insered, CD1* and CD2* are deeced by he sysem. The recommended circui in he sysem side is shown in figure below. VCC (A) VCC CD1* (B) CD2* Figure 9: The Card Deecion Preliminary Version 10 Page24
25 3.9. Power-up / Power-down Characerisics Symbol Parameer Min. Max. Uni Condiion 0 ViMAX *1 V 0V VCC 2.0 *2 Vi(CE) CE* Signal Level VCC-0.1 ViMAX V 2.0 VCC VIH VIH ViMAX V VIH VCC Noe: su(vcc) CE* Seup Time 20 - ms 10ms (Typ.) rec(vcc) CE* Recovery Time 1 - us - Tpr *3 VCC Rising Time ms 10% 90% (VCC+5%) Tpf *3 VCC Falling Time ms 90% (VCC-5%) 10% 1. ViMAX means absolue maximum volage for inpu. 2. For he period 0V VCC 2.0V, power supply volage is low, so 0V~ ViMAX is permied, because he logic for he sysem inerface IC may no be deermined. 3. The Tpr and Tpf are defined as "linear waveform" in he period of 10% o 90%. Even if he waveform is no "linear waveform", is rising and falling ime mus mee his specificaion Power-up Timing Diagram pr VCC SU(VCC) V ih 2V CE1*,CE2* Figure 10: Power-up Timing Diagram Preliminary Version 10 Page25
26 Power-down Timing Diagram VCC pf rec(vcc) V ih CE1*,CE2* 2V Figure 11: Power-down Timing Diagram Preliminary Version 10 Page26
27 3.10. Ouline Dimensions (Uni: mm) Figure 12: Ouline dimensions of SRAM Card This documen provides informaion regarding o Preec SRAM Card wih wo rechargeable baeries produc specificaion and is subjec o change wihou any prior noice. No par in his repor shall be disribued, reproduced or disclosed in whole or in par wihou prior wrien permission of Preec. All righs reserved. Preec/C-ONE Technology Corp Preliminary Version 10 Page27
PCMCIA / JEIDA SRAM Card
Daashee PCMCIA / JEIDA SRAM Card Version 12 Preliminary Version 12 Page1 Documen Version Version Descripion Dae Edior Approved by 8 Updae 2,Apr. 2002 Greg Lin Greg Lin 9 Updae 10,Aug. 2010 Amos Chung Ken
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