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1 /4/7 Spring 7 EE 363: Computer Orgniztion Arithmetic for Computers Numer Representtion & ALU Avinsh Kodi Deprtment of Electricl Engineering & Computer Science Ohio University, Athens, Ohio 457 E-mil: kodi@ohio.edu Wesite: Acknowledgement: Srinivsn Rmsurmnin, Mry J. Irwin, PSU Course Administrtion Homework A due next Fridy /3 Get strted with Qt-SPIM

2 /4/7 Arithmetic Where we hve een Performnce (seconds, cycles, instructions) Astrctions Instruction Set Architecture Assemly Lnguge nd Mchine Lnguge (SPIM) Opertion Wht s up hed? Implementing the rchitecture (Chpter 3) 3 result 3 Numers Bits re just its (no inherent mening) Conventions define reltionship etween its nd numers Binry numers (se ) Deciml. n - Of course it gets more complicted Numers re finite (overflow) Frctions nd rel numers Negtive numers How do we represent negtive numers? i.e. which it pttern will represent which numers?

3 /4/7 Possile Representtions Code Signed Mgnitude One s Complement Two s Complement Issues: lnce, numer of zeros, ese of opertion Which one is est? Why? Numer Representtion 3 it signed numers = = = =, 47,483, 646 =, 47,483, 647 = -, 47, 483, 648 = -, 47, 483, 647 = -, 47, 483, 646 = - = - 3

4 /4/7 Two s Complement Opertions Representing positive nd negtive numers (3-3 ) (3 3 ) (9 9 ) ( ) ( ) Negting two s complement numer: invert ll its nd dd Rememer: negte nd invert re quite different Converting n its numers into numers with more thn n its MIPS 6 it immedite gets converted to 3 its for rithmetic Copy the most significnt it (sign it) into the other its s Complement Binry Representtion Negte nd dd complement ll the its Note: negte nd invert re different! - 3 = -( 3 - ) = 3 - = sc inry deciml

5 /4/7 Addition nd Sutrction Just like in high school (crry/orrow s) Add 6 to 7 Sutrct 6 from 7 - Sutrct 6 from 7 (in two s complement) Overflow (result too lrge for finite computer word) Eg. Adding two n-it numers does not yield n n-it numers Adder: Boolen Alger A B Crry In Crry Out SUM Crry Out = A.B B.CI A.CI SUM = A.B.CI A.B.CI A.B.CI A.B.CI 5

6 /4/7 One-it Adder Tkes three input its nd genertes two output its Multiple its cn e cscded result () () () () () () () Detecting Overflow Overflow: the result is too lrge to represent in 3 its Overflow occurs when dding two positives yields negtive or, dding two negtives gives positive or, sutrct negtive from positive gives negtive or, sutrct positive from negtive gives positive On your own: Prove you cn detect overflow y: Crry into MSB xor Crry out of MSB, ex for 4 it signed numers

7 /4/7 Effects of Overflow An exception (interrupt) occurs Control jumps to predefined ddress for exception Interrupted ddress is sved for possile resumption Detils sed on softwre system/lnguge Don t lwys wnt to detect overflow New MIPS instructions: ddu, ddiu, suu Review: Boolen Alger nd Gtes Prolem: Consider logic function with 3 inputs: A, B nd C Output D is true if tlest one input is true Output E is true if exctly two inputs re true Output F is true if ll three inputs re true Show the truth tle for these three functions Show the Boolen equtions for these three functions Show n implementtion consisting of inverters, OR nd AND gtes A B C D E F D = E = F = 7

8 /4/7 An ALU (Arithmetic Logic Unit) Let s uild n ALU to support nd nd or instructions We will uild -it ALU nd use 3 of them Op A B Result result Possile Implementtion (sum-of-products) Not esy to decide the est wy to uild something Building 3-it ALU (AND, OR nd ADD) opertion opertion ALU result Result ALU result ALU result 3 3 ALU 3 result 3 8

9 /4/7 Wht out sutrction? Two s complement pproch Negte nd dd NOR implementtion ( ) =. Binvert opertion Ainvert Binvert opertion Result Result Supporting slt nd Overflow Detection Cn you figure out the ide? Ainvert Binvert opertion Result Ainvert Binvert opertion Result 3 3 Overflow Detection Set 9

10 /4/7 A 3-Bit ALU A ripple crry ALU B invert opertion Two its to decide ADD/SUB AND OR LESS A crry-in it Comine with Binvert to otin Bnegte result ALU result ALU result ALU Bit 3 genertes set nd overflow How to implement rnch instructions? 3 result 3 3 ALU 3 Set Overflow Test for Equlity Notice the control lines = AND = OR = ADD = SUBTRACT = SLT B negte ALU ALU ALU opertion Zero 3 3 ALU 3 Set Overflow

11 /4/7 Conclusions We cn uild ALU to support the MIPS instruction set Key Ide: Use multiplexor to select the output we wnt Efficiently perform sutrction using two s complement Replicte -it ALU to produce 3-it ALU Importnt points out hrdwre All of the gtes re lwys working The speed of the gte is ffected y the numer of inputs to the gte The speed of circuit is ffected y the numer of gtes in series (on the criticl pth or the deepest level of logic )