Direct Imaging Solutions for Advanced Fan-Out Wafer-Level and Panel-Level Packaging

Transcription

1 Semicon Europe 2018 Direct Imaging Solutions for Advanced Fan-Out Wafer-Level and Panel-Level Packaging November 16, 2018 by Mark Goeke SCREEN SPE Germany GmbH 1

2 SCREEN Semiconductor s Target Market Target Markets Clean/Etch Track Anneal *2018 Forecast Source: Gartner (Forecast: Semiconductor Manufacturing Equipment, Worldwide, 4Q17 Update) 2 Inspection

3 Global Ranking of Semiconductor Equipment Manufacturers Company Revenue Share 1 Applied Materials Lam Research Tokyo Electron ASML KLA-Tencor SCREEN Semiconductor Solutions $1389.5M 2.7% 7 SEMES Hitachi High-Technologies Hitachi Kokusai Electric Daifuku Source: Gartner (Market Share: Semiconductor Manufacturing Equipment, Worldwide, CY2017 Update) 3

4 Semiconductor Solutions Product Portfolio Cutting-edge Devices 250nm+ New 130 DW-3000/6000 nm LA-3100 DT-3000 Flash Lamp Annealer LT-3000/3100 Coat/Develop Track Laser Annealer Direct Imaging System for Adv. Packaging 90 New nm ZI/VM/RE Inspection & Measurement System nm SS-3200 FC-3100 Spin Scrubber Wet Station Spray Coater SU-3200 Single Wafer Cleaner New 28 nm CW-2000 Compact Wet Station 14 SU-3300 Single Wafer Cleaner 5-7nm 4 nm SC-80EX Coat/Develop Track SU-2000 Single Wafer Cleaner SK-60EX/80EX IoT Applications SS-80EX Spin Scrubber

5 Evolution of Packaging Technology Intel Corp. Flip Chip CSP 1980s Smaller package Fan-in wafer level packaging Thinner package NXP More I/O More functions NXP Faster processing heterogeneous package today 5 Fan-out wafer level packaging 2020 and beyond

6 Lithography Steps in Die First FO-WLP/PLP Front-end process completion on wafer Test & saw Die mount & molding WLP Dielectric layer RDL layer PLP Bump 1RDL, 2RDLs, 3RDLs,.. Singulation RDL : Re-distribution layer 6

7 Package Substrate Trend The industry is looking for larger substrate in order to reduce cost! mm square 200mm 300mm 300mm square Number of dies per substrate (x2.5) 900 (x3.2) (x12.9) * based on 5mm square die with 10mm pitch. 7

8 Key Lithography Challenges 8

9 FOWLP Lithography - Most Important Process Steps 1st Dielectric High FT, Topo 2nd Dielectric High FT SEM image by Nanium RDL Patterning Resolution down to L/S 2µm Topo 9

10 Direct Imaging Tool for Advanced Semiconductor Packaging DW-3000 Specification Exposure Method Maskless Direct Imaging Light Modulation Grating Light Valve (GLV) Wavelenght 355nm (laser, solid state) Resolution 3µm / 2µm NA 0,1 / 0,2 Optical Projection System 5x / 10x Overlay Accuracy < 1µm ( M +3σ ) i-line Direct Imaging Tool Set DW

11 GLV Light Modulation Device Mobile PCs Smart phones The spatial light modulator enables flexible exposure on to distorted substrate. 11 Servers

12 RDL Patterning Results: Positive Tone CAR for Cu Plating 2.0um L/S Focus latitude (FT=5µm) Vertical line -2um -4um -6um -8um +2um +4um +6um +8um -2um -4um -6um -8um +2um +4um +6um +8um 0um Dose 120mJ/cm2 Substrate Cu seed Resist CAR Resist thickness 5um Horizontal line 0um 12 Focus range 10um

13 Mold Substrate Topography Die embedded mold substrate with copper seed Die surface is ~10um higher than mold substrate surface. um position y-direction 13

14 Linear & Non-Linear Distortion Top view of mold substrate expand random distortion shrink Vias may be off of pad. Die-by-die alignment will be required. 14 Die

15 Multi Chip Module Package If dies are perfectly mounted, RDL lines can be generated as designed. Disconnected lines due to die shift Reality is that dies shift in x, y and θ. 15

16 Example of Auto Wiring Data Correction Auto wiring exposure data was created based on the actual measurement result of chip dislocation amount. Small chip Large chip Yellow line: Original design data Purple line: After auto-wiring correction calculation 16

17 Alignment system on DW-3000/6000 Three types of distortion with package substrate Linear distortion Non-linear distortion Reconstituted substrate (Chip first) Wafer shrink Wafer expand Redistribution Non-linear distortion Thinned Wafer Panel PCB Mold Wafer Global Alignment Local Alignment Adjust position X and Y, Adjust non-linear distortion for shrinkage/expansion, and theta (θ) entire wafer/substrate. for entire wafer/substrate. 17 Die-by-die Alignment

18 Example - Die Shift Measurements on Reconstituted Wafer Reconfiguration error Axis Error Average 3σ X Y 1.976um um um um Dies are independently and randomly shifted and rotated on the substrate. 10um + : Designed die location + : Actual die location 18

19 Exposure Result Comparison between Two Methods Global alignment Die-by-die alignment C1 C6 C11 C16 C21 C1 C6 C11 C16 C21 C2 C7 C12 C17 C22 C2 C7 C12 C17 C22 C3 C8 C13 C18 C3 C8 C13 C18 C4 C9 C14 C19 C4 C9 C14 C19 C5 C10 C15 C20 C5 C10 C15 C20 19 Solutions Co., SCREEN Semiconductor Ltd.

20 Requirements Exposure Tool for Advanced Packaging (1/2) Exposure tool in advanced packaging shall equip such functions described below along with existing exposure tool. 1. Resolution The industry is looking for 2um L/S RDL features for their near future product. The exposure tool must meet the specification for development of those package as of today. 2. DOF Package substrates usually have topography on the surface. The exposure tool must cover such topography while maintaining resolution requirement. 3. Handling of large substrate Maximum size for advanced package seems 550 x 650mm. However there are several substrate size around 500mm as well. The exposure tool must handle those sizes. 20

21 Requirements Exposure Tool for Advanced Packaging (2/2) 4. Handling warped substrate Chip first type substrates tend to have warpage of several mm s. They can be concave ( ), convex ( ), or even randomly both (potato chip style ). The exposure tool must be able process such substrates and make them flat on to exposure chuck when being exposed. 5. Optimized alignment function to package substrate Unlike silicon wafers, package substrates tend to have distortion. They are linear, non-linear or random shift. The tool must equip functions for compensation. 6. Multi Chip Module application If neighborhood chips that are to be connected by RDL each other and they shift randomly on the mold substrate, it will be difficult to connect lines between two chips. The exposure tool must equip function to solve the issue. 21

22 DW-Series Direct Imaging Tool DW-3000 For 200/300mm wafers DW-6000 Up to 550 x 650mm substrate Features High Power Laser at 355nm (i-line) Local Alignment / die-by-die alignment Function Lower NA Optical System (2um or 3um L/S) Overlay: 1um for wafer, 2um for panel 22

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