Decomposition of Grey-Scale Morphological Structuring Elements in Hardware
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1 Decomposton of Grey-Scale Morpholocal Structurn Elements n Hardware I Andreads, C Fyrndes, A Gasteratos and Y Boutals Secton of Electroncs & Informaton Systems Technoloy Department of Electrcal & Computer Enneern Democrtus Unversty of Thrace GR-67 Xanth, Greece E-mal: andread@eeduthr Abstract- Morpholocal mae processn machnes are not capable of handln lare-sze structurn elements A new archtecture for fast executon of the eroson/dlaton operatons n an up to -pxel, arbtrarly shaped, mae wndow throuh decomposton of rey-scale morpholocal structurn element nto 3 3-pxel sub-domans s presented n ths paper The proposed hardware structure has been also mplemented n VLSI and ts throuhput rate s Mbytes/sec Keywords: Computer vson, mathematcal morpholoy, ASICs Introducton Mathematcal morpholoy s a methodoloy for mae analyss and mae processn based on set theory and topoloy [5] The two basc morpholocal operatons are eroson and dlaton, from whch all the other operatons and transforms are composed In mathematcal morpholoy prmtve role plays the structurn element Ths s sequentally translated throuh the mae and t s compared wth the reon t overlays Varous structurn elements are used to perform morpholocal operatons Several applcatons such as textural sementaton and ranulometry requre the applcaton of successve larer structurn elements However, n specal purpose morpholocal processors the sze of structurn elements s restrcted to 3 3 pxels [3] Thus, applyn a lare-sze structurn element on a machne capable of handln certan sze structurn elements s not a strahtforward process In order to overcome ths problem, decomposton of the structurn element should be utlsed In fact ths problem has concerned many researchers both for bnary [4,7] and rey-scale morpholoy [,2,6] One decomposton stratey s to present the structurn element as successve dlatons of smaller structurn elements Alorthms for optmal structurn element decomposton accordn to ths stratey are descrbed n [, 4, 7] Alorthms for decomp osn rey-scale structurn elements wth rectanular support nto horzontal and vertcal structurn elements are presented n [2] Several methods for decomposn structurn elements nto combned structures of semented small components are presented n [6] A new archtecture whch performs the operatons of dlaton/eroson n a -pxel, arbtrarly shaped, mae wndow throuh decomposton of rey-scale morpholocal structurn elements s presented n ths paper Accordn to the decomposton technque the doman of the structurn element s dvded nto non-overlappn 3 3-pxel sub-domans These sub-domans are used to compute the morpholocal operatons locally From these local results the lobal result of the morpholocal operaton s extracted The archtecture has been also VLSI mplemented The resultn ASIC can handle maes of up to pxels The maxmum frequency of operaton (worst case) of the ASIC s approxmately MHz and ts throuhput rate s Mbytes/sec Its de sze dmensons are 55mm 55mm = 32mm 2, for a DLM, 7µm, CMOS, N-well technoloy process 2 Basc Defntons In terms of rey-scale morpholoy dlaton and eroson of a rey-scale mae f by a rey-scale structurn element are: (f )( x) = max {f (x and z G x z F - z) + (z)} ()
2 (ft )( x) = mn{ f (x + z) (z)} (2) where, z G N x, y E are the spatal co-ordnates, f : F E s the rey-scale mae, : G E s the rey-scale structurn N element and F, G E are the domans of the rey-scale mae and the structurn element,, respectvely 2 Decomposton stratey [6] The decomposton stratey follows: Dvde the lare sze structurn element, nto several smaller non-overlapped reons, denoted by, 2, n, wth domans denoted by G, G 2, G n, respectvely Ths procedure s raphcally llustrated n Fure In ths case the -pxel structurn element s dvded nto 3 3-pxel structurn elements named, 2, and ' The f )( x) can be computed by evaluatn l )(x - z ) G l (x) (x ( (f, where l : G and = + z) shfted by z wth ts orn located at the same locaton Dlaton s obtaned throuh the follown formula: n ( f )( x) = max{(f l)( x - z )} = v Eroson s obtaned throuh the follown formula: n ft )( x) = mn{(ftl )(x - z )} ( = ' G s G (3) (4) F Decomposton of a -pxel structurn element nto 3 3-pxel structurn elements 22 Illustratve structurn element decomposton example Let us consder the follown mae f and structurn element : Dlaton at pont (,) accordn to eqn () s:
3 ( f )(, ) max (,,,,,,, ) = = f Accordn to the decomposton stratey: The structurn s dvded nto four structurn elements: The follown local results are obtaned from the above structurn elements: 22, 25, 7, for the frst, the second, the thrd and the fourth 2 -pxel structurn elements, respectvely Accordn to eqn (3) the max of these local results, e 25, s the result of the lobal dlaton at pont (,) 3 VLSI Implementaton A VLSI h/w structure whch performs the operatons of dlaton/eroson throuh structurn element decomposton (up to pxels ntal structurn element sze) s descrbed n ths secton Ths crcut can accommodate maes of up to pxels The resolutons of both mae and structurn element are bts The block daram of the crcut s shown n Fure 2 Its nputs are: an -bt bus (Dn) to mport the pxels of the mae or the structurn element; snal LoadSEz, whch allows loadn of the structurn element; snal Mask determnes whether a pxel belons to the structurn element; snal Mode selects the operaton; snal Startz determnes the mae s loadn and fnally the clock snal Intally, snal LoadSEz s set to and the -pxel structurn element s transported serally In eneral, the shape of the structurn element can be other than rectanular and, therefore, alon wth the pxels of the structurn element the nput Mask snal s used More specfcally, f Mask s set to, then the current pxel belons to the structurn element A randomly shaped structurn element and the correspondn Mask snals are shown n Fures 3a and 3b, respectvely The Mask snals are also used for the boundary condtons manaement (Fure 4) In ths case some of the pxels of the structurn element may lay outsde the reon of the mae and, therefore, these pxels should not be consdered The enerator of 3 3-pxel structurn element wndows module s shown n Fure 5 The structurn element and the Mask snals are stored nto an array of resters each of -bt resoluton After loadn the structurn element, ths array s solated from Dn bus by means of tr-state buffers The Mask snals are the nputs to an array of 2 multplexers The second nputs are set to The multplexers are controlled by two dentcal 5-bt counters and some combnatonal loc crcutry Fure 6 shows the outputs (RC RC) of the combnatonal loc crcutry wth respect to the correspondn counter (ether C-C or R-C) outputs C-C and R-C count the columns and the rows of the mae, respectvely C-C s controlled by clock and R-C s trered by snal RC3, whch s extracted from the combnatonal loc crcutry, assocated wth C-C The dfferent combnatons of the outputs of the two combnatonal loc crcuts combned wth OR ates control the array of multplexers Thus, n every pulse the pxels of the structurn element, whch le outsde the reon of the mae, are known The -bt buses whch carry the pxels of the structurn element and the Mask snals are reconnected to the output of the 2 multplexers The -pxel structurn element s dvded nto 3 3-pxel sub-domans throuh a multplexer that provdes the approprate 3 3-pxel wndow to the dlaton/eroson unt The multplexer s controlled by a mod up/down counter Ths counter operates n down mode n the case of dlaton and n up mode n the case of eroson, accordn to eqns () and (2)
4 Mask LoadSEz Dn Generator of 3 x3 - pxel structurn element wndows Generator of 3 x3 - pxel mae Masks Dlaton/Eroson resters max/mn unt unt Dout freq dv reset wndows Mode Startz F 2 Structurn element decomposton archtecture (a) (b) F 3 (a) Structurn element and (b) Correspondn Mask snals
5 F 4 Boundary condtons busses of bts busses of bts busses of bts Array of Resters Multplexer LoadSEz Array of Selecton 2X C-C 5 Combnatonal Loc Multplexers 4 RC3 R-C 5 Combnatonal Loc OR ates Mode Counter MOD F 5 Generator of 3 3-pxel structurn elements RC RC RC2 RC3 RC4 RC5 RC6 RC7 RC 5-bt counter B C D E F F 6 Imae row/column tmn daram
6 structurn element pxels Dn nvald data mae pxel (n one pulse) LoadSEz Startz F 7 Data loadn tmn daram After loadn the structurn element, snal Startz s set to for one clock perod Ths snal ntalses all the counters of the crcut In the next clock perod the mae data s loaded pxel by pxel The mae s loaded to the crcut at a rate nne tmes slower than the rate of The enerator of 3 3-pxel mae wndows unt s controlled by clock, whch s extracted from by dvdn t by nne The tmn daram of ths procedure s shown n Fure 7 The enerator of 3 3-pxel mae wndows unt conssts of an array of resters, e lnes of 32 -bt cascaded resters and another resters These can accommodate a -pxel mae wndow from the pxel stored mae Imae data flows from a rester to the next As n the case of the structurn element throuh the use of a multplexer, the -pxel mae wndow s dvded nto 3 3-pxel wndows The counter, whch controls the selecton nput of the multplexer, s an up counter, controlled by clock In ths way, n one perod, 3 3-pxel mae data wndows become avalable to the dlaton/eroson unt The operatons of dlaton/eroson n 3 3-pxel wndows are effcently performed throuh the hardware module reported n [3] The nputs to the dlaton/eroson unt are: a 3 3-pxel mae data wndow, the correspondn 3 3-pxel structurn element, Mask snals (one for each pxel of the structurn element), snal Mode, and clock In ths unt the requred addtons/subtractons of the mae pxels wth the approprate structurn element pxels are executed The results of these addtons/subtractons are clpped when they are outsde of the rane [255] Then, they are fed nto a max/mn unt, whch traces the max or mn value, dependn on snal Mode In order to trace the max or mn value, fla snals, one for each addton/subtracton result, are utlsed These flas are used to reject, n successve staes, the numbers, whch are not canddates to be the max/mn Thus, n the frst stae of ths procedure the Mask snals are ven as nputs to the fla snal, n order to reject the numbers whch should not be taken nto account The output of the max/mn unt, whch s the result of the dlaton/eroson unt, s stored nto -bt cascaded resters, trered by The outputs of these resters are the nputs to a max/mn unt, controlled by clock (Fure 2) Thus, n a perod local max/mn results are provded smultaneously to the max/mn unt For a DLM, 7µm, CMOS, N-well technoloy process, the dmensons of the core of the chp are 55mm 55mm = 32mm 2 Its maxmum frequency of operaton (worst case) s approxmately MHz and the throuhput rate of the proposed ASIC s Mbytes/sec The functonalty of the ASIC was tested throuh several randomly enerated nputs The results obtaned from the ASIC were compared to the expected ones No errors were reported durn ths process 4 Conclusons A new archtecture for any rey-scale morpholocal structurn element arbtrarly shaped decomposton up to - pxel has been presented n ths paper The structure has been also VLSI mplemented Its maxmum frequency of
7 operaton (worst case) s approxmately MHz The throuhput rate s Mbytes/sec The ASIC s ntended to be used n tme crtcal computer vson applcatons Such applcatons nclude textural sementaton and ranulometry, where the use of successve larer structurn elements s requred References [] OI Camps, T Kanuno and RM Haralck Grey-scale structurn element decomposton IEEE Trans Imae Proc, IMP-5, -2, 6 [2] PD Gader Separable decompostons and approxmatons of rey-scale morpholocal templates CVGIP: Imae Understandn, 53, 2-26, [3] A Gasteratos, I Andreads and Ph Tsaldes Extenson and VLSI mplementaton of the majorty-ate alorthm for ray-scale morpholocal operatons Optcal Enneern, 36, 57-6,7 [4] H Park and RT Chn, Decomposton of arbtrarly shaped morpholocal structurn elements IEEE Trans Pattern Analyss & Machne Intellence, PAMI-7, 2-5,5 [5] J Serra Imae Analyss and Mathematcal Morpholoy-Vol I Academc Press, London, 2 [6] FY Shh and OR Mtchell Decomposton of rey-scale morpholocal structurn elements Pattern Reconton, 24, 5-23, [7] X Zhuan and RM Haralck Morpholocal structurn element decomposton Computer Vson, Graphcs, Imae Proc, 35, 37-32, 6
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