Supporting External circuit as Spice or S- parameters in conjunction with I-V/V-T tables

Transcription

1 Supporting External circuit as Spice or S- parameters in conjunction with I-V/V-T tables Kent Dramstad, Adge Hawes IBM Microelectronics Taranjit Kukal, Feras Al-Hawari, Ambrish Varma, Terry Jernberg Cadence Design Systems, Inc. Presented by: Charlie Shih, Cadence Design Systems, Inc. (Previously presented at Asian IBIS Summits, November 15 and 18, 2011) Asian IBIS Summit Taipei, Taiwan November 21, 2011

2 Agenda Requirement Current Limitations of [External Circuit] Solution Supporting S-parameters in [External Circuit] (BIRD144) Simulating [External Circuit] in conjunction with I- V/V-T tables (BIRD145) Summary

3 Agenda Requirement Current Limitations of [External Circuit] Solution Supporting S-parameters in [External Circuit] Simulating [External Circuit] in conjunction with I- V/V-T tables Summary

4 Requirement At high frequencies, we need ways over and above I-V, V-T tables and AMI to model the buffer. On DIE Terminations (ODT) that vary with frequencies need to be expressed as S-parameters or RLGC Spice files On DIE Re-distribution layer (RDL) parasitics become significant and vary with frequencies and hence have to be expressed as S-parameters Analog portion of IO-buffer get expressed as Spice as against I-V/V-T curve; S-parameters get used to describe transfer characteristics of linear IO-buffer amplifiers.

5 Requirement At high frequencies, we need ways over and above I-V, V-T tables and AMI to model the buffer. Some algorithmic portion of IO-buffer model could be expressed as behavioral Spice to augment AMI code Example: if-then-else kind of spice to pick right sub-circuit based on parameter values/processes Example: Modeling continuous filters as behavioral spice to augment digital filters in AMI code

6 Requirement - Various Cases that need to be covered I B I S + [External Circuit] RDL Spice Simulating RDL parasitics in conjunction with I-V/V-T tables Case 1 A M I I B + I + S [External Circuit] RDL Spice Simulating RDL parasitics in conjunction with I-V/V-T tables and AMI Case 2 Simulating AMI with IO-buffer expressed as Spice A M I [External Circuit] + I/O Buffer (Spice) Case 3

7 Agenda Requirement Current Limitations of [External Circuit] Solution Supporting S-parameters in [External Circuit] Simulating [External Circuit] in conjunction with I- V/V-T tables Summary

8 Current Limitations - [External Circuit] Today, S-parameters have to be wrapped into Spice models (vendor specific) and then used under [External Model/Circuit] Keyword. On similar lines, BIRDs propose that Touchstone file name can be parameterized for the IBIS-ISS sub-circuit, which means that IBIS- ISS wrapper could be written for the S-parameter element. NEED: Extend support for direct usage of S- parameters

9 Current Limitations - [External Circuit] The current [External Circuit] and [Circuit Call] usage rules do not allow the direct interconnection and instantiation of existing IBIS I/O models with the rest of the [External Circuit] blocks. Traditionally, users either use Spice or I-V/V-T tables. [ExternalCircuit] I/O (SPICE) + I B I S NEED: Extend use of [External Circuit] keyword to point to Spice sub-circuits that augment I-V/V-T data for complete characterization of IO-buffer. [External Circuit] SPICE + I B I S

10 Current Limitations - [External Circuit] In order for a model developer to use an IBIS I/O model in an [External Circuit] the following steps need to be followed: Develop SPICE like wrappers in which the corresponding typ, min, and max IBIS I/O sub-circuits are instantiated Develop an [External Circuit] to point to the wrapper subcircuits Use the [Circuit Call] keyword to call the [External Circuit]. These usage rules are cumbersome especially when the developer can just directly call the desired IBIS I/O model without the need to develop a SPICE like wrapper as well as an [External Circuit] section.

11 Agenda Requirement Current Limitations of [External Circuit] Solution Supporting S-parameters in [External Circuit] (BIRD144) Simulating [External Circuit] in conjunction with I- V/V-T tables Summary

12 Solution: Leveraging [External Model/Circuit] to Support Package S-parameters For support of package S-parameters: IBIS model should have Keywords to support Touchstone S-parameters under Package section, with fields to Point to Touchstone file from the Package section Provide port-mapping of IO-buffer pins to S-parameter ports R/L/C values should be ignored by SI tools if S-parameter file is used For support of S-parameters when representing elements beyond package parasitics: This can be achieved through use of [External Model] keyword that directly instantiates Touchstone file

13 Solution: Leveraging [External Model/Circuit] to Support S-parameters (beyond Package) Positioning S-parameters as a method to completely define IO-buffer model or portions of IO-buffer requires support for: Direct support of S-parameters without the need for wrapping Port mapping of S-parameters Corners beyond typ/min/max to provide flexibility of choosing various S-parameter files under different conditions

14 Solution: Leveraging [External Model/Circuit] to Support S-parameters (beyond Package) Support for Language Touchstone with port-map

15 Solution: Leveraging [External Model/Circuit] to Support S-parameters (beyond Package) Picking different S-parameter files for different corners

16 Solution: Leveraging [External Model/Circuit] to Support S-parameters (beyond Package) Supporting user-defined corners each user-defined corner maps to typ/min/max IBIS corners

17 Solution: Leveraging [External Model/Circuit] to Support S-parameters (beyond Package) Use in [External Model] and [External Circuit]

18 Agenda Requirement Current Limitations of [External Circuit] Solution Supporting S-parameters in [External Circuit] Simulating [External Circuit] in conjunction with I- V/V-T tables(bird145) Summary

19 Solution: Include IBIS I/O table model in an [External Circuit] using the new [Model Call] Ability to connect External Circuit to IBIS I/O model. The External Circuit could represent RDL parasitics, portion of active I/O buffer, some algorithmic part of I/O buffer.

20 Solution: Include IBIS I/O table model in an [External Circuit] using the new [Model Call] [Pin] signal_name model_name R_pin L_pin C_pin 1 RAS0# Buffer m 5.0nH 2.0pF 2 RAS1# Buffer m NA 2.5pF 3 EN1# Input1 NA 6.3nH NA 4 A0 3-state 5 D0 I/O1 6 RD# Input m 3.0nH 2.0pF 7 WR# Input2 8 A1 I/O2 9 D1 I/O2 10 GND GND 297.0m 6.7nH 3.4pF 11 RDY# Input2 12 GND GND 270.0m 5.3nH 4.0pF HERE DO, D1 are to be modeled as I/O1, I/O2 buffers followed by RDL Spice and represent a differential buffer

21 Solution: Include IBIS I/O table model in an [External Circuit] using the new [Model Call] I/O1 and I/O2 are followed by RDL Spice model

22 Solution: Include IBIS I/O table model in an [External Circuit] using the new [Model Call] [Node Declarations] Must appear before any [Circuit Call] or [Model Call] keyword Die nodes a1 b1 c1 d1 e1 List of die nodes representing signals that connect models a2 b2 c2 d2 e2 [End Node Declarations] NOTE: A [Model] named "I/O1" must be present in the IBIS file in order to enable the tool to instantiate and connect the called model "as usual" based on the I-V and T-V curves as well as the subparameters under the corresponding [Model] section. [Model Call] I/O1 Instantiates [Model] named "I/O1" mapping port pad/node Port_map A_pcref a1 Port to internal node connection Port_map A_puref b1 Port to internal node connection Port_map A_signal c1 Port to internal node connection Port_map A_pdref d1 Port to internal node connection Port_map A_gcref e1 Port to internal node connection [End Model Call]

23 Solution: Include IBIS I/O table model in an [External Circuit] using the new [Model Call] NOTE: A [Model] named "I/O2" must be present in the IBIS file in order to enable the tool to instantiate and connect the called model "as usual" based on the I-V and T-V curves as well as the subparameters under the corresponding [Model] section. [Model Call] I/O2 Instantiates [Model] named "I/O2" mapping port pad/node Port_map A_pcref a2 Port to internal node connection Port_map A_puref b2 Port to internal node connection Port_map A_signal c2 Port to internal node connection Port_map A_pdref d2 Port to internal node connection Port_map A_gcref e2 Port to internal node connection [End Model Call]

24 Solution: Include IBIS I/O table model in an [External Circuit] using the new [Model Call] [Circuit Call] RDL_Interconnect Instantiates [External Circuit] named "RDL_Interconnect" mapping port pad/node Port_map vcc 18 Port to implicit pad connection Port_map gnd 12 Port to implicit pad connection Port_map io1 5 Port to implicit pad connection Port_map io2 9 Port to implicit pad connection Port_map vcca1 a1 Port to internal node connection Port_map vcca2 b1 Port to internal node connection Port_map int_io1 c1 Port to internal node connection Port_map vssa1 d1 Port to internal node connection Port_map vssa2 e1 Port to internal node connection Port_map vccb1 a2 Port to internal node connection Port_map vccb2 b2 Port to internal node connection Port_map int_io2 c2 Port to internal node connection Port_map vssb1 d2 Port to internal node connection Port_map vssb2 e2 Port to internal node connection [End Circuit Call]

25 Agenda Requirement Current Limitations of [External Circuit] Solution Supporting S-parameters in [External Circuit] Simulating [External Circuit] in conjunction with I- V/V-T tables Summary

26 Summary With increase in frequencies, we need enhanced usage of External Model / Circuit S-parameters are becoming common way to model portions of I/O buffers and package parasitics; Hence need to have direct support of S-parameter model under [External Model/Circuit]. This has been proposed as BIRD144 Significant portion of I/O buffer gets modeled as Spice/Sparameters to augment the main analog buffer to capture the high frequency behavior; Hence need to have easy way to connect External Circuit to I-V/V-T table-model. This has been proposed as BIRD145

27 Summary BIRD144 and BIRD145 can be accessed at The BIRDs would be considered and discussed by the IBIS open forum Other BIRDs will also be considered that might be alternatives or add-on to this proposal

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