Instruction on padframe

Transcription

1 Instruction on padframe The padframe is a 40-pins padframe for the AMI ABN 1.6um process from MOSIS located at You should download the CIF file from the link as below and save it to your Cadence working directory. The readme file is located at: The outside dimension of thid padframe is um x um The inside dimension, inside of bondpads, is 1792 um x 1792 um. I. Instruction on how to import the CIF file into your cadence library. 1. In CIW window, select from Tools-> Technology File Manager->New. You will see a window as Fig.1. Type in AMI16_PAD in the field of Technology Library Name and select option Load existing Technology Library NCSU_TechLib_ami16. Then click OK. Figure 1. Create a new technology library 2. In CIW window, select from File-> Import ->CIF. You should see a window as Fig.2. Type in the name of your downloaded CIF file in the Input File field and the library name AMI16_PAD, which you created in step I.1, in the Library Name field. Click OK. If successful, you should see a window with 0 error as in Fig.3.

2 Figure 2 import CIF file Figure 3 CIFIN complete message window 3. Now go to the Library Manager window, you will see AMI16_PAD under your Library column. Select this library and the cell with name 40p2200, click layout in View column. The padframe layout window is as Fig.4. There are 1 vdd pad, 1 gnd pad, 2 cv pads, 2 cg pads and 34 io pads. vdd and gnd pads are for power supply, io pads are for input and output pins, cv and cg pads may not be used at all. When you select the whole pads, and use the short key Shift+f on the keyboard, you should be able to see the actual layout inside the padframe as shown in Fig.5. Please do not edit the padframe directly from this library. You will learn how to integrate your designed circuit into the padframe in next step.

3 Figure 4, padframe with separate pads Figure 5, padframe with actual layout view

4 II. How to integrate your circuit into the padframe 1. To integrate your circuit with padframe, you can create a new library for your final project. In the new library, create a new layout view for your final project. In the layout window, select from Create->Instance. You will see a window as in Fig.6. Click Browse and select from AMI16_PAD in the Library field, 40p2200 in the Cell field and Layout in the View field. You can place the instant padframe which is attached to your mouse in the new layout window as in Fig.7. Use the short key Shift + F, and you will see an actual layout of this padframe. Figure 6. Create instance Figure 7, instant padframe

5 2. You can copy and paste your final designed circuit into the padframe. Or you can do the same thing as step II.1 to import your final designed circuit into the padframe. [You should do the floorplanning and divide the core area for the circuit blocks such as AMP1, AMP2, and BIAS, and then place and arrange the blocks appropriately.] Before you insert your circuit into the padframe, you can perform DRC on the padframe. You will recieve about 2845 errors. Do not worry about this. After you import the designed circuit and make all interconnection correctly, you can do the DRC on your final layout. If it is generating the same number of errors as the padframe did, it means your circuit is error free! 3. An example layout view with AMP circuit (only with input and output part), bias circuit and padframe is shown as Fig8. This is to roughly show how to arrange your circuits in the padrame. (The AMP and bias circuits are not even complete yet). Fig.9 shows the enlarged views of connections between inside circuit and the pads. Fig.9 (a) and (b) show the connection for power supply. For both vdd and gnd pads, you should use metal-2 to connect from the pad to the inside circuit. For (c) and (d), use metal-1 to directly connect from the pad to the inside circuit. Figure 8 Layout view with AMP circuit in the padframe. VDD pad is at the bottom and GND pad is on the top of the padrame. EN is connected to the VDD line to enable output for io pad.

6 (a) (b) (c) (d) Figure 9 enlarged views at the edge of the pad with connection to the inside circuit. (a) vdd pad., (b) gnd pad, (c) io pad as input, (d) io pad as output 4. In order to connect the circuit leads to the bondpads: the io pad can be used as input pin or output pin. There are IN, INb, INunb, OUT and EN pins in each io pad. You can use IN as the input pin to connect the input in your circuit. Use OUT to connect the output your circuit. When use OUT as the output pin, EN pin must connect to VDD as well. The layout of the io pad is shown as Fig.10. The detail information can be found in the readme file.

7 Figure 10 io pad layout view with indication of different pins 5. You can also use in and out pads to replace io pad in the padframe so that you don t need to worry about EN pin in the io pad. Be careful because this may generate a lot more errors when you replace the io pads. You can try this only if you are very familiar with the padframe.