FFT: An example of complex combinational circuits

Transcription

1 Lecture from 6.s195 taught i Fall 2013 Costructive Computer Architecture FFT: A example of complex combiatioal circuits Arvid Computer Sciece & Artificial Itelligece Lab. Massachusetts Istitute of Techology September 22, L0x-1

2 Cotributors to the course material Arvid, Rishiyur S. Nikhil, Joel Emer, Muralidara Vijayaraghava Staff ad studets i (Sprig 2013), 6.S195 (Fall 2012), 6.S078 (Sprig 2012) Asif Kha, Richard Ruhler, Sag Woo Ju, Abhiav Agarwal, Myro Kig, Kermi Flemig, Mig Liu, Li- Shiua Peh Exteral Prof Amey Karkare & studets at IIT Kapur Prof Jihog Kim & studets at Seoul Natio Uiversity Prof Derek Chiou, Uiversity of Texas at Austi Prof Yoav Etsio & studets at Techio September 22, L0x-2

3 Cotets FFT ad IFFT: Aother complex combiatioal circuit ad its folded implemetatios FFT: Coverts sigals from time domai to frequecy domai IFFT: Coverts sigals from frequecy domai to time domai Two calculatios are idetical- the same hardware ca be used New BSV cocepts structure type overloadig September 22, L0x-3

4 Combiatioal IFFT i0 i1 i2 i3 i4 i63 t 0 t 1 t 2 x16 * * * * Permute *j Permute Permute All umbers are complex ad represeted as two sixtee bit quatities. Fixed-poit arithmetic is used to reduce area, power,... out0 out1 out2 out3 out4 out63 t September 22, L0x-4

5 4-way Butterfly Node x 0 * + + x 1 x 2 x 3 t 0 t 1 t 2 t 3 * * * *i fuctio Vector#(4,Complex) bfly4 (Vector#(4,Complex) t, Vector#(4,Complex) x); t s (twiddle coefficiets) are mathematically derivable costats for each bfly4 ad deped upo the positio of bfly4 the i the etwork FFT ad IFFT calculatios differ oly i the use of Twiddle coefficiets i various butterfly odes September 22, L0x-5

6 BSV code: 4-way Butterfly fuctio Vector#(4,Complex#(s)) bfly4 (Vector#(4,Complex#(s)) t, Vector#(4,Complex#(s)) x); Vector#(4,Complex#(s)) m, y, z; m[0] = x[0] * t[0]; m[1] = x[1] * t[1]; m[2] = x[2] * t[2]; m[3] = x[3] * t[3]; y[0] = m[0] + m[2]; y[1] = m[0] m[2]; y[2] = m[1] + m[3]; y[3] = i*(m[1] m[3]); z[0] = y[0] + y[2]; z[1] = y[1] + y[3]; z[2] = y[0] y[2]; z[3] = y[1] y[3]; retur(z); edfuctio Note: Vector does ot mea storage; just a group of wires with ames * * * * *i + Polymorphic code: works o ay type of umbers for which *, + ad - have bee defied m y z September 22, L0x-6

7 Laguage otes: Sequetial assigmets Sometimes it is coveiet to reassig a variable (x is zero every where except i bits 4 ad 8): Bit#(32) x = 0; x[4] = 1; x[8] = 1; This will usually result i itroductio of muxes i a circuit as the followig example illustrates: Bit#(32) x = 0; let y = x+1; if(p) x = 100; let z = x+1; p x y z September 22, L0x-7

8 Complex Arithmetic Additio z R = x R + y R z I = x I + y I Multiplicatio z R = x R * y R - x I * y I z I = x R * y I + x I * y R September 22, L0x-8

9 Represetig complex umbers as a struct typedef struct{ It#(t) r; It#(t) i; } Complex#(umeric type t) derivig (Eq,Bits); Notice the Complex type is parameterized by the size of It chose to represet its real ad imagiary parts If x is a struct the its fields ca be selected by writig x.r ad x.i September 22, L0x-9

10 BSV code for Additio typedef struct{ It#(t) r; It#(t) i; } Complex#(umeric type t) derivig (Eq,Bits); fuctio Complex#(t) cadd (Complex#(t) x, Complex#(t) y); It#(t) real = x.r + y.r; It#(t) imag = x.i + y.i; retur(complex{r:real, i:imag}); edfuctio What is the type of this +? September 22, L0x-10

11 Overloadig (Type classes) The same symbol ca be used to represet differet but related operators usig Type classes A type class groups a buch of types with similarly amed operatios. For example, the type class Arith requires that each type belogig to this type class has operators +,-, *, / etc. defied We ca declare Complex type to be a istace of Arith type class September 22, L0x-11

12 Overloadig +, * istace Arith#(Complex#(t)); fuctio Complex#(t) \+ (Complex#(t) x, Complex#(t) y); It#(t) real = x.r + y.r; It#(t) imag = x.i + y.i; retur(complex{r:real, i:imag}); edfuctio fuctio Complex#(t) \* (Complex#(t) x, Complex#(t) y); It#(t) real = x.r*y.r x.i*y.i; It#(t) imag = x.r*y.i + x.i*y.r; retur(complex{r:real, i:imag}); edfuctio edistace The cotext allows the compiler to pick the appropriate defiitio of a operator September 22, L0x-12

13 Combiatioal IFFT i0 out0 i1 out1 i2 i3 i4 i63 x16 Permute Permute stage_f fuctio Permute out2 out3 out4 out63 fuctio Vector#(64, Complex#()) stage_f (Bit#(2) stage, Vector#(64, Complex#()) stage_i); fuctio Vector#(64, Complex#()) ifft (Vector#(64, Complex#()) i_data); repeat stage_f three times September 22, L0x-13

14 BSV Code: Combiatioal IFFT fuctio Vector#(64, Complex#()) ifft (Vector#(64, Complex#()) i_data); //Declare vectors Vector#(4,Vector#(64, Complex#())) stage_data; stage_data[0] = i_data; for (Bit#(2) stage = 0; stage < 3; stage = stage + 1) stage_data[stage+1] = stage_f(stage,stage_data[stage]); retur(stage_data[3]); edfuctio The for-loop is ufolded ad stage_f is ilied durig static elaboratio Note: o otio of loops or procedures durig executio September 22, L0x-14

15 BSV Code: Combiatioal IFFT- Ufolded fuctio Vector#(64, Complex#()) ifft (Vector#(64, Complex#()) i_data); //Declare vectors Vector#(4,Vector#(64, Complex#())) stage_data; stage_data[0] = i_data; for stage_data[1] (Bit#(2) stage = stage_f(0,stage_data[0]); = 0; < 3; = stage + 1) stage_data[2] stage_data[stage+1] = stage_f(1,stage_data[1]); = stage_f(stage,stage_data[stage]); stage_data[3] = stage_f(2,stage_data[2]); retur(stage_data[3]); edfuctio Stage_f ca be ilied ow; it could have bee ilied before loop ufoldig also. Does the order matter? September 22, L0x-15

16 BSV Code for stage_f fuctio Vector#(64, Complex#()) stage_f (Bit#(2) stage, Vector#(64, Complex#()) stage_i); Vector#(64, Complex#()) stage_temp, stage_out; for (Iteger i = 0; i < 16; i = i + 1) begi Iteger idx = i * 4; Vector#(4, Complex#()) x; x[0] = stage_i[idx]; x[1] = stage_i[idx+1]; x[2] = stage_i[idx+2]; x[3] = stage_i[idx+3]; let twid = gettwiddle(stage, fromiteger(i)); let y = bfly4(twid, x); stage_temp[idx] = y[0]; stage_temp[idx+1] = y[1]; stage_temp[idx+2] = y[2]; stage_temp[idx+3] = y[3]; ed //Permutatio for (Iteger i = 0; i < 64; i = i + 1) stage_out[i] = stage_temp[permute[i]]; retur(stage_out); edfuctio twid s are mathematically derivable costats September 22, L0x-16

17 Higher-order fuctios: Stage fuctios f1, f2 ad f3 fuctio f0(x)= stage_f(0,x); fuctio f1(x)= stage_f(1,x); fuctio f2(x)= stage_f(2,x); What is the type of f0(x)? fuctio Vector#(64, Complex) f0 (Vector#(64, Complex) x); September 22, L0x-17

18 Suppose we wat to reduce the area of the circuit i0 out0 i1 out1 i2 i3 i4 x16 Permute Permute Permute out2 out3 out4 i63 out63 Reuse the same circuit three times to reduce area September 22, L0x-18

19 Reusig a combiatioal block f f g f g Itroduce state elemets to hold itermediate values we expect: Throughput to Area to decrease less parallelism decrease reusig a block The clock eeds to ru faster for the same throughput September 22, L0x-19

20 Folded IFFT: Reusig the stage combiatioal circuit i0 i1 i2 Permute out0 out1 out2 i3 out3 i4 out4 i63 Stage Couter out63 September 22, L0x-20

21 Iput ad Output FIFOs If IFFT is implemeted as a sequetial circuit it may take several cycles to process a iput Sometimes it is coveiet to thik of iput ad output of a combiatioal fuctio beig coected to FIFOs iq IFFT outq FIFO operatios: eq whe the FIFO is ot full deq, first whe the FIFO is ot empty These operatios ca be performed oly whe the guard coditio is satisfied September 22, L0x-21

22 Folded implemetatio rules Disjoit firig coditios x iq f stage sreg outq rule foldedetry if (stage==0); sreg <= f(stage, iq.first()); stage <= stage+1; iq.deq(); otice stage is a dyamic edrule parameter ow! rule foldedcirculate if (stage!=0)&(stage<(-1)); sreg <= f(stage, sreg); stage <= stage+1; edrule rule foldedexit if (stage==-1); outq.eq(f(stage, sreg)); stage <= 0; edrule Each rule has some additioal implicit guard coditios associated with FIFO operatios o forloop September 22, L0x-22

23 Folded implemetatio expressed as a sigle rule x iq f stage sreg outq rule folded-pipelie (True); let sxi =?; if (stage==0) begi sxi= iq.first(); iq.deq(); ed else sxi= sreg; let sxout = f(stage,sxi); if (stage==-1) outq.eq(sxout); else sreg <= sxout; stage <= (stage==-1)? 0 : stage+1; edrule September 22, L0x-23

24 Shared Circuit gettwiddle0 gettwiddle1 gettwiddle2 stage twid The rest of stage_f, i.e. Bfly-4s ad permutatios (shared) sx The Twiddle costats ca be expressed i a table or i a case or ested case expressio September 22, L0x-24

25 Pipeliig Combiatioal IFFT 3 differet datasets i the pipelie i0 IFFT i+1 IFFT i IFFT i-1 out0 i1 out1 i2 i3 i4 x16 Permute Permute Permute out2 out3 out4 i63 Lot of area ad log combiatioal delay Folded or multi-cycle versio ca save area ad reduce the combiatioal delay but throughput per clock cycle gets worse Pipeliig: a method to icrease the circuit throughput by evaluatig multiple IFFTs out63 Next lecture September 22, L0x-25

26 Desig compariso C f1 f2 f3 Combiatioal iq outq F f Folded iq outq P f1 f2 f3 Pipelie iq outq Clock? Area? Throughput? Clock: C < P F Area: F < C < P Throughput: F < C < P September 22, L0x-26

27 Area estimates Tool: Syopsys Desig Compiler Comb. FFT Combiatioal area: Nocombiatioal area: 9279 Folded FFT Combiatioal area: Nocombiatioal area: Pipelied FFT Combiatioal area: Nocombiatioal area: Are the results surprisig? Why is folded implemetatio ot smaller? Explaatio: Because of costat propagatio optimizatio, each bfly4 gets reduced by 60% whe twiddle factors are specified. Folded desig disallows this optimizatio because of the sharig of bfly4 s September 22, L0x-27

28 Sytax: Vector of Registers Register suppose x ad y are both of type Reg. The x <= y meas x._write(y._read()) Vector of It x[i] meas sel(x,i) x[i] = y[j] meas x = update(x, i, sel(y,j)) Vector of Registers x[i] <= y[j] does ot work. The parser thiks it meas (sel(x,i)._read)._write(sel(y,j)._read), which will ot type check (x[i]) <= y[j] parses as sel(x,i)._write(sel(y,j)._read), ad works correctly Do t ask me why September 22, L0x-28

29 Optioal: Superfolded FFT September 22, L0x-29

30 Superfolded IFFT: Just oe Bfly-4 ode! Optioal i0 out0 i1 i2 i3 i4 Stage 0 to 2 Permute 64, 2-way Muxes out1 out2 out3 out4 i63 4, 16-way Muxes Idex: 0 to 15 4, 16-way DeMuxes out63 Idex == 15? f will be ivoked for 48 dyamic values of stage; each ivocatio will modify 4 umbers i sreg after 16 ivocatios a permutatio would be doe o the whole sreg September 22, L0x-30

31 Superfolded IFFT: stage fuctio f Bit#(2+4) (stage,i) fuctio Vector#(64, Complex) stage_f (Bit#(2) stage, Vector#(64, Complex) stage_i); Vector#(64, Complex#()) stage_temp, stage_out; for (Iteger i = 0; i < 16; i = i + 1) begi Bit#(2) stage Iteger idx = i * 4; let twid = gettwiddle(stage, fromiteger(i)); let y = bfly4(twid, stage_i[idx:idx+3]); stage_temp[idx] = y[0]; stage_temp[idx+1] = y[1]; stage_temp[idx+2] = y[2]; stage_temp[idx+3] = y[3]; ed //Permutatio for (Iteger i = 0; i < 64; i = i + 1) stage_out[i] = stage_temp[permute[i]]; retur(stage_out); edfuctio should be doe oly whe i=15 September 22, L0x-31

32 Code for the Superfolded stage fuctio Fuctio Vector#(64, Complex) f (Bit#(6) stagei, Vector#(64, Complex) stage_i); let i = stagei `mod` 16; let twid = gettwiddle(stagei `div` 16, i); let y = bfly4(twid, stage_i[i:i+3]); let stage_temp = stage_i; stage_temp[i] = y[0]; stage_temp[i+1] = y[1]; stage_temp[i+2] = y[2]; stage_temp[i+3] = y[3]; Oe Bfly-4 case let stage_out = stage_temp; if (i == 15) for (Iteger i = 0; i < 64; i = i + 1) stage_out[i] = stage_temp[permute[i]]; retur(stage_out); edfuctio September 22, L0x-32