RTXC Quadros Real-time Operating System Technical Summary Quadros Systems, Inc.

Transcription

1 RTXC Quadrs Real-time Operating System Technical Summary Quadrs Systems, Inc. Real-time Operating Systems fr Cnvergent Prcessing

2 RTXC Quadrs Technical Summary Table f Cntents 1 Intrductin Dual-kernel Architecture Scalability Feature Summary RTXC/ss RTXC/ms Structure and Organizatin Operating Znes RTXC/ss RTXC/ms RTXC/dm System Cnfiguratin with RTXCgen System Cmpnents User Space Cmpnents User Startup Cde System Initializatin Cde Thread r Task Cde RTXC API Library User Wrkspace Cnfiguratin Tables System Space Cmpnents RTXC Mdule System Wrkspace Hst Envirnment Prgramming Language Develpment Tls Object Class Overview Threads Thread Scheduling Thread Gates Envirnment Arguments Tasks Task States Scheduling Plicies Semaphres Queues Mailbxes and Messages Pipes Event Surces Cunters Alarms Memry Partitins Mutexes Exceptins Interrupt Servicing Nrmal Interrupts Private Interrupts Hybrid Interrupts Mre Infrmatin /20/2003 Quadrs Systems, Inc. Cpyright All Rights Reserved

3 RTXC Quadrs Technical Summary 1 Intrductin RTXC Quadrs represents a new generatin in real-time perating systems, designed frm the grund up t address the demands f tday s sphisticated embedded systems and new, cnvergent prcessing applicatins. RTXC Quadrs was designed using the knwledge and experience f mre than 25 years f cmmercial perating system experience ver a brad range f real-time applicatins. RTXC Quadrs is written in ANSI C but it permits the user t develp applicatins using C r C++. Each distributin f RTXC is prted t a specific prcessr and bund t C cmpilers that supprt the target prcessrs, making access t kernel services cnvenient fr the develper. 2 Feature Summary At the heart f the RTXC Quadrs perating system is a unique, dual-kernel architecture that can be cnfigured in fur different framewrks. The result is an RTOS that is equally suited fr 8-and 16-bit MCUs, 32-bit micrprcessrs, high perfrmance digital signal prcessrs and the rapidly emerging hybrid and multi-cre prcessrs. This scalable architecture prvides a reliable fundatin fr present and future prgrams as the same API is utilized acrss all fur framewrks. A develper can begin using the basic scheduler fr an 8-bit prject tday and then easily mve t ne f the ther framewrks when the next design calls a higher pwered micrprcessr. 1.1 Dual-kernel Architecture The tw majr architectural cmpnents f RTXC Quadrs are RTXC/ss (a thread-based architecture) and RTXC/ms (a task-based architecture). RTXC/ss features a single stack mdel with a very lw-latency scheduler and a small ftprint, making it ideally suited fr applicatins requiring high frequency interrupt prcessing, such as in digital signal prcessing. RTXC/ms prvides a multiple independent stack mdel fr a classic pre-emptive multitasking architecture with a rich set f kernel services well suited t deterministic, hard real-time system requirements. RTXC Quadrs features supprt real-time, multitasking applicatins using either RTXC/ss r RTXC/ms, r RTXC/dm, a cmbinatin f RTXC/ss and RTXC/ms which allws the applicatin t utilize the features f bth framewrks. 2.1 RTXC/ss RTXC/ss meets the needs f applicatins requiring a small cde ftprint, minimum use f RAM by the RTOS and very fast respnse t events. It makes use f lightweight applicatin cde elements called threads, which alng with the RTOS make use f a single cmmn stack. RTXC/ss supprts the fllwing features: Multiple levels f thread pririty Fixed thread pririties within a level N cntext saved r restred fr threads perating at same level Pre-emptive scheduling f threads between levels Multi-thread prcessing with selectable scheduling plicies by level: Pririty Rund rbin Static kernel bjects: Threads 1.2 Scalability Pipes RTXC Quadrs is highly scalable. The user may select the basic framewrk f RTXC/ss r RTXC/ms alne, r RTXC/ss in cmbinatin with RTXC/ms. RTXC Quadrs is further scalable by the selectin f kernel bject classes and the services that perate n them. RTXC Quadrs als includes a graphical cnfiguratin tl, RTXCgen, t assist the user in scaling the selected RTXC framewrk as well as defining the RTXC kernel bjects required by the applicatin. Event Surces Cunters Alarms Exceptins Single stack fr all peratins Small RAM and ROM usage Standard prgrammer interface in C r assembly language Quadrs Systems, Inc. 2/20/ Cpyright All Rights Reserved

4 RTXC Quadrs Technical Summary 2.2 RTXC/ms RTXC/ms is intended fr applicatins where the RAM budget is nt as tight as in an applicatin using RTXC/ss. RTXC/ms applicatin cde elements are called tasks and each task must have its wn independent stack. The RTXC/ms multitasking scheduler allcates wnership f the CPU t varius tasks accrding t their pririties and in respnse t external r internal events. RTXC/ms supprts the fllwing features: Multitasking with selectable scheduling plicies Preemptive Rund rbin Time-sliced Multiple stack mdel (ne stack per task) Static and dynamic kernel bjects Tasks Semaphres FIFO Queues Mailbxes and messages Memry Partitins Mutexes Pipes Event Surces Cunters Alarms Exceptins Fixed r dynamic task pririties 3 Structure and Organizatin RTXC Quadrs is designed t perate in an embedded system, which is typically intended t perfrm a set f peratins with little r n human interventin. RTXC Quadrs makes n assumptins abut the cnfiguratin f the target system. It is the respnsibility f the applicatin designer t define the target envirnment and t insure that all necessary devices have prgram supprt. 3.1 Operating Znes Mst real-time applicatins have peratins that take place at different pririty znes, the pririty being assciated with the imprtance f the peratin. RTXC Quadrs perates in three distinct pririty znes. Interrupt servicing ccupies the highest pririty, Zne 1 and takes precedence ver all peratins in the ther znes. RTXC Quadrs supprts interrupt nesting prvided the hardware permits it. Mst peratins within RTXC/ss ccur in Zne 2, the middle pririty. Kernel peratins f the RTXC/ms cmpnent als run in Zne 2. Zne 3 peratins ccur when there are n Zne 1 r Zne 2 peratins that need attentin. Typically, peratins at Zne 3 are classified as cntrl functins. In the RTXC/ss envirnment, Zne 3 peratins are usually assciated with a user-defined backgrund lp. When the RTXC/ms cmpnent is present, Zne 3 peratins are reserved fr tasks. 3.2 RTXC/ss Intertask cmmunicatin and synchrnizatin The RTXC/ss cmpnent f RTXC Quadrs clsely meets Semaphres Mailbxes and messages the needs f applicatins requiring minimal RTOS ftprint and RAM use alng with very fast respnse time t Queues events. It is a thread-based design in which the RTXC/ss Scheduler schedules threads as the result f requests by Pipes interrupt service rutines r ther threads. Typical use f Efficient management fr ticks frm internal r external surces RTXC/ss wuld be the executin f a DSP algrithm, such as an FFT, which prcesses a blck f data in a lp fashin Alarm ptins fr many services withut stpping, until the data blck is cnsumed. Partitined RAM management Pririty inversin handling ptin fr mutexes Efficient interrupt servicing Fast cntext switch Small RAM and ROM requirements Standard prgrammer interface in C n all prcessrs Highly flexible cnfiguratin t permit custm fit t the applicatin While well suited fr use in DSP prcessing, the RTXC/ss cmpnent is by n means limited t that class f applicatin. The structure, size and perfrmance f RTXC/ss, plus a rich set f services assciated with the six supprted classes f bjects prvide data cmmunicatin, event synchrnizatin and thread management, make RTXC/ss an excellent RTOS chice fr a variety f ther applicatins such as instrumentatin, cntrl, r device management. 4 2/20/2003 Quadrs Systems, Inc. Cpyright All Rights Reserved

5 RTXC Quadrs Technical Summary RTXC/ss supprts six classes f bjects: 3.3 RTXC/ms Threads The flexible design f RTXC/ms supprts a wide range f Event Surces applicatins, including cmmunicatins, autmtive, prcess Cunters cntrl, and instrumentatin systems. It is ideal fr Alarms systems that require fast interrupt respnse time and rapid, deterministic switching between tasks. RTXC/ms Pipes als prvides a rbust set f services fr intertask cmmunicatin and event synchrnizatin, cmbined with Exceptins RAM management and efficient executin, permitting it t meet the requirements fr mst real-time systems designs. Each class is assciated with a set f services that enables the develper t effect certain peratinal behavirs f the system. Figure 1 depicts a typical tplgy fr an applicatin based n RTXC/ss. Nte that the applicatin exists in three pririty znes: Zne 1 fr interrupt prcessing is the highest pririty, as it nrmally demands immediate attentin. Zne 2 cntains RTXC/ss and the threads it schedules fr peratins generally assciated with interrupts. Zne 3 perates nly when all prcessing in Znes 1 and 2 is cmplete. System startup ccurs in Zne 3. After startup, peratins in Zne 3 are user defined and d nt interact with RTXC/ss. Zne 3 may be referred t as the Backgrund Zne. RTXC/ms supprts 11 kernel bject classes, each with a set f kernel services. The bject classes include: Tasks Semaphres Queues Mailbxes and Messages Memry Partitins Mutexes (Exclusive Access Semaphres) Pipes Event Surces Cunters Alarms Exceptins Figure 2 shws a system tplgy using RTXC/ms nly. RTXC/ms uses the same three znes f prcessing as RTXC/ss. Zne 1 is reserved fr interrupt servicing. Zne 2 is limited t RTXC/ms kernel services. Task peratins under RTXC/ms ccur in Zne 3 when there is n activity in either Zne 1 r Zne 2. Zne 3 peratins may cause activity t ccur at Zne 2. Figure 1. RTXC/ss tplgy Figure 2. RTXC/ms tplgy Quadrs Systems, Inc. 2/20/ Cpyright All Rights Reserved

6 RTXC Quadrs Technical Summary Figure 3 depicts RTXC/dm a dual-mde design using bth RTXC/ss and RTXC/ms. Accurate cnfiguratin f the system is a vital part f any successful applicatin. There are tw parts t the cnfiguratin prcess: Cnfiguratin f the RTOS with respect t the basic kernel cnfiguratin, selectin f bject classes and included kernel services Specificatin f the static bjects and their prperties and enumeratin f dynamic bjects as needed by the applicatin RTXCgen is hst-based cnfiguratin prgram with an intuitive graphical interface that assists the develper in system cnfiguratin. It gives the user an easy way t specify the RTOS framewrk and included Object Classes with pint-and-click editing. It als allws the develper t define the applicatin prperties f static bjects. 3.4 RTXC/dm The graphical presentatin makes it easy t enter the cnfiguratin data and t view the entered data in cntext with ther entries. Alng with its intuitive interface, RTXCgen uses clr-cding t indicate the status f each item at a glance whether it has been changed since the last save r since the last cde was generated. Once all cnfiguratin parameters are defined, the RTXCgen tl autmatically generates errr-free C surce cde, representing the selected RTOS cnfiguratin and bject specificatins. The develper includes these surce cde mdules (.c and.h files) when cmpiling RTXC surce cde and applicatin surce cde mdules. 5 System Cmpnents RTXC-based applicatins cntain tw distinct spaces that cntain cmpnents f the applicatin and system. These spaces are called User Space and System Space. 5.1 User Space Cmpnents Figure 3. RTXC/dm tplgy User Startup Cde 4 System Cnfiguratin with RTXCgen User Space cmpnents are thse elements which lie utside the direct cntrl f r use by RTXC and include at least the fllwing: System Initializatin Cde (Zne 3 peratin including main()) Thread and Task Cde RTXC API Library User Wrkspace Cnfiguratin Tables (frm RTXCgen) User Startup Cde Startup cde is the cde that executes whenever the system is RESET. It cntains the sequence f instructins necessary t set up the CPU and specific hardware t the cnfiguratin required by the applicatin. It is usually written in assembly language, althugh there is n requirement that it must be s. Chip selects, mdule initializatin, diagnstics, and s n, are sme f the functins the develper might put int this bdy f cde. In general, startup cde is independent f the RTXC cnfiguratin being used. 6 2/20/2003 Quadrs Systems, Inc. Cpyright All Rights Reserved

7 RTXC Quadrs Technical Summary System Initializatin Cde Cnfiguratin Tables In an applicatin written in sme higher rder language than assembler, the startup cde usually ends by calling the mainline rutine that begins peratin in the realm f the cmpiled cde. In C, fr example, the mainline functin has the name main() which is, in actuality, a functin with several majr sub-functins. The peratin f main() includes initializing RTXC kernel bjects and System Space as well as initializing any applicatin specific data. In systems using RTXC/ss nly, this cde may als include the backgrund peratins that execute whenever there is n thread peratin in Zne 2. In an applicatin based n RTXC/ms, the initializatin cde nrmally becmes the Null Task (als called the Idle Task) upn cmpletin f the initializatin peratins. The majr sub-functins f this cde are the applicatin tasks Thread r Task Cde Depending n which RTXC Quadrs framewrk the user chses, the embdiment f the applicatin is in the thread r task cde cmpnents. These cde mdules are very applicatin specific and are slely the respnsibility f the develper. T achieve the desired behavir f threads and tasks, the cde can make use f RTXC services by making requests in the frm f functin calls t varius RTXC API Library services RTXC API Library The RTXC API Library cntains the functins that cnstitute the interface between the applicatin cde and the RTXC Kernel Services. RTXC/ss threads make direct calls t Kernel Services while an RTXC/ms task makes calls t API functins that frm the prper calling envirnment fr the Kernel Services and then invkes the RTXC kernel. The RTXC Sftware Develper s Kit cntains the RTXC API Library User Wrkspace The User Wrkspace is that part f RAM that is nrmally managed and used by the applicatin cde utside the direct cntrl f RTXC. Hwever, sme RTXC kernel bjects have prtins that make use f User Wrkspace t minimize System RAM requirements. Objects in this categry make use f RAM areas f a user-defined size such as that fund in task stacks, queues, memry partitins, and pipes. The develper shuld never allw User Wrkspace and RTXC Wrkspace t verlap. The Cnfiguratin Tables are prduced by RTXCgen and cntain the prperties fr the system, the varius bject classes, and even the individual static bjects. The develper cmpiles r assembles and links them with the bject cde f the applicatin tasks. During a startup, System Initializatin cde uses the Cnfiguratin Tables t initialize the selected kernel bject classes and the varius static bjects in System RAM. The use f static bjects eliminates the need t write applicatin cde t create them, thereby remving a ptential surce f errr. 5.2 System Space Cmpnents System Space cntains several elements, mst f which may be fund in either ROM r RAM. One cmpnent, System Wrkspace, must be in RAM. These cmpnents are either a standard part f the RTXC distributin r are prduced by RTXCgen during the system generatin prcedure. The primary System Space cmpnents are: RTXC Mdule System Wrkspace RTXC Mdule The RTXC Mdule cntains the RTXC Initializatin, Kernel Service Library, and whatever ther functins may be part f System Space. The RTXC Mdule can be lcated in either RAM r ROM, its address being assigned during link/lcate peratins. The applicatin accesses the RTXC Mdule cntents thrugh API functin calls System Wrkspace System Wrkspace must be in RAM because it cntains all f the data needed by RTXC t cntrl the varius kernel bjects. RTXC cnfigures System Wrkspace during the system initializatin peratins and manages it during system peratin. It is inaccessible t the develper. 5.3 Hst Envirnment The hst envirnment is the develpment wrkstatin used fr prgram develpment. Surce cde editing, linking, system cnfiguratin (RTXCgen) and debugging are all perfrmed in the hst envirnment. RTXC Quadrs supprts Windws 98/2000/NT/XP and Slaris hsts. Quadrs Systems, Inc. 2/20/ Cpyright All Rights Reserved

8 RTXC Quadrs Technical Summary Prgramming Language Mutexes serve t ensure that exclusive access t an entity is pssible. Real-time system develpers need t be able t write applicatin cde in the language that is best able t meet system perfrmance gals. RTXC Quadrs permits the user t develp applicatins using C r C++. It is als permissible t mix languages Develpment Tls The cde develpment prcess typically emplys cmpilers, assemblers and debuggers. These are cmmnly prvided in an integrated develpment envirnment (IDE). Each distributin f RTXC Quadrs is prted t a specific prcessr and bund t a specific cmpiler. RTXC Quadrs prvides bindings fr many ppular cde develpment systems. 6 Object Class Overview RTXC Quadrs perates n a framewrk f data structure templates called bject classes. Frm these, a develper creates specific bjects that implement the applicatin architecture. Each bject class has prperties unique t its class while supprting fur primary and tw secndary (r ptinal) functins f an RTOS: Primary Management f prgram cde executin Synchrnizatin with events Passing data Managing time- r event-based alarms Secndary Management f memry (RAM) Exclusive access Each bject instantiated within a class has tw kinds f prperties thse it inherits frm the class and thse unique t its usage in the applicatin. RTXC Quadrs supprts several different kernel bject classes, each with a set f kernel services. Levels, Threads and Tasks exist t manage the executin f prgram cde. Semaphres allw tasks t synchrnize with events. Queues, Mailbxes and Messages, and Pipes supprt the passing f data between prducers and cnsumers. Event Surces, Cunters, and Alarms are the basis fr managing time r ther types f tick-based inputs. Memry Partitins permit a user t manage RAM withut fragmentatin. Exceptins permit prgrammatic attachment f interrupt vectrs t interrupt servicing rutines. RTXC Quadrs bjects are either statically r dynamically defined. Static definitin takes place befre prgram executin while dynamic definitin ccurs at runtime. RTXC Quadrs supprts applicatins that use static bjects nly, dynamic bjects nly r a cmbinatin f the tw. Dynamic bjects are the key requisite fr being able t dwnlad applicatins t a running system and having the new cde perate withut causing a system upset. 6.1 Levels and Threads A Thread is a cde mdule that is granted cntrl f the CPU by the RTXC/ss Scheduler. Each thread exists within a level that defines the thread s pririty. The primary use f threads is t prvide a lw-latency means f executing cde related t external interrupts r high frequency prcesses. The cde mdel f a thread is that f a functin, which the RTXC/ss Scheduler calls, passing it tw arguments: a user-defined parameter and the pinter t the thread s envirnment arguments, if any. The thread has n cntext upn entry and must perfrm any required data initializatin upn entry. When its peratins are cmplete, the thread returns t the RTXC/ss Scheduler withut cntext. A thread has a tw-dimensinal executin pririty defined as a cmbinatin f its pririty level and an rder number within the level. Therefre, threads may exist at multiple levels f pririty and there may be multiple threads at a given pririty level. Once defined, a thread s scheduling rder within the pririty is fixed and cannt be changed prgrammatically. When a thread begins executin, it is in cntrl f the CPU and must run t cmpletin. This rule is partly respnsible fr the high perfrmance nature f threads because RTXC/ss des nt save r restre any cntext when exiting r entering the thread. While the design f a thread must permit it t run frm its entry pint t a pint f cmpletin, RTXC/ss supprts multiple pririty levels f threads, permitting pre-emptive scheduling f threads. Thus, a thread scheduled t execute at a higher pririty level may pre-empt a thread currently running at a lwer pririty level. This feature permits the RTXC/ss framewrk t be emplyed in applicatins needing deterministic scheduling. 8 2/20/2003 Quadrs Systems, Inc. Cpyright All Rights Reserved

9 RTXC Quadrs Technical Summary When thread preemptin ccurs, RTXC/ss saves the cntext f the preempted thread befre starting the preempting thread at the higher pririty level. When it is time fr RTXC/ss t return prcessr cntrl t the preempted thread, it restres the cntext f the preempted thread befre resuming it. These peratins n the thread s gate give rise t many cmbinatins f behavir such as waiting t schedule a thread until certain events, each assciated with a bit in the gate, have ccurred. Services exist that permit a thread t read its gate t determine hw and why it was scheduled Thread Scheduling Envirnment Arguments The RTXC/ss Scheduler schedules anther thread fr executin nly at a pint f rescheduling, that is, when the current thread s peratin is cmplete. Within a given pririty level, the RTXC/ss Scheduler supprts tw different methds f scheduling threads: Pririty Rund Rbin Pririty Scheduling In Pririty Scheduling, threads at a given level are scheduled accrding t their rder number. At each pint f rescheduling, the Scheduler selects the thread with the highest rder number frm amng all the ready threads in the current pririty level. Even thugh ther threads with lwer rder numbers may have been ready fr a lnger time, the Scheduler activates the ready thread having the highest rder number Rund Rbin Scheduling Rund Rbin scheduling activates threads in descending rder within the current level at each pint f scheduling. There is n pririty implied by the thread s rder number within the level Thread Gates A cnfigurable prperty f the thread class is that f a gate. If the prperty exists within the class, then each thread has a gate that can be useful in scheduling the thread. The gate is simply a datum assciated with the thread that allws an interrupt service rutine (ISR), anther thread, r pssibly a Zne 3 task t perfrm an peratin n the gate. Permissible thread gate peratins are incrementing, decrementing, setting bits (lgical OR), and clearing bits (lgical NAND). When the gate is pened by ne f these actins, RTXC/ss schedules the assciated thread t run. Operatinally, when a thread s gate is the bject receiving an increment r a lgical OR peratin, the cntent f the gate becmes nn-zer and the assciated thread is scheduled. Cnversely, when a gate is decremented r has ne r mre bits cleared by a lgical NAND peratin such that the cntent f the gate becmes zer, the assciated thread is scheduled. Envirnments are a user-definable prperty f the thread class that permits variables t be stred in a structure assciated with the thread withut ccupying any stack space. A thread can stre and retrieve data int Envirnment Arguments structure as a means f preserving data between executin cycles such as a state variable, a buffer pinter r a scalar datum. The RTXC/ss Scheduler passes the address f the thread s envirnment argument blck t the thread each time it activates the thread. The blck address serves as a base pinter thrugh which the thread can easily access elements f the envirnment argument blck. 6.2 Tasks Tasks cntain the cde that implements an applicatin running in Zne 3 under the RTXC/ms Scheduler. Tasks exist independently, each having a prgram stack and cntext. After the applicatin tasks are defined, the user develps the task prgram cde. Tasks are cded as functins but receive n arguments frm the RTXC/ms Scheduler and return n arguments. During peratin, the RTXC/ms Scheduler maintains the status f all tasks and activates them accrding t a defined scheduling plicy Task States A task is always in ne f tw states: ready r blcked. A ready task is said t be ready t execute when there are n impediments t its executin ther than gaining cntrl f the CPU. A ready task exists in a list f ther tasks, accrding t its pririty with respect t ther tasks in the same state. The Scheduler maintains the list f ready tasks in a descending rder f pririty. The mst imprtant ready task is always at the head f the list. A blcked task is ne that is nt capable f gaining cntrl f the CPU fr reasns that may include its need t synchrnize with an event, the need fr sme resurce t becme available, r by its wn actin. While a task is blcked, it cnsumes n CPU cycles. Quadrs Systems, Inc. 2/20/ Cpyright All Rights Reserved

10 RTXC Quadrs Technical Summary Task Scheduling RTXC/ms als permits a task t wait n events assciated with a set f semaphres, using a lgical OR cnditin fr The RTXC/ms Scheduler determines when a task gains task resumptin. By this technique, a task can mnitr cntrl f the CPU. The Scheduler supprts three scheduling methds that may be mixed in whatever cmbinatin many events in a deterministic manner withut the need fr cycle-wasting plling schemes. When the RTXC/ms the develper requires. RTXC/ms supprts task scheduling using any f three different plicies: kernel identifies a signal t a semaphre in such a set, it resumes the waiting task and prvides the identity f the Preemptive signaled semaphre. Rund Rbin Time-Sliced 6.4 Queues Preemptive Scheduling Queues allw an bject t supprt data passing in a FIFO Preemptive scheduling is the default scheduling plicy in manner, preserving its chrnlgical nature. Within a given RTXC/ms as it is quite suitable fr mst embedded applicatins. Preemptive scheduling in cnjunctin with task the Queue bject class cpy data frm a surce buffer int queue, all data packets are f the same size. Services fr pririties prvides the basis fr a respnsive, deterministic the queue and frm the queue int a destinatin buffer. system design. Preemptive scheduling simply means that Queues are thus circular, with RTXC/ms maintaining their the highest pririty ready task in RTXC/ms is the task that status and ensuring prper peratin n EMPTY and receives cntrl f the CPU FULL cnditins Rund Rbin Scheduling Rund Rbin scheduling is a plling prtcl in which each task executes until it explicitly blcks r vluntarily yields cntrl f the CPU t anther task at the same pririty Tick-Sliced Scheduling RTXC Quadrs supprts the cncept f tick-sliced scheduling, which allws fr any tick-based event, such as time, t be the independent variable that gverns hw lng a task gets t run. This gives the develper additinal applicatin flexibility since he culd utilize either a tick based n a peridic tick (time) r an aperidic tick such as flw rate r vlume thrugh a meter. Tick-sliced scheduling is a variant f rund rbin scheduling and is similar in every respect except that a tick-sliced task can nly execute fr a predefined quantum f ticks. A tick-sliced task remains in cntrl f the CPU until its tick quantum expires r until it yields cntrl r blcks. If the tick quantum expires, the Scheduler frces the task t yield CPU cntrl temprarily t anther task at the same pririty. 6.3 Semaphres Semaphres serve as a means t synchrnize tasks with internal r external events. RTXC/ms uses a cunting semaphre mdel that cntains infrmatin abut an event and the tasks waiting fr it. RTXC/ms als permits semaphres t be assciated with certain transitinal cnditins f a queue. In nrmal peratin, there is n need fr these semaphres as the nrmal queue services prvide the necessary synchrnizatin. Hwever, it is smetimes advantageus t use queue event semaphres fr special synchrnizatin purpses. Almst withut exceptin, queue semaphres are used in cnnectin with RTXC/ms services that perate n a set f semaphres. 6.5 Mailbxes and Messages A Mailbx is an exchange pint fr messages sent by a sending task t a receiving task. Only the sender and the receiver tasks knw the frm and cntent f the message. Message services d nt cpy the data int a mailbx. Instead, they mve the address f the message. The result is a clean, efficient means fr passing data f variable size. Optins exist fr passing data in a FIFO manner r in ne f tw pririties, Urgent r Nrmal. The receiver task gets Urgent pririty messages befre thse f Nrmal pririty. A task can send Messages synchrnusly r asynchrnusly. Fr the frmer, the sending task sends the message and then waits fr the receiver t acknwledge its receipt, after which the sender can prceed. It is pssible t assciate an alarm with the receipt f the acknwledgement s that the waiting cnditin can be limited. Fr asynchrnus message transfers, the sending task sends the message but cntinues withut waiting fr an acknwledgement. The task can chse t wait at a later time fr an acknwledgement. 10 2/20/2003 Quadrs Systems, Inc. Cpyright All Rights Reserved

11 RTXC Quadrs Technical Summary 6.6 Pipes 6.8 Cunters Pipes are data passing mechanisms in RTXC Quadrs that permit rapid, unidirectinal transfers frm a single prducer t a single cnsumer. The prducer r the cnsumer may be an ISR r a thread. Pipes are ideally suited t cmmunicatins applicatins where data is acquired and buffered at a high frequency and then must be prcessed rapidly while the next blck is being acquired. Functinally, pipes are buffers f data that are filled by the prducer and prcessed by the cnsumer. The RTXC Quadrs pipe services perfrm the necessary functins f managing the buffers in the pipe while the actual reading and writing f the data in the pipe buffers is the respnsibility f the cnsumer and prducer, respectively. In peratin, the prducer allcates a free buffer frm the pipe, fills it with data, puts it back int the pipe. The cnsumer gets the full buffer, prcesses the data in it, and then frees the empty buffer back t the pipe where its can be re-used. Nrmally, pipe buffers are allcated sequentially and prcessed in the same rder. Hwever, RTXC/ss als permits the prducer t put a full buffer at the frnt f the pipe instead f at the tail, causing the cnsumer t prcess it next. Pipes can als be assciated with thread gates in such a manner that certain pipe peratins can result in peratins n assciated thread gates. Such a capability permits clse synchrnizatin between pipe prducers and cnsumers and minimizes the amunt f RAM required fr pipe buffers. 6.7 Event Surces Event Surces are bjects that cunt recurring events, whether synchrnus r asynchrnus. Such events are referred t as ticks and have n data cntent ther than their sequencing with respect t ther ticks f the same type. A tick can ccur fr an external event, usually an interrupt, r an internal event assciated with the applicatin. Fr example, an event surce may be the interrupt f a peridic timer used fr the system time base r an interrupt frm a shaft encder n an axle indicating angular psitin. Event Surces cunt the ticks as they ccur in a freerunning accumulatr. Event Surces als serve as the parent class f Cunters and thus, assciate cunters with the ticks. Cunters increment an assciated accumulatr each time the cunter receives a user-defined number f event ticks frm its parent event surce. Cunters receive event ticks at the same rate as they ccur at the event surce but are divided dwn thrugh a user-defined cunt mdulus specific t the cunter. When the cunter receives the mdulus number f ticks frm the surce, it adds ne cunter tick t its accumulatr. In additin t cunting, cunters als serve as the parent class f Alarms and prvide the basis fr permitting alarms t exist in RTXC Quadrs. Whenever a cunter increments its accumulatr fr a cunter tick, the alarms assciated with a given cunter are als examined. 6.9 Alarms Alarms prvide the ability t cause a desired actin t ccur when the alarm expires. The basis f the alarm may be time r sme ther system-specific parameter such as angular psitin. Because alarms are assciated with cunters, they necessarily take n dimensins f the assciated cunter. If the cunter accumulates time, then the alarm expiry is measured in the same units f time. RTXC Quadrs permits different types f actins t ccur upn expiratin f an alarm. In RTXC/ss stand-alne mde, these actins affect threads r culd pssibly be treated as an internal event assciated with a surce bject. In RTXC/ms, the user may assciate a semaphre with the expiratin f a given alarm s that it can be used in a set f semaphres n which a task waits fr ne f the assciated events t ccur Memry Partitins A Memry Partitin is a cllectin f RAM blcks that permits the allcatin and freeing f RAM withut the pssibility f fragmentatin, a cmmn prblem in sme embedded applicatins. RTXC/ms supprts the existence multiple memry partitins. Different memry partitins can have different blck sizes but all the blcks within a given memry partitin must be the same size. Services exist t allcate and free a blck f memry. The RTXC/ms kernel handles the EMPTY cnditin autmatically. Quadrs Systems, Inc. 2/20/ Cpyright All Rights Reserved

12 RTXC Quadrs Technical Summary 6.11 Mutexes It is quite cmmn in a multitasking system t have different tasks use a cmmn entity r resurce. Because an event driven design permits the preemptin f a task by ne f higher pririty, it is necessary t prvide a mechanism fr preventing uncntrlled access t such a cmmn resurce. RTXC/ms prvides such a mechanism in an exclusive access semaphrec called a mutex. By prper use f the services fr this class, the develper can guarantee exclusive use f the assciated resurce at any ne time. The use f mutexes in a preemptive scheduling, multitasking system naturally brings abut the pssibility that a higher pririty task may preempt a lwer pririty task that currently wns a resurce the preempting task wants t use. Such a situatin is cmmnly referred t as a pririty inversin because the lwer pririty task is hlding up the executin f the higher ne an bvius twisting f the scheduling rules. When a pririty inversin situatin is likely fr a given mutex, the develper may selectively chse t invke a prcedure knwn as pririty inheritance t crrect the prblem. In this methd, RTXC/ms raises the pririty f the task wning the resurce t that f the higher pririty task waiting t use it. When the wner f the mutex cmpletes the required use f the resurce, it releases wnership f the mutex and the kernel restres the task t its riginal pririty while granting wnership f the mutex t the higher pririty task that was waiting fr it Exceptins RTXC Quadrs als prvides fr a generalized interrupt service scheme. Because ISR cde is specific t bth the particular device and the methd f use in the applicatin, the develper must prvide it. See sectin 7 fr mre infrmatin n writing ISRs. 7 Interrupt Servicing RTXC Quadrs prvides a generalized interrupt service scheme fr which the rules are quite simple. While the hardware specifics f interrupt recgnitin and acknwledgment vary frm CPU t CPU, sftware handling f interrupts is mre cnsistent. In RTXC Quadrs, there are three basic parts t an ISR: Prlgue Device servicing Epilgue The prlgue begins the prcessing f the interrupt. The device servicing sectin deals with the particular device. The epilgue is the end actin perfrmed t finish interrupt prcessing and cntinue with the applicatin. RTXC Quadrs supprts a cncept f Nrmal, Private and Hybrid interrupt service rutines. 7.1 Nrmal Interrupts Nrmal interrupts are thse that make use f the RTXC ISR Macr, which prcesses the interrupt request accrding t the three-steps abve. The prlgue saves the interrupted prcess cntext and calls the device-servicing functin that deals with the device and annunces the event t the kernel as it ends its peratin. When the deviceservicing functin cmpletes, it returns t the epilgue, which then resumes the interrupted prcess. A device servicing functin has access t a set f RTXC kernel services specifically intended fr ISR usage. 7.2 Private Interrupts Fr users wh want t exercise cmplete cntrl ver the servicing f interrupts, a Private interrupt service rutine may be desired. Private ISRs d nt use the standard RTXC ISR Macr prcessing sequence, thus they may be used where speed f service r latency is f utmst imprtance. A Private ISR must exist utside f the RTXC Quadrs applicatin and there can be n cnnectin between the tw, leading t the rule that the user must write all elements f the Private ISR prlgue, deviceservicing and epilgue. 7.3 Hybrid Interrupts RTXC Quadrs als supprts a third methd fr treating interrupts the Hybrid interrupt service rutine. The Hybrid ISR is a cmbinatin f the features f the Private and the Nrmal ISR servicing methds. It allws the user t prcess the interrupt with very tailred cde fr higher perfrmance than in pssible with Nrmal interrupts but als t cnnect the interrupt servicing t the applicatin s its ccurrence can be annunced thrugh the use f the RTXC Kernel Services. 8 Mre Infrmatin Fr mre infrmatin n RTXC Quadrs,supprted prcessrs and ther QSI prducts, including an embedded file system, an embedded database and embedded netwrking stacks, please cntact Quadrs Systems at sales@quadrs.cm r call yur lcal sales representative. 12 2/20/2003 Quadrs Systems, Inc. Cpyright All Rights Reserved