Agenda. Review 2/10/11. CS 61C: Great Ideas in Computer Architecture (Machine Structures)
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1 CS 61C: Great Ideas in Computer Architecture (Machine Structures) Instructors: Randy H. Katz David A. PaGerson hgp://inst.eecs.berkeley.edu/~cs61c/sp New- School Machine Structures (It s a bit more complicated!) Parallel Requests Assigned to computer e.g., Search Katz Parallel Threads Assigned to core e.g., Lookup, Ads So#ware Parallel Instruc[ons >1 one [me e.g., 5 pipelined instruc[ons Parallel Data >1 data one [me e.g., Add of 4 pairs of words Hardware descrip[ons All one [me Harness Parallelism & Achieve High Performance Hardware Warehouse Scale Computer Core Memory Input/Output Instruc[on Unit(s) Main Memory Core Smart Phone Logic Gates 3 Computer Today s Lecture (Cache) Core Func[onal Unit(s) A 0 +B 0 A 1 +B 1 A 2 +B 2 A 3 +B 3 Machine Interpreta4on Levels of Representa[on/ Interpreta[on High Level Language Program (e.g., C) Compiler Assembly Language Program (e.g., MIPS) Assembler Machine Language Program (MIPS) Hardware Architecture DescripCon (e.g., block diagrams) Architecture Implementa4on temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) Today s Lecture Anything can be represented as a number, i.e., data or instruc[ons ! Logic Circuit DescripCon (Circuit SchemaCc Diagrams) 4 Agenda Review Instruc[ons as Numbers Administrivia Secret to Geing a Good Job / Good Internship Assemblers Compilers and Linkers Technology Break Compilers vs. Interpreters Compiler Op[miza[on? 5 Review Program can interpret binary number as unsigned integer, two s complement signed integer, floa[ng point number, ASCII characters, Unicode characters, Integers have largest posi[ve and largest nega[ve numbers, but represent all in between Two s comp. weirdness is one extra nega[ve numinteger and floa[ng point opera[ons can lead to results too big to store within their representa[ons: overflow/underflow Floa[ng point is an approxima<on of reals 2 32 pagerns to represent reals from to + Everything is a (binary) number in a computer Spring Lecture #7 6 1
2 Correc[on A = ( ) B = ( ) In single precision floa[ng point arithme[c, A does not equal B A = , B = Floa[ng Point Addi[on is not Associa[ve! Integer addi[on is associa[ve When does this mager? Instruc[ons as Numbers Instruc[ons are also kept as binary numbers in memory Stored program concept As easy to change programs as it is to change data Register names mapped to numbers Need to map instruc[on opera[on to a part of number 7 Spring Lecture #7 8 Instruc[ons as Numbers addu $t0,$s1,$s2 Des[na[on register $t0 is register 8 Source register $s1 is register 17 Source register $s2 is register 18 Add unsigned instruc[on encoded as number bits 5 bits 5 bits 5 bits 5 bits 6 bits Groups of bits call fields (unused field default is 0) Layout called instruc<on format Binary version called machine instruc<on Spring Lecture #7 9 Instruc[ons as Numbers sll $zero,$zero,0 $zero is register 0 Shiu amount 0 is 0 Shiu leu logical instruc[on encoded as number bits 5 bits 5 bits 5 bits 5 bits 6 bits Can also represent machine code as base 16 or base 8 number: hex, oct Spring Lecture #7 10 Everything in a Computer is Just a Binary Number Up to program to decide what data means Example 32- bit data shown as binary number: two What does it mean if its treated as 1. Signed integer 2. Unsigned integer 3. Floa[ng point 4. ASCII characters 5. Unicode characters 6. MIPS instruc<on Spring Lecture #7 11 Implica[ons of Everything is a Number Stored program concept Invented about 1947 (many claim inven[on) As easy to change programs as to change data! Implica[ons? Spring Lecture #7 12 2
3 Names of MIPS fields op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits op: Basic opera[on of instruc[on, or opcode rs: 1 st register source operand rt: 2 nd register source operand. rd: register des[na[on operand (result of opera[on) shamt: Shiu amount. funct: Func[on. This field, ouen called func<on code, selects the specific variant of the opera[on in the op field Spring Lecture #7 13 What about Load, Store, Immediate, Branches, Jumps? Fields for constants only 5 bits (- 16 to +15) Too small for many common cases #1 Simplicity favors regularity (all instruc[ons use one format) vs. #3 Make common case fast (mul[ple instruc[on formats)? 4 th Design Principle: Good design demands good compromises BeGer to have mul[ple instruc[on formats and keep all MIPS instruc[ons same size All MIPS instruc[ons are 32 bits or 4 bytes Spring Lecture #7 14 Names of MIPS Fields in op rs rt or constant 6 bits 5 bits 5 bits 16 bits op: Basic opera[on of instruc[on, or opcode rs: 1 st register source operand rt: 2 nd register source operand for branches but register des[na[on operand for lw, sw, and immediate opera[ons Address/constant: 16- bit two s complement number Note: equal in size of rd, shamt, funct fields Spring Lecture #7 15 Register (R), Immediate (I), Jump (J) Instruc[on Formats R- type op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Now loads, stores, branches, and immediates can have 16- bit two s complement or constant: - 32,768 ( ) to +32,767 (2 15-1) What about jump, jump and link? J- type op rs rt or constant 6 bits 5 bits 5 bits 16 bits op 6 bits 26 bits Spring Lecture #7 16 Addressing in Branches op rs rt or constant 6 bits 5 bits 5 bits 16 bits Programs much bigger than 2 16 bytes, but branch must fit in 16- bit field Must specify a register for branch es for big programs: PC = Register + Branch Which register? Condi[onal branching for IF- statement, loops Tend to be near branches; ½ within 16 instruc[ons Idea: PC- rela<ve branching Spring Lecture #7 17 Addressing in Branches op rs rt or constant 6 bits 5 bits 5 bits 16 bits Hardware increments PC early, so rela[ve is PC = (PC + 4) + Branch Another op[miza[on since all MIPS instruc[ons 4 bytes long? Mul[ply value in branch field by 4! MIPS PC- rela[ve branching PC = (PC + 4) + (Branch *4) Spring Lecture #7 18 3
4 Encoding of MIPS Instruc[ons: Must Be Unique! Addressing in Jumps J- type op 6 bits 26 bits Same trick for Jumps, Jump and Link PC = Jump * 4 Since PC = 32 bits, and Jump * 4 = 28 bits, what about other 4 bits? Jump and Jump and Link only changes bogom 28 bits of PC Spring Lecture #7 19 Agenda Secret to Geing a Good Job / Good Internship Spring Lecture #8 op rs rt rd shamt funct addu subu sltu sll addi unsigned lw (load word) sw (store word) beq bne j ( jump) jal jr ( jump reg) J J 9ten 35ten 43ten 4ten 5ten 2ten 3ten constant 33ten 35ten 43ten 0ten constant 8ten 21 Spring Lecture #7 2 Spring Lecture #8 22 Computers In The News Distribu[on: : 8 * : 1 * : 2 * : 10 * : 3 * : 4 * : 14 ** : 5 * : 56 *** * : 4 * : 217 ***** * Spring Lecture #8 Read before lecture, think about lecture, do assignments, labs,..? Cram day before exam, start project with 24 hours to go? Scores on Project 1, Part 1 Number grades: 324 Mean: 22. Mode: 25. Standard devia[on: 5.5 Minimum: 0. 1st quar[le: 20. 2nd quar[le (median): 25. 3rd quar[le: 25. Maximum: 25. Job/Intern interviews are (now) oral exams Long- term memory vs. short- term/working memory Long- term memory is intended for storage of informa[on over a long [me. Informa[on from the working memory is transferred to it auer a few seconds. Unlike in working memory, there is ligle decay. Learning for recall 6- `1 months later in oral exam vs. geing grades? Assemblers Compilers and Linkers Technology Break Compilers vs. Interpreters Compiler Op[miza[on? For mat Secret To Geing Good Job/Internship Review Instruc[ons as Numbers Administrivia Instruc[on 23 IBM Watson play Jeopardy! with champions A significant milestone in compu[ng, on par with IBM Deep Blue vs. Kasparov in chess in 1997? Mon 2/14 Wed 2/16 7-7:30PM KGO Channel 7 Spring Lecture #8 hgp://www- 03.ibm.com/innova[on/us/watson 24 4
5 My Life Beyond Compu[ng My Life Beyond Compu[ng 1935 Ford Sta[on Wagon 221 cubic inch (85 HP) original Ford Flathead V8 Engine Ford Cabriolet 454 cubic inch (7500 cc) Big Block Chevy V8 Engine 26 Assembler Input: Assembly Language Code (e.g., foo.s for MIPS) Output: Object Code, informa[on tables (e.g., foo.o for MIPS) Reads and Uses Direc[ves Replace Pseudoinstruc[ons Produce Machine Language Creates Object File addu $t0,$s2,$t0 sw $t0,($t1) op rs rt or constant Spring Lecture #7 28 I addu $t0,$s2,$t0 sw $t0,($t1) I addu $t0,$s2,$t0 R sw $t0,($t1) op rs rt or constant Spring Lecture #7 29 op rs rt or constant Spring Lecture #7 30 5
6 addu $t0,$s2,$t0 sw $t0,($t1) Instruc[on For mat op rs rt rd shamt funct addu R 0 reg reg reg 0 33 ten n.a. lw (load word) I 35 ten reg reg n.a. n.a. n.a. sw (store word) I 43 ten reg reg n.a. n.a. n.a. op rs rt or constant Spring Lecture #7 31 addu $t0,$s2,$t0 sw $t0,($t1) Instruc[on For mat op rs rt rd shamt funct addu R 0 reg reg reg 0 33 ten n.a. lw (load word) I 35 ten reg reg n.a. n.a. n.a. sw (store word) I 43 ten reg reg n.a. n.a. n.a. op rs rt or constant Spring Lecture #7 32 addu $t0,$s2,$t0 sw $t0,($t1) Instruc[on For mat op rs rt rd shamt funct addu R 0 reg reg reg 0 33 ten n.a. lw (load word) I 35 ten reg reg n.a. n.a. n.a. sw (store word) I 43 ten reg reg n.a. n.a. n.a. op rs rt or constant Spring Lecture #7 33 Add ress Conver[ng to MIPS Machine code Loop: sll $t1,$s3,2 addu $t1,$t1,$s6 lw $t0,0($t1) bne $t0,$s5, Exit addiu $s3,$s3,1 820 j Loop Exit: R- type J- type op rs rt rd shamt funct op rs rt or constant op Spring Lecture #7 34 Conver[ng to MIPS Machine code Add Loop: ress 800 sll $t1,$s3,2 R addu $t1,$t1,$s6 R lw $t0,0($t1) bne $t0,$s5, Exit I I addiu $s3,$s3,1 820 j Loop Exit: R- type J- type I J op rs rt rd shamt funct op rs rt or constant op Spring Lecture # bit constants in MIPS Can create a 32- bit constant from two 32- bit MIPS instruc[ons Load Upper Immediate (lui or Louie ) puts 16 bits into upper 16 bits of des[na[on register MIPS to load 32- bit constant into register $s0? two lui $s0, 61 # 61 = two ori $s0, $s0, 2304 # 2304 = two Spring Lecture #7 36 6
7 Transla[on Many compilers produce object modules directly 2.12 Transla[ng and Star[ng a Program Assembly and Pseudo- instruc[ons Turning textual MIPS instruc[ons into machine code called assembly, program called assembler Calculates es, maps register names to numbers, produces binary machine language Textual language called assembly language Can also accept instruc[ons convenient for programmer but not in hardware Load immediate (li) allows 32- bit constants, assembler turns into lui + ori (if needed) Load double (ld) uses two lwc1 instruc[ons to load a pair of 32- bit floa[ng point registers Called Pseudo- Instruc<ons Assembler Direc[ves (p. B- 5 to B- 7) Give direc[ons to assembler, but do not produce machine instruc[ons.text: Subsequent items put in user text segment.data: Subsequent items put in user data segment.globl sym: declares sym global and can be referenced from other files.asciiz str: Store the string str in memory and null- terminate it.word w1 wn: Store the n 32- bit quan[[es in successive memory words Assembler Pseudoinstruc[ons Most assembler instruc[ons represent machine instruc[ons one- to- one Pseudoinstruc[ons: figments of the assembler s imagina[on move $t0, $t1 add $t0, $zero, $t1 blt $t0, $t1, L slt $at, $t0, $t1 bne $at, $zero, L $at (register 1): assembler temporary 40 More Pseudoinstruc[ons Asm. treats convenient varia[ons of machine language instruc[ons as if real instruc[ons Pseudo: Real: addu $t0,$t6,1 subu $sp,$sp,32 sd $a0, 32($sp) la $a0, str More Pseudoinstruc[ons Asm. treats convenient varia[ons of machine language instruc[ons as if real instruc[ons Pseudo: Real: addu $t0,$t6,1 addiu $t0,$t6,1 subu $sp,$sp,32 sd $a0, 32($sp) la $a0, str 7
8 More Pseudoinstruc[ons Asm. treats convenient varia[ons of machine language instruc[ons as if real instruc[ons Pseudo: Real: addu $t0,$t6,1 addiu $t0,$t6,1 subu $sp,$sp,32 addiu $sp,$sp,-32 sd $a0, 32($sp) la $a0, str More Pseudoinstruc[ons Asm. treats convenient varia[ons of machine language instruc[ons as if real instruc[ons Pseudo: Real: addu $t0,$t6,1 addiu $t0,$t6,1 subu $sp,$sp,32 addiu $sp,$sp,-32 sd $a0, 32($sp) sw $a0, 32($sp) sw $a1, 36($sp) la $a0, str lui $at,left(str) ori $a0,$at,right(str) Producing an Object Module Assembler (or compiler) translates program into machine instruc[ons Provides informa[on for building a complete program from the pieces Header: described contents of object module Text segment: translated instruc[ons Sta[c data segment: data allocated for the life of the program Reloca[on info: for contents that depend on absolute loca[on of loaded program Symbol table: global defini[ons and external refs Debug info: for associa[ng with source code Separate Compila[on and Assembly No need to compile all code at once How put pieces together? FIGURE B.1.1 The process that produces an executable file. An assembler translates a file of assembly language into an object file, which is linked with other files and libraries into an executable file. Copyright 2009 Elsevier, Inc. All rights reserved Transla[on and Startup Many compilers produce object modules directly 2.12 Transla[ng and Star[ng a Program Linker S[tches Files Together Sta[c linking 47 FIGURE B.3.1 The linker searches a colleccon of object fi les and program libraries to find nonlocal roucnes used in a program, combines them into a single executable file, and resolves references between roucnes in different files. Copyright 2009 Elsevier, Inc. All rights reserved. 48 8
9 Linking Object Modules Produces an executable image 1. Merges segments 2. Resolve labels (determine their es) 3. Patch loca[on- dependent and external refs Ouen a slower than compiling all the machine code files must be read into memory and linked together Loading a Program Load from image file on disk into memory 1. Read header to determine segment sizes 2. Create virtual space (cover later in semester) 3. Copy text and ini[alized data into memory 4. Set up arguments on stack 5. Ini[alize registers (including $sp, $fp, $gp) 6. Jump to startup rou[ne Copies arguments to $a0, and calls main When main returns, do exit systems call Review Everything is a (binary) number in a computer Instruc[ons and data; stored program concept Assemblers can enhance machine instruc[on set to help assembly- language programmer Translate from text that easy for programmers to understand into code that machine executes efficiently: Compilers, Assemblers Linkers allow separate transla[on of modules Interpreters for debugging, but slow execu[on Hybrid (Java): Compiler + Interpreter to try to get best of both Compiler Op[miza[on to relieve programmer 51 9
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