# Architecture II. Computer Systems Laboratory Sungkyunkwan University

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1 MIPS Instruction ti Set Architecture II Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

2 Making Decisions (1) Conditional operations Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1; bne rs, rt, L1 if (rs!= rt) branch to instruction labeled L1; j L1 unconditional jump to instruction labeled L1; 2

3 Making Decisions (2) Compiling If statements C code: if (i==j) f = g+h; else f = g h; f, g, in \$s0, \$s1, Compiled MIPS code: bne \$s3, \$s4, Else add \$s0, \$s1, \$s2 j Exit Else: sub \$s0, \$s1, \$s2 Exit:... Assembler calculates addresses 3

4 Making Decisions (3) Compiling loop statements C code: while (save[i] == k) i += 1; iin \$s3, k in \$s5, address of save in \$s6 Compiled MIPS code: Loop: sll \$t1, \$s3, 2 add \$t1, \$t1, \$s6 lw \$t0, 0(\$t1) bne \$t0, \$s5, Exit addi \$s3, \$s3, 1 j Loop Exit:... 4

5 Making Decisions (4) Basic blocks A basic block is a sequence of instructions with No embedded branches (except at end) No branch targets (except at beginning) A compiler identifies basic blocks for optimization An advanced d processor can accelerate execution of basic blocks 5

6 Making Decisions (5) More conditional operations Set result to 1 if a condition is true Otherwise, set to 0 slt rd, rs, rt if (rs < rt) rd=1;elserd=0; = slti rt, rs, constant if (rs < constant) rt = 1, else rt = 0; Use in combination with beq, bne slt bne \$t0, \$s1, \$s2 # if (\$s1 < \$s2) \$t0, \$zero, L1 # branch to L 6

7 Making Decisions (6) Branch instruction design Why not blt, bge, etc? Hardware for <,, slower than =, Combining with branch involves more work per instruction, requiring a slower clock All instructions ti are penalized! beq and bne are the common case This is a good design compromise 7

8 Making Decisions (7) Signed vs. Unsigned Signed comparison: slt, slti Unsigned comparison: sltu,, sltui Example \$s0 = \$s1 = slt \$t0, \$s0, \$s1 # signed 1 < +1 \$t0 = 1 sltu \$t0, \$s0, \$s1 # unsigned +4,294,967,295 > \$t0 = 0 8

9 Procedure Calls (1) Steps required for procedure calling Place parameters in registers Transfer control to procedure Acquire storage for procedure Perform procedure s operations Place result in register for caller Return to place of call 9

10 Procedure Calls (2) Register usage Registers \$a0 \$a3 arguments (reg s 4 7) \$v0, \$v1 result values (reg s 2 3) Usage \$t0 \$t9 temporaries (caller save reg s: can be overwritten by callee) \$s0 \$s7 saved (callee save reg s: must be saved/restored by callee) \$gp global pointer for static data (reg 28) \$sp stack pointer (reg 29) \$fp frame pointer (reg 30) \$ra return address (reg 31) 10

11 Procedure Calls (3) Procedure call: jump and link jal ProcedureLabel Address of following instruction i put in \$ra Jumps to target address Procedure return: jump register jr \$ra Copies \$ra to program counter Can also be used for computed jumps e.g., for case/switch statements 11

12 Procedure Calls (4) Leaf procedure example C code: int leaf_example example (int g, h, i, j) { int f; f = (g + h) (i + j); return f; } Arguments g,, j in \$a0,,, \$a3 f in \$s0 (hence, need to save \$s0 on stack) Result in \$v0 12

13 Procedure Calls (5) Leaf procedure example (cont d) MIPS code: leaf_example: example: addi \$sp, \$sp, 4 sw \$s0, 0(\$sp) add \$t0, \$a0, \$a1 add \$t1, \$a2, \$a3 sub \$s0, \$t0, \$t1 add \$v0, \$s0, \$zero lw \$s0, 0(\$sp) addi \$sp, \$sp, 4 jr \$ra Save \$s0 on stack Procedure body Result Restore \$s0 Return 13

14 Procedure Calls (6) Non-leaf procedures Procedures that call other procedures For nested call, caller needs to save on the stack Its return address Any arguments and temporaries needed after the call Restore from the stack after the call 14

15 Procedure Calls (7) Non-leaf procedure example C code: int fact (int n) { if (n < 1) return 1; else return n * fact(n 1); } Argument n in \$a0 Result in \$v0 15

16 Procedure Calls (8) Non-leaf procedure example (cont d) MIPS code: fact: addi \$sp, \$sp, 88 # adjust stack for 2 items sw \$ra, 4(\$sp) # save return address sw \$a0, 0(\$sp) # save argument slti \$t0, \$a0, 1 # test for n < 1 beq \$t0, \$zero, L1 addi \$v0, \$zero, 1 # if so, result is 1 addi \$sp, \$sp, 8 # pop 2 items from stack jr \$ra # and return L1: addi \$a0, \$a0, 1 # else decrement n jal fact # recursive call lw \$a0, 0(\$sp) # restore original n lw \$ra, 4(\$sp) # and return address addi \$sp, \$sp, 8 # pop 2 items from stack mul \$v0, \$a0, \$v0 # multiply to get result jr \$ra # and return 16

17 Procedure Calls (9) Local data on the stack Local data allocated by callee e.g., C automatic variables Procedure frame (activation record) Used by some compilers to manage stack storage 17

18 Procedure Calls (10) Memory layout Text: program code Static data: global variables e.g., static variables in C, constant arrays and strings \$gp initialized iti to address allowing ±offsets into this segment Dynamic data: heap e.g., malloc in C, new in Java Stack: automatic storage 18

19 Strings (1) Character data Byte-encoded character sets ASCII: 128 characters» 95 graphic, 33 control Latin-1: 256 characters» ASCII + 96 more graphic characters Unicode: 32-bit character set Used in Java, C++ wide characters, Most of the world s alphabets, plus symbols UTF-8, UTF-16: variable-length encodings 19

20 Strings (2) Byte/halfword operations Could use bitwise operations MIPS byte/halfword load/store String processing is a common case lb rt, offset(rs) lh rt, offset(rs) Sign extend to 32 bits in rt lbu rt, offset(rs) lhu rt, offset(rs) Zero extend to 32 bits in rt sb rt, offset(rs) sh rt, offset(rs) Store just rightmost byte/halfword 20

21 Strings (3) String copy example C code: Null-terminated string int strcpy (char x[], char y[]) { int i; i = 0; while ((x[i] = y[i])!= \0 ) i += 1; } Addresses of x, y in \$a0, \$a1 iin \$s0 21

22 Strings (4) String copy example (cont d) MIPS code: strcpy: addi \$sp, \$sp, 44 # adjust stack for 1 item sw \$s0, 0(\$sp) # save \$s0 add \$s0, \$zero, \$zero # i = 0 L1: add \$t1, \$s0, \$a1 # addr of y[i] in \$t1 lbu \$t2, 0(\$t1) # \$t2 = y[i] add \$t3, \$s0, \$a0 # addr of x[i] in \$t3 sb \$t2, 0(\$t3) # x[i] = y[i] beq \$t2, \$zero, L2 # exit loop if y[i] == 0 addi \$s0, \$s0, 1 # i = i + 1 j L1 # next iteration of loop L2: lw \$s0, 0(\$sp) # restore saved \$s0 addi \$sp, \$sp, 4 # pop 1 item from stack jr \$ra # and return 22

23 Arrays vs. Pointers (1) Array indexing involves Multiplying index by element size Adding to array base address Pointers correspond directly to memory addresses Can avoid indexing complexity 23

24 Arrays vs. Pointers (2) Example: Clearing an array clear1(int array[], int size) { int i; for (i = 0; i < size; i += 1) array[i] = 0; } move \$t0,\$zero # i = 0 loop1: sll \$t1,\$t0,2 # \$t1 = i * 4 add \$t2,\$a0,\$t1 # \$t2 = # &array[i] sw \$zero, 0(\$t2) # array[i] = 0 addi \$t0,\$t0,1 # i = i + 1 slt \$t3,\$t0,\$a1 # \$t3 = # (i < size) bne \$t3,\$zero,loop1 # if ( ) # goto loop1 clear2(int *array, int size) { int *p; for (p = &array[0]; p < &array[size]; p = p + 1) *p = 0; } move \$t0,\$a0 # p = & array[0] sll \$t1,\$a1,2 # \$t1 = size * 4 add \$t2,\$a0,\$t1 # \$t2 = # &array[size] loop2: sw \$zero,0(\$t0) # Memory[p] = 0 addi \$t0,\$t0,4 # p = p + 4 slt \$t3,\$t0,\$t2 # \$t3 = #(p<&array[size]) bne \$t3,\$zero,loop2 # if ( ) # goto loop2 24

25 Arrays vs. Pointers (3) Comparison Multiply strength reduced to shift Array version requires shift to be inside loop Part of index calculation for incremented i cf. incrementing pointer Compiler can achieve same effect as manual use of pointers Induction variable elimination i i Better to make program clearer and safer 25

26 Addressing (1) 32-bit constants Most constants are small 16-bit immediate is sufficient For the occasional 32-bit constant lui rt, constant Copies 16-bit constant to left 16 bits of rt Clears right 16 bits of rt to 0 lui \$s0, ori \$s0, \$s0,

27 Addressing (2) Branch addressing Branch instructions specify Opcode, two registers, target address op rs rt constant or address 6 bits 5 bits 5 bits 16 bits Most branch targets are near branch Forward or backward PC-relative addressing Target address = PC + offset 4 PC already incremented by 4 by this time 27

28 Addressing (3) Jump addressing Jump (j and jal) targets could be anywhere in text segment Encode full address in instruction op address 6 bits 26 bits (Pseudo) Direct jump addressing Target address = PC : (address 4) 28

29 Addressing (4) Target addressing example Loop code from earlier example Assume loop at location Loop: sll \$t1, \$s3, add \$t1, \$t1, \$s lw \$t0, 0(\$t1) bne \$t0, \$s5, Exit addi \$s3, \$s3, j Loop Exit:

30 Addressing (5) Branching far away If branch target is too far to encode with 16-bit offset, assembler rewrites the code Example: L2: beq \$s0, \$s1, L1 bne \$s0, \$s1, L2 j L1 30

32 Synchronization (1) Synchronization instructions Two processors sharing an area of memory P1 writes, then P2 reads Data race if P1 and P2 don t synchronize» Result depends on order of accesses Hardware support required Atomic read/write memory operation No other access to the location allowed between the read and write Could be a single instruction e.g., atomic swap of register memory Or an atomic pair of instructions 32

33 Synchronization (2) Synchronization in MIPS Load linked: Store conditional: ll rt, offset(rs) sc rt, offset(rs) Succeeds if location not changed since the ll» Returns 1 in rt Fails if location is changed» Returns 0 in rt Example: atomic swap (to test/set t/ t lock variable) try: add \$t0, \$zero, \$s4 # copy exchange value ll \$t1, 0(\$s1) # load linked sc \$t0, 0(\$s1) # store conditional beq \$t0, \$zero, try # branch store fails add \$s4, \$zero, \$t1 # put load value in \$s4 33

34 Translation and Startup (1) Overall flow Many compilers produce object modules directly Static linking 34

35 Translation and Startup (2) Assembler pseudoinstructions Most assembler instructions represent machine instructions one-to-one Pseudoinstructions: figments of the assembler s imagination move \$t0, \$t1 add \$t0, \$zero, \$t1 blt \$t0, \$t1, L slt \$at, \$t0, \$t1 bne \$at, \$zero, L \$at (register 1): assembler temporary 35

36 Translation and Startup (3) Producing an object module Assembler (or compiler) translates program into machine instructions Provides information for building a complete program from the pieces Header: described contents of object module Text segment: translated instructions Static data segment: data allocated for the life of the program Relocation info: for contents that depend on absolute location of loaded program Symbol table: global definitions and external references Debug info: for associating with source code 36

37 Translation and Startup (4) Linking object modules Produces an executable image 1. Merges segments 2. Resolve labels (determine their addresses) 3. Path location-dependent and external references Could leave location dependencies for fixing by a relocating loader But with virtual memory, no need to do this Program can be loaded into absolute location in virtual memory space 37

38 Translation and Startup (5) Loading a program Load from image file on disk into memory 1. Read header to determine segment sizes 2. Create virtual address space 3. Copy text and initialized data into memory, (or set page table entries so they can be faulted in) 4. Setup arguments on stack 5. Initialize registers (including \$sp, \$fp, \$gp) 6. Jump to startup routine» Copies arguments to \$a0, and calls main» When main returns, do exit syscall 38

39 Translation and Startup (6) Dynamic linking Only link/load library procedure when it is called Requires procedure code to be relocatable Avoids image bloat caused by static linking of all (transitively) referenced libraries Automatically picks up new library versions 39

41 Translation and Startup (8) Starting Java applications Simple portable instruction set for the JVM Compiles bytecodes of hot methods into native code for host machine Interprets bytecodes 41

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