Elementos de Lógica Digital II
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1 Elementos de Lógica Digital II COMP09 μprocessor Vanderlei Bonato Eduardo Simões 07/11/2010 1
2 Introduction Architecture: the programmer s view of the computer Defined by instructions (operations) and operand locations Microarchitecture: how to implement an architecture in hardware Application Software Operating Systems Architecture Microarchitecture Logic Digital Circuits Analog Circuits Devices programs device drivers instructions registers datapaths controllers adders memories AND gates NOT gates amplifiers filters transistors diodes Physics electrons 07/11/2010 2
3 Assembly Language To command a computer, you must understand its language. Instructions: words in a computer s language Instruction set: the vocabulary of a computer s language Instructions indicate the operation to perform and the operands to use. Assembly language: human-readable format of instructions Machine language: computer-readable format Computers only understand 1 s and 0 s Binary representation of instructions 07/11/2010 3
4 Stored Program Sequence of instructions: only difference between two applications (for example, a text editor and a video game) To run a new program: No rewiring required Simply store new program in memory The processor hardware executes the program: fetches (reads) the instructions from memory in sequence performs the specified operation The program counter (PC) keeps track of the current instruction 07/11/2010 4
5 What needs to be stored in memory? Instructions (also called text) Data Global/static: allocated before program begins Dynamic: allocated within program How big is memory? At most 2 32 = 4 gigabytes (4 GB) From address 0x to 0xFFFFFFFF 07/11/2010 5
6 Ada Lovelace, Wrote the first computer program Her program calculated the Bernoulli numbers on Charles Babbage s Analytical Engine She was the only legitimate child of the poet Lord Byron 07/11/2010 6
7 Programming High-level languages: e.g., C, Java, Python Written at more abstract level Common high-level software constructs: if/else statements for loops while loops array accesses procedure calls Other useful instructions: Arithmetic/logical instructions Branching 07/11/2010 7
8 How do we compile & run an application? High Level Code Compiler Assembly Code Assembler Object File Object Files Library Files Linker Executable Loader Memory 07/11/2010 8
9 Grace Hopper, Graduated from Yale University with PhD in mathematics Developed first compiler Helped develop the COBOL programming language Highly awarded naval officer Received World War II Victory Metal and National Defense Service Medal, among others 07/11/2010 9
10 RISC x CISC architecture - RISC (Reduced Instruction Set Computer) - A small number of simple instructions - Hardware to decode and execute the instruction can be simple, small, and fast. - More complex instructions (that are less common) can be performed using multiple simple instructions. - Other architectures, such as Intel s IA-32 found in many PC s, are complex instruction set computers (CISC). They include complex instructions that are rarely used, such as the string move instruction that copies a string (a series of characters) from one part of memory to another. 07/11/
11 The COMP09 μprocessor COMP09 architecture: Developed by Eduardo do Valle Simões and Vanderlei Bonato at ICMC/USP. RISC architecture type 16-bit instructions Four instruction formats: R-type: register operands JB-type: jump and branch instruction type C-type: system control S-type: stack operations 07/11/
12 The ucomp09 register set Name Qtt Purpose R n 0-7 General purpose FR 1 Bits of flag SP 1 Stack pointer PC 1 Program counter IR (interno) 1 Instruction register MAR (interno) 1 Memory address buffer MBR (interno) 1 Data memory buffer 07/11/
13 Instruction format Register operands (R-type) op = opcode rx, ry, rz: registers c: bit of carry op rx ry rz c 6 bits 3 bits 3 bits 3 bits 1 bit 07/11/
14 Data manipulation instructions Direct address mode STORE END RX MEM(END) <- RX RX xxx xxx x END LOAD RX END RX <- MEM(END) RX xxx xxx x END Immediate address mode STOREIMED RX NR MEM(RX) <- #NR RX xxx xxx x NR LOADIMED RX NR RX <- #NR RX xxx xxx x NR Indexed address mode STOREINDEX RY RX MEM(RY) <- RX RX RY xxx x LOADINDEX RX RY RX <- MEM(RY) RX RY xxx x MOV RX RY RX <- RY RX RY xxx x 07/11/
15 Arithmetic instructions ADD RX RY RZ RZ<-RX+RY RX RY RZ 0 ADDC RX RY RZ RZ<-RX+RY+C RX RY RZ 1 SUB RX RY RZ RZ<-RX-RY RX RY RZ 0 SUBC RX RY RZ RZ<-RX-RY+C RX RY RZ 1 MULT RX RY RZ RZ<-RX*RY RX RY RZ 0 MULTC RX RY RZ RZ<-RX*RY+C RX RY RZ 1 DIV RX RY RZ RZ<-RX/RY RX RY RZ 0 DIVC RX RY RZ RZ<-RX/RY+C RX RY RZ 1 INC RX RX RX xxx xxx 0 DEC RX RX RX xxx xxx 1 07/11/
16 Logic instructions LAND RX RY RZ RZ<-RX AND RY RX RY RZ x LOR RX RY RZ RZ<-RX OR RY RX RY RZ x LXOR RX RY RZ RZ<-RX XOR RY RX RY RZ x LNOT RX RX<-NOT(RX) RX RY xxx x ROT L RX ROTATE TO LEFT RX xxx x1x 0 ROT R RX ROTATE TO RIGHT RX xxx x1x 1 SHIFT L0 RX SHIFT TO LEFT (FILL 0) RX xxx x00 0 SHIFT L1 RX SHIFT TO LEFT (FILL 1) RX xxx x01 0 SHIFT R0 RX SHIFT TO RIGHT (FILL 0) RX xxx x00 1 SHIFT R1 RX SHIFT TO RIGHT (FILL 1) RX xxx x01 1 CMP RX RY FR<-COND RX RY xxx x 07/11/
17 Input and Output (I/O) instructions Input INCHAR RX RX< &key RX xxx xxx x Output OUTCHAR RX RY VIDEO(RY)<-CHAR(RX) RX RY xxx x 07/11/
18 Instruction format Jump and Branch (JB-type) op op <cond> +/- inc 6 bits 4 bits 1 bit 5 bits 07/11/
19 Branch instructions Branches only if the condition is true BRA +/-INC PC<-PC +/- INC /- INC BEQ +/-INC PC<-PC +/- INC /- INC BNE +/-INC PC<-PC +/- INC /- INC BZ +/-INC PC<-PC +/- INC /- INC BNZ +/-INC PC<-PC +/- INC /- INC BC +/-INC PC<-PC +/- INC /- INC BNC +/-INC PC<-PC +/- INC /- INC BGR +/-INC PC<-PC +/- INC /- INC BLE +/-INC PC<-PC +/- INC /- INC BEG +/-INC PC<-PC +/- INC /- INC BEL +/-INC PC<-PC +/- INC /- INC BOV +/-INC PC<-PC +/- INC /- INC BNOV +/-INC PC<-PC +/- INC /- INC 07/11/
20 Jump instructions (all with END) Jumps to END only if the condition is true JMP END PC<-END x xxxxx END JEQ END PC<-END x xxxxx JNE END PC<- END x xxxxx JZ END PC<- END x xxxxx JNZ END PC<- END x xxxxx JC END PC<- END x xxxxx JNC END PC<- END x xxxxx JGR END PC<- END x xxxxx JLE END PC<- END x xxxxx JEG END PC<- END x xxxxx JEL END PC<- END x xxxxx JOV END PC<- END x xxxxx JNOV END PC<- END x xxxxx 07/11/
21 Call instructions (all with END) Calls the procedure only of the condition is true CALL END MEM(SP)<-PC x xxxxx PC<-END END SP-- CEQ END idem x xxxxx CNE END idem x xxxxx CZ END idem x xxxxx CNZ END idem x xxxxx CC END idem x xxxxx CNC END idem x xxxxx CGR END idem x xxxxx CLE END idem x xxxxx CEG END idem x xxxxx CEL END idem x xxxxx COV END idem x xxxxx CNOV END idem x xxxxx 07/11/
22 Return instruction RTS SP xxxx x xxxxx PC<=MEM(SP) 07/11/
23 Instruction format System control (C-type) op op not used 6 bits 1 bit 9 bits 07/11/
24 Control instructions CLEARC C< xxxxxxxxx SETC C< xxxxxxxxx HALT STOP EXECUTION x xxxxxxxxx NOP NO OPERATION x xxxxxxxxx 07/11/
25 Instruction format Stack operations (S-type) op RX op not used 6 bits 3 bits 1 bit 6 bit 07/11/
26 Stack instructions PUSH RX MEM(SP) <- RX RX 0 xxxxxx SP-- PUSH FR MEM(SP) <- FR xxx 1 xxxxxx SP-- POP RX RX <- MEM(SP) RX 0 xxxxxx SP++ POP FR FR <- MEM(SP) xxx 1 xxxxxx SP++ 07/11/
27 The COMP09 processor microarchitecture 07/11/
28 Exercises Convert the following COMP09 assembly code into machine language. Write the instructions in hexadecimal INCHAR 0 INCHAR 1 OUTCHAR /11/
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