Typical Performance 1. Absolute Maximum Ratings
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1 Device Features +5V/355mA at operating bias condition Gain = GHz P1dB = GHz LTE 20M ACLR = 22dBm Output Power at 1.9GHz Intergrated interstage matching Lead-free/Green/RoHS-compliant QFN3x3 SMT package Product Description The BMT321 is a high dynamic range twostage power amplifier, housed in a leadfree/green/rohs compliant 3x3mm QFN package. The BMT321 uses a high reliability InGaP/GaAs HBT process technology. The BMT321 is designed for use where high linearity and gain are required. The BMT321 is able to deliver over 22 dbm output power from 0.7 to 2.8GHz while maintaining superior ACLR performance with a few external matching components. All devices are 100% RF/DC screened. Applications Base station /Repeaters Infrastructure/Small Cell Commercial/Industrial/Military wireless system LTE / WCDMA /CDMA Wireless Infrastructure Application Circuits Typical Performance 1 Parameter Frequency Unit GHz Gain db S db S db OIP dbm P1dB dbm LTE 20M ACLR dbm LTE 10M ACLR dbm WCDMA ACLR dbm Noise Figure db 1 Device performance _ measured on a BeRex evaluation board at 25 C, 50 Ω 2 OIP3 _ measured on two tones with a output power 17dBm/ tone, F2 F1 = 1 MHz.. *OIP3_tuned for max OIP3 *ACLR Channel Power measured at -50dBc. - LTE set-up: 3GPP LTE, FDD E-TM3.1, 20MHz BW, ±5MHz offset, PAR Prob. - LTE set-up: 3GPP LTE, FDD E-TM3.1, 10MHz BW, ±5MHz offset, PAR Prob. - WCDMA set-up: 3GPP WCDMA, TM1+64DPCH, +5MHz offset, PAR 9.78 at 0.01% Prob. Min. Typical Max. Unit Bandwidth GHz I bias 26 ma I (I cq1 + I cq2 ) 355 ma V CC /V bias 5.0 V R TH 12.9 C/W Absolute Maximum Ratings Parameter Rating Unit Operating Case Temperature -40 to +85 C Storage Temperature -55 to +155 C Junction Temperature +200 C Operating Voltage Supply Current Input RF Power V A dbm *Operation of this device above any of these parameters may result in permanent damage. 1
2 Pin Configuration Pin No. Label 1,10,12 N/C 2,3 RF IN 4 I REF1 5 I REF2 6 V Bias 7,8,9 RF OUT/V CC2 11 V CC1 Backside Paddle GND V-I Characteristics BeRex Evaluation Board Ic [ma] C -40C +85C Vc [V] Figure about the reference position of components 2
3 Typical Device Data S-parameters (V cc & V Bias = +5V, I cq =350mA, T a =25 C) (V cc & V Bias = +5V, I cq = 350mA, T a = 25 C, calibrated to device leads) S-Parameter Freq S11 S11 S21 S21 S12 S12 S22 S22 [GHz] [Mag] [Ang] [Mag] [Ang] [Mag] [Ang] [Mag] [Ang]
4 Application Circuit: 0.9 GHz Schematic Diagram BOM Marks PCB Diagram C uF Samsung C uF Samsung C pF Samsung C pF Samsung C N/A - C N/A - C pF Samsung C pF Samsung C N/A - C N/A - C N/A - C N/A - C N/A - C uF Samsung C pF Samsung C Ω Samsung C pF Samsung C pF Samsung L nH Taiyo Yuden L nH Coilcraft-HQ L pF Samsung L nH Taiyo Yuden R Ω Samsung R Ω Samsung R Ω Samsung Notice Below information is subject to change as conditions of the substrate. Reference Object Distance Input pin L3 5.7mm Input pin C16 3.5mm Output pin C17 2.3mm Output pin L4 3.6mm Output pin C18 5.8mm 4
5 Typical Performance 5
6 Typical Performance 3GPP WCDMA TM1 +64DPCH 1FA 3GPP LTE E-TM3.1 10MHz 3GPP WCDMA TM1 +64DPCH 4FA 3GPP LTE E-TM3.1 20MHz 6
7 Application Circuit: 1.8 GHz Schematic Diagram BOM Marks C uF Samsung C uF Samsung C pF Samsung C pF Samsung C N/A - C N/A - C pF Samsung C pF Samsung C N/A - C pF Samsung C N/A - C N/A - C N/A - C uF Samsung C pF Samsung C pF Samsung C pF Samsung L nH Taiyo Yuden L nH Coilcraft-HQ L nH Taiyo Yuden R Ω Samsung R Ω Samsung R Ω Samsung PCB Diagram Notice Below information is subject to change as conditions of the substrate. Reference Object Distance Input pin L3 5.4mm Input pin C16 3.5mm Output pin C17 4.1mm Pin 5 C10 3.1mm 1. We recommend to adjust capacitance of C10, when balance for multicarrier response of LTE20MHz is broken. 7
8 Typical Performance 8
9 Typical Performance 3GPP WCDMA TM1 +64DPCH 1FA 3GPP LTE E-TM3.1 10MHz 3GPP WCDMA TM1 +64DPCH 4FA 3GPP LTE E-TM3.1 20MHz 9
10 Application Circuit: 1.9 GHz Schematic Diagram BOM Marks C uF Samsung C uF Samsung C pF Samsung C pF Samsung C N/A - C N/A - C pF Samsung C pF Samsung C N/A - C pF Samsung C N/A - C N/A - C N/A - C uF Samsung C pF Samsung C pF Samsung C pF Samsung L nH Taiyo Yuden L nH Coilcraft-HQ L nH Taiyo Yuden R Ω Samsung R Ω Samsung R Ω Samsung PCB Diagram Notice Below information is subject to change as conditions of the substrate. Reference Object Distance Input pin L3 7.3mm Input pin C16 3.5mm Output pin C17 3.7mm Pin 5 C10 3.1mm 1. We recommend to adjust capacitance of C10, when balance for multicarrier response of LTE20MHz is broken. 10
11 Typical Performance 11
12 Typical Performance 3GPP WCDMA TM1 +64DPCH 1FA 3GPP LTE E-TM3.1 10MHz 3GPP WCDMA TM1 +64DPCH 4FA 3GPP LTE E-TM3.1 20MHz 12
13 Application Circuit: 2.14 GHz Schematic Diagram BOM Marks C uF Samsung C uF Samsung C N/A C pF Samsung C N/A - C N/A - C pF Samsung C pF Samsung C N/A - C pF Samsung C N/A - C N/A - C N/A - C uF Samsung C pF Samsung C pF Samsung C pF Samsung L nH Taiyo Yuden L nH Coilcraft-HQ L nH Taiyo Yuden R Ω Samsung R Ω Samsung R Ω Samsung PCB Diagram Notice Below information is subject to change as conditions of the substrate. Reference Object Distance Input pin L3 5.3mm Input pin C16 3.5mm Output pin C17 3.5mm Pin 5 C10 3.1mm 1. We recommend to adjust capacitance of C10, when balance for multicarrier response of LTE20MHz is broken. 13
14 Typical Performance 14
15 Typical Performance 3GPP WCDMA TM1 +64DPCH 1FA 3GPP LTE E-TM3.1 10MHz 3GPP WCDMA TM1 +64DPCH 4FA 3GPP LTE E-TM3.1 20MHz 15
16 Application Circuit: 2.65 GHz Schematic Diagram BOM Marks C uF Samsung C uF Samsung C N/A C pF Samsung C N/A - C N/A - C pF Samsung C pF Samsung C N/A - C pF Samsung C N/A - C N/A - C N/A - C uF Samsung C pF Samsung C pF Samsung C pF Samsung L nH Taiyo Yuden L nH Coilcraft-HQ L nH Taiyo Yuden R Ω Samsung R Ω Samsung R Ω Samsung PCB Diagram Notice Below information is subject to change as conditions of the substrate. Reference Object Distance Input pin L3 7.0mm Input pin C16 3.5mm Output pin C17 2.6mm Pin 5 C10 3.1mm 16
17 Typical Performance 17
18 Typical Performance 3GPP WCDMA TM1 +64DPCH 1FA 3GPP LTE E-TM3.1 10MHz 3GPP WCDMA TM1 +64DPCH 4FA 3GPP LTE E-TM3.1 20MHz 18
19 Typical Performance (Pout vs Icc) 19
20 Package Outline Dimension 20
21 Suggested PCB Land Pattern and PAD Layout Notes 1. Use 1 oz. copper minimum for top and bottom layer metal. 2. A heatsink underneath the area of the PCB for the mounted device is required for proper thermal operation. 3. Ground / thermal vias are critical for the proper performance of this device. Package Marking YY = Year, WW = Working Week, XX = Wafer No. 21
22 Tape & Reel QFN 3x3 Packaging information : Tape width(mm) : 12 Reel Size (inches) : 7 Device Cavity Pitch(mm) : 8 Devices Per Reel : 1000 Lead plating finish 100% Tin Matte finish (All BeRex products undergoes a 1 hour, 150 degree C, Anneal bake to eliminate thin whisker growth concerns.) 22
23 MSL / ESD Rating ESD Rating: Value: Test: Standard: Class 1C Passes 1000V to < 2000 V Human Body Model (HBM) JEDEC Standard JESD22-A114B ESD Rating: Value: Test: Standard: Class C3 Passes >1000V Charged Device Model (CDM) JEDEC Standard JESD22-C101F MSL Rating: Standard: Level 1 at +260 C convection reflow JEDEC Standard J-STD-020 NATO CAGE code: 2 N 9 6 F NOTICE BeRex Corporation reserves the right to make changes of product specification or to discontinue product at any time without notice. 23
Typical Performance 1. WCDMA 4FA_ACLR dbm LTE20M ACLR dbm
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