KC705 Ethernet Design Creation October 2012

Transcription

1 KC705 Ethernet Design Creation October 2012 XTP147

2 Revision History Date Version Description 10/23/ Regenerated for /25/ Regenerated for Added AR /08/ Regenerated for /18/ Initial version for Applied AR Copyright 2012 Xilinx, Inc. All Rights Reserved. XILINX, the Xilinx logo, the Brand Window and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. NOTICE OF DISCLAIMER: The information disclosed to you hereunder (the Information ) is provided AS-IS with no warranty of any kind, express or implied. Xilinx does not assume any liability arising from your use of the Information. You are responsible for obtaining any rights you may require for your use of this Information. Xilinx reserves the right to make changes, at any time, to the Information without notice and at its sole discretion. Xilinx assumes no obligation to correct any errors contained in the Information or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE INFORMATION, INCLUDING ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY RIGHTS.

3 Note: This presentation applies to the KC705 Overview KC705 Board KC705 Setup Generate RGMII Ethernet Example Design Modifications to Example Design Compile Example Design Run RGMII Ethernet Example Design Run SGMII Ethernet Example Design References

4 Note: Presentation applies to the KC705 Kintex-7 Ethernet Capability KC705 Supports MII, GMII, RGMII, and SGMII Capability RGMII demonstrated in this tutorial Board TX to Host LogiCORE Ethernet Example Design RDF0164.zip Available through LogiCORE IP Tri-Mode Ethernet MAC See UG777 for details

5 Xilinx KC705 Board

6 Note: Presentation applies to the KC705 ISE Software Requirement Xilinx ISE 14.3 software

7 ISE Software Requirements IP licenses are needed to compile the design in this tutorial: LogiCORE, Ethernet AVB Endpoint, Evaluation License LogiCORE, Tri-Mode Ethernet MAC, Evaluation License LogiCORE, Tri-Mode Ethernet Media Access Controller, Evaluation License Available free of charge at

8 Note: Presentation applies to the KC705 ChipScope Pro Software Requirement Xilinx ChipScope Pro 14.3 software

9 Note: Presentation applies to the KC705 ChipScope Pro Software Requirement Wireshark Protocol Analyzer available at

10 Note: Presentation applies to the KC705 Generate Ethernet Example Design Open the CORE Generator Start All Programs Xilinx Design Tools ISE Design Suite 14.3 ISE Design Tools 32-bit Tools CORE Generator Create a new project; select File New Project

11 Note: Presentation applies to the KC705 Generate Ethernet Example Design Create a project in a new directory named: kc705_ethernet Select Part Set the Part (as shipped on the KC705): Family: Kintex7 Device: xc7k325t Package: ffg900 Speed Grade: -2 Select Generation

12 Note: Presentation applies to the KC705 Generate Ethernet Example Design Under Generation Set the Design Entry to Verilog Click OK

13 Note: Presentation applies to the KC705 Generate Ethernet Example Design Under Communications and Networking Ethernet, right click on Tri Mode Ethernet MAC, v5.4 Select Customize and Generate

14 Note: Presentation applies to the KC705 Generate Ethernet Example Design Make the following settings Set Component Name: kc705_ethernet_rgmii PHY Interface: RGMII De-select Half Duplex, Enable AVB, Frame Filter, and Statistics Counters Click Generate

15 Note: Presentation applies to the KC705 Generate Ethernet Example Design After the Ethernet core finishes generating, click Close on the Datasheet window

16 Note: Presentation applies to the KC705 Generate Ethernet Example Design Ethernet design appears in Project IP

17 Modify Ethernet Design As per AR45527, the design must be modified Open the file: <design path>/<design name>/example_design/ kc705_ethernet_rgmii_example_design.ucf Set the speed grade to -2

18 Note: Presentation applies to the KC705 Compile Example Design Start a ISE Design Suite Command Prompt and enter these commands: cd C:\kc705_ethernet\kc705_ethernet_rgmii\implement implement.bat

19 KC705 Setup Connect a USB Type-A to Micro-B cable to the USB JTAG (Digilent) connector on the KC705 board Connect this cable to your PC Power on the KC705 board

20 KC705 Setup Connect a Ethernet cable to the KC705 Connect this cable to your PC

21 KC705 Setup Set S11 to 1100 (1 = on, Position 1 Position 4) This selects Gigabit Ethernet, with the packet generator off

22 Note: Presentation applies to the KC705 Run Ethernet Example Design Open ChipScope Pro and select JTAG Chain Digilent USB Cable (1) Verify 30 MHz operation and click OK (2) 1 2

23 Note: Presentation applies to the KC705 Run Ethernet Example Design After the design compiles, open ChipScope Pro Analyzer Click OK (1) 1

24 Note: Presentation applies to the KC705 Run Ethernet Example Design Select Device DEV:0 MyDevice0 (XC7K325T) Configure Select <Design Path>\kc705_ethernet_rgmii\ implement\results\routed.bit

25 Run Ethernet Example Design Open Wireshark and select Capture Options

26 Note: Presentation applies to the KC705 Run Ethernet Example Design Select your PC s Gigabit Ethernet connection; click on Capture filter

27 Note: Presentation applies to the KC705 Run Ethernet Example Design Type in the following filter and click OK: Ethernet address da:01:02:03:04:05 ether host da:01:02:03:04:05

28 Note: Presentation applies to the KC705 Run Ethernet Example Design Click Start

29 Note: Presentation applies to the KC705 Run Ethernet Example Design Open your Network Connections control panel Right click on the Gigabit network connection and select Status The status dialog will show you the speed and number of packets

30 Run Ethernet Example Design Wireshark should show no packets

31 Run Ethernet Example Design Set S11 to 1110 (1 = on, Position 1 Position 4) for a moment to run the packet generator Set S11 back to 1100

32 Note: Presentation applies to the KC705 Run Ethernet Example Design The status dialog shows a few packets received

33 Run Ethernet Example Design Wireshark captures and displays the actual packets

34 Run Ethernet Example Design Select a packet in the upper panel

35 Run Ethernet Example Design Use the arrow keys to move to the next packet

36 Run Ethernet Example Design Viewing several packets, you can see a simple changing pattern

37 Run KC705 SGMII Ethernet Design

38 Note: Presentation applies to the KC705 Download KC705 SGMII Ethernet Design Open the KC705 Ethernet Design Files (14.3 C) Available through Extract the file, kc705_sgmii.bit only to C:\kc705_ethernet

39 Note: Presentation applies to the KC705 Xilinx KC705 Board For SGMII, J29 and J30 must be connected to pins 2-3

40 KC705 Setup Set S11 to 0000 (1 = on, Position 1 Position 4) This turns the packet generator off

41 Note: Presentation applies to the KC705 Run Ethernet Example Design Select Device DEV:0 MyDevice0 (XC7K325T) Configure Select <Design Path>\ready_for_download\kc705_sgmii.bit

42 Run Ethernet Example Design Open Wireshark and select Capture Options

43 Run Ethernet Example Design Select your PC s Gigabit Ethernet connection; click on Capture filter

44 Note: Presentation applies to the KC705 Run Ethernet Example Design Type in the following filter and click OK: Ethernet address da:01:02:03:04:05 ether host da:01:02:03:04:05

45 Run Ethernet Example Design Click Start

46 Note: Ethernet connection was reset to clear previous packets Run Ethernet Example Design Open your Network Connections control panel Right click on the Gigabit network connection and select Status The status dialog will show you the speed and number of packets

47 Run Ethernet Example Design Wireshark should show no packets

48 Run Ethernet Example Design Set S11 to 0010 (1 = on, Position 1 Position 4) for a moment to run the packet generator Set S11 back to 0000

49 Note: Presentation applies to the KC705 Run Ethernet Example Design The status dialog shows a few packets received

50 Run Ethernet Example Design Wireshark captures and displays the actual packets

51 Run Ethernet Example Design Select a packet in the upper panel

52 Run Ethernet Example Design Use the arrow keys to move to the next packet

53 Run Ethernet Example Design Viewing several packets, you can see a simple changing pattern

54 References

55 References Tri-Mode Ethernet Media Access Controller Tri-Mode Ethernet MAC Product Overview Tri-Mode Ethernet MAC Data Sheet DS818 ds818_tri_mode_eth_mac.pdf LogiCORE IP Tri-Mode Ethernet MAC User Guide UG777 tri_mode_eth_mac/v5_3/ug777_tri_mode_eth_mac.pdf

56 Documentation

57 Documentation Kintex-7 Kintex-7 FPGA Family KC705 Documentation Kintex-7 FPGA KC705 Evaluation Kit KC705 Getting Started Guide ug883_k7_kc705_eval_kit.pdf KC705 User Guide ug810_kc705_eval_bd.pdf KC705 Reference Design User Guide ug845_ref_design.pdf