Graphical System Design:

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2 Graphical System Design: Bringing Embedded Design to the Masses in Science and Engineering Hugo A. Andrade Principal Architect, Architecture and Technology Group Zach Nelson Academic Field Engineering Manager Presented at CHESS Seminar, EECS UC Berkeley, Nov. 28, 2006

3 Today s Agenda Background Our approach to Developing Embedded Systems Technical Details of Tools Research Topics Current Activities at UC Berkeley 3

4 National Instruments 30 Year Leaders in Computer-Based Measurement and Automation 4000 Employees; 1,500 Engineers Corporate Headquarters in Austin, Texas Direct Operations in 40 Countries Over 600 Alliance Partners 7 Years Asia 21% Europe 31% Americas 48% 4

5 Widespread Adoption More than 25,000 companies in 90 countries >90% of Fortune 500 manufacturing companies No customer represents more than 3% of revenue 5

6 Diversity of Industries Telecom Automotive Semiconductors Electronics Computers ATE Military/Aerospace Advanced Research Petrochemical Food Processing Textiles 6

7 Delivering Complete System Solutions Hardware and Driver Software Application Software 8 Network

8 TV Today s Designs: Converging Complexity CD+RW Navigation Cellular Phone PC/WWW/ Automotive Telematics Games DVD+RW Satellite Car Alarm/Radio Remote Diagnostics AM/FM Stereo 9

9 Today s Challenges: The Traditional Approach Function Generator Communications Analyzer Programmable Switch Automotive Telematics Oscilloscope Pattern Generator Logic Analyzer Power Supply LCR Meter DMM Spectrum Analyzer 10

10 NI s Value Proposition Lower cost Higher performance Smaller size Flexible Easily upgraded User-defined Telematics Unit 11

11 Virtual Instrumentation The Software Is the Instrument Do for engineers what the spreadsheet did for financial analysts.

12 Leveraging Semiconductor Technology Accuracy (Bits) FlexDMM Precision Audio Mixed-Signal Suite (Digitizer, Generator, Digital) RF K 10K 100K 1M 10M 100M 1G 10G 100G Sampling Rate (S/s) Traditional Instruments NI Products, 2005 NI Products, 2006

13 Data Acquisition Architecture Signal Conditioning Data Conversion Timing/Triggering PCI Processing/Logic Application Connectivity Connectivity Connectivity Signal Conditioning Signal Conditioning Signal Conditioning ADC DAC Digital Data Back-End MITE Timing Engine (Timing, Triggering, Scanning) Counter/Timers Digital IO DAQ STC Driver Control Logic EU Scaling Alarms Analysis DSP Display Reporting Monitoring SC/SCXI E-Series DAQ DAQmx LabVIEW on Host Connectivity Connectivity Connectivity Signal Conditioning Signal Conditioning Signal Conditioning ADC DAC Digital Data Back-End MITE Timing Engine (Timing, Triggering, Scanning) Counter/Timers Digital IO DAQ STC

14 PXI Trigger Bus (8 TTL Triggers) System Controller System Timing Slot Peripheral Peripheral Peripheral PXI PXI Express Star Trigger 100 MHz Differential CLK SYNC MHz CLK SYNC Control Differential Star Triggers

15 Digital Signal Processing Bits per Channel Waveform Based Computation Image Processing Streaming Computation Audio Waveforms Audio Processing IF Processing Computations per Second

16 Multiple Control Disciplines Bits per Channel 2.4 Mbits Machine Vision 24 bits 16 bits 8 bits 1 bit Process Batch Vibration Monitoring Discrete Motion MEMS Control 1 Hz 1kHz 40 khz 1MHz Loop Rate PLC Performance PC Performance Desired: Single Software Environment

17 The Convergence of Design and Test Design Test System Specification Field Test Design & Simulation Calibration & Functional Test Rapid Prototyping System Test (HIL) Code Generation

18 The Expanding World of Virtual Instrumentation

19 Examples of Embedded Systems 21

20 Traditional Deployment Options Single-Board Computers PLCs Custom Designs 22

21 The Long Tail Vendor-defined solutions Reference designs Custom chips User-defined solutions 23

22 Examples of Embedded Systems 24

23 National Instruments Vision Evolved Virtual Instrumentation Embedded Systems Test system design RF Digital Distributed Real-time measurements Embedded monitoring Mechatronics HIL Industrial control RT/FPGA systems Next generation devices C code generation Growing Complexity in Embedded Systems 10X increase in application complexity 74% projects run late because of lack of productive software and hardware prototype tools Extremely fragmented market means incompatibility and considerable effort to maintain and to port applications - VDC Embedded Survey, Analog Devices User Study 26

24 National Instruments Vision Evolved Virtual Instrumentation Embedded Systems Test system design RF Digital Distributed Real-time measurements Embedded monitoring Mechatronics HIL Industrial control RT/FPGA systems Next generation devices C code generation Historically, engineers designed in a vacuum and shipped something six to 12 months later--then realized what was wrong with it. With an emphasis on prototyping, you bring it right back to the people you are designing it for to get their feedback. The ability to put something live out in the world is a key part of this process. George Kembel, Stanford University (Embedded.com) 27

25 National Instruments Vision Evolved Virtual Instrumentation Embedded Systems Test system design RF Digital Distributed Real-time measurements Embedded monitoring Mechatronics HIL Industrial control RT/FPGA systems Next generation devices C code generation Design Prototype Deploy 28

26 Graphical System Design Design Prototype Interactive Algorithm Design Control design Dynamic system simulation Digital filter design Advanced mathematics Tight I/O Integration I/O modules and drivers COTS FPGA hardware VHDL and C code integration Design validation tools Deploy Deployable Targets Rugged deployment platforms Distributed networking Human machine interfaces Custom Designs 53

27 Beneficiary The Domain Expert Design Non-embedded programming guru System-level engineer or scientist Prototype Technology pioneer, early adopter, visionary Deploy Anyone needing abstraction from some of the complexity of embedded programming Anyone needing easier, faster development process Anyone needing COTS to streamline development 54

28 Beneficiary Design Prototype UI (face of the product) and Application Software (algorithms) MPU, OS Buses Drivers I/O Hardware (A/D, D/A) Hardware-based custom algorithms and transducers 55 Deploy Traditional domain tasks Career embedded engineer

29 Beneficiary Design Prototype UI (face of the product) and Application Software (algorithms) MPU, PC, OS Buses Drivers I/O Hardware (A/D, D/A) Hardware-based custom algorithms and transducers 56 Deploy Bringing Embedded Design to the Masses in Science and Engineering GSD-empowered domain tasks

30 Design FPGAs RTOS Controllers Rugged PCs Custom HW Prototype 57 Deploy

31 Design Prototype Deploy Full compiled, graphical programming environment Target desktop, mobile, industrial, and embedded Thousands of out-of-the box mathematics and signal processing Seamless connectivity with millions of I/O devices 58

32 Design Tools Design Prototype Deploy One Environment Structural Dataflow - G LabVIEW Advanced Math and Analysis VIs Control Design Toolkit Simulation Module Digital Filter Design Toolkit State Diagram Toolkit.m (MathScript) 60

33 Prototyping Platforms Design Prototype Deploy I/O I/O I/O I/O I/O I/O I/O I/O Connectivit SignalCon y d. ADC Reconfigurable I/O, Programmable Hardware 61 Real-Time Controller

34 Deployment Options Prototyping Platforms PXI RIO Design Custom Designs Prototype LabVIEW Embedded Custom Designs Systems Shipped / Level of customizability 62 Deploy Hardware System Cost Custom Hardware Design Process LabVIEW Real-Time LabVIEW FPGA RIO Components

35 Deployment Options CompactRIO Real-Time Processor Reconfigurable FPGA Industrial I/O Modules Design Prototype Deploy Industrial I/O Modules with built-in signal conditioning for direct connection to sensors/actuators Reconfigurable FPGA for high-speed and custom I/O timing, triggering, control Real-Time Processor for deterministic, stand-alone operation and advanced analysis 63

36 Deployment Options Design Prototype Custom 32-bit Processors LabVIEW Embedded Development Module Port LabVIEW to: Any 32-bit architecture Any embedded OS 3 rd party toolchain 3 rd party OS 65 Deploy

37 NI Graphical System Design and EWB 66

38 Graphical System Design Applications Custom Control/Sensors Algorithm Development Breadth of I/O On-line Vibration Monitoring and Control Electronics Rapid Prototyping Biomedical Machine Deployment 67

39 Graphical System Design (GSD) Custom Designs 76

40 What is LabVIEW? Front Panel Block Diagram 77

41 What is LabVIEW? LabVIEW 1.0 For Macintosh LabVIEW For Sun, Windows 1992 LabVIEW 2.0 Compiled Language 1993 LabVIEW 4.0 Professional Development LabVIEW 5.0 Undo! Real-Time LabVIEW 6i Internet Ready 2000 LabVIEW Embedded and DSP LabVIEW 8.20 Anniversary Edition LabVIEW 8 Distributed Intelligence LabVIEW 3.0 Multiplatform LabVIEW 7 Express PDA and FPGA Represents 20 Years of Innovation 78

42 LabVIEW and G "G" programming language Dataflow language implemented in the National Instruments LabVIEW Inherently parallel language Synthesizable language Direct compilation to software binaries on host processors To FPGAs (via VHDL) Embedded Processors (via C) 79

43 The G Language Model Homogenous dataflow language Run-time scheduling Structured case (switch, select) and loops Structured dataflow Turing complete 80

44 G Language (continued) Homogeneous advantages Bounded queues Although each element can be arbitrarily large Composable Multidimensional data types Feedback only built into the loop construct Occurrences Supports modular software engineering constructs and intellectual property protection 81

45 What is LabVIEW? Multiple Programming Models Distributed Intelligence 82

46 Mixed Models of Computation for an Application Simulation Diagram Graphical Dataflow 83 State Diagram Graphical User Interface

47 Models of Computation Scorecard Novice Typical Expert Expertise Required Dataflow: LabVIEW graphical programming Communicating Sequential Processes: LabVIEW synchronization elements Process Networks: LabVIEW structured dataflow Synchronous Data Flow: statically scheduled, stream-based communication Discrete Event: LabVIEW event structure and timed loop Synchronous/Reactive: LabVIEW FPGA, Single-cycle loop Time Driven: LabVIEW timed loop Timed Multitasking: priority-driven multitasking, deterministic communication Continuous Time: LabVIEW Simulation Node 91

48 Graphical System Design A platform based-approach Desktop RTOS FPGA Graphical Platform DSP MPU 93

49 Incorporating Time Timing and IO Clock synchronization IEEE-1588 Time-triggered architecture Deterministic Communication Programming with time 95

50 Timed Loop in LabVIEW Allows multi-rate time-critical loops Microsecond timing on LabVIEW Real-time Integrated with data acquisition timing 96

51 Trace Tool Output for Multi-Rate Example 97

52 Other Timing Structures in LabVIEW Single-Cycle Timed Loop (LabVIEW FPGA) Simulation Structure (LabVIEW Simulation Module for simulation and real-time control) 98

53 FPGA, Real-Time and Host Communication Windows PC LabVIEW Real-Time System Reconfigurable FPGA Windows User Interface Host Network Communication Normal Priority Inter-Thread Communication Time-Critical Interface FPGA Interface LabVIEW FPGA Enterprise Data Storage LabVIEW for Windows LabVIEW Real-Time LabVIEW FPGA 99

54 LabVIEW FPGA LabVIEW diagrams targeted to VHDL for FPGAs Parallel Tasks for Acquisition and Analysis Parallelism is inherent in LabVIEW block diagram approach Parallel tasks are clocked through the FPGA simultaneously Flexible I/O Logic to modify DIO lines to counters, encoders, PWM Resource synchronization and timing Precise timing of onboard resources including analog I/O, digital I/O 100

55 FPGA Tasks Reconfigurable I/O, 160 digital lines: 80 quad encoders (A, B) 40 quad encoders (A,B), 40 PWM outputs (mag, dir) 30 quad encoders, 30 PWM outputs, 40 limits Custom startup/shutdown PID, discrete-logic control Signal processing Health monitoring and safety Communication protocols (SPI, I 2 C, MIL-STD-1553 ) 101

56 FPGA-Based I/O Applications Clocks PWM Built-in IP Processing Blocks Counters Custom Counters Multiple Scan Rates Custom Analog Triggering Custom Analog I/O Custom Timing and Synchronization 102

57 Evolution of LabVIEW Backend Technologies Intermediate Code Compiler Hardware Target None (Machine Code) LabVIEW Real-Time Wintel PowerPC VHDL OEM Synthesis PAR FPGA None (Object Library) LabVIEW DSP DSP C Any Any 32-bit MPU 103

58 LabVIEW FPGA Targets PCI R Series Intelligent DAQ PXI R Series Intelligent DAQ PXI Timing & Synchronization Compact Vision System 104 CompactRIO

59 Current Activities at UC Berkeley Partner Membership in CHESS National Instruments Embedded Systems Lab 105

60 Partner Membership in CHESS Common Goals between CHESS and NI Common Use Cases Targeting the Domain Expert Advancement actor-oriented programming environments Time and concurrency as first class programming constructs Complementary approaches Research (UCB) and Products (NI) Software and Hardware (Both) Collaborative Research Opportunities

61 LabVIEW Constructs Review Native LabVIEW representations of system functions Models of Computations data flow, continuous time, state chart I/O waveform, single-point Timing periodic, event-based, time-triggered Programmable hardware elements networks, buses Partitioning hardware-independent view of system 107

62 National Instruments Research Timing: synchronous and asynchronous events, minimum and maximum time intervals, latency, skew, jitter, on different timescales Measurement system designer environment Single communication design platform Additional models of computation I/O Models System Representations Embedded Processing Wireless sensors 108

63 Future Research Agenda Models of Computation Programming with concurrency and time Programming heterogeneous multi-core architectures Nonlinear, adaptive and hybrid control applications Vision sensing for control applications Distributed control Wireless networks Verification and validation FPGA-based I/O 109

64 National Instruments Embedded Systems Lab Designate Space in Cory Hall (2 nd floor) Furnished PXI Lab Stations NI Software Access (in Software Warehouse) 110

65 Software/DVD Organization 111

66 UC Berkeley Student Install Option 112

67 Questions