Using COTS at the LHC: Building on Space Experience
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1 Using COTS at the LHC: Building on Space Experience James D. Kinnison David R. Roth The Johns Hopkins University Applied Physics Laboratory Presentation Outline Introductory Remarks Environment Comparison Basic Effects in COTS COTS Issues Hardness Assurance Mitigation Strategies jdk 9/13/99 2
2 What is COTS? Competing Definitions x Anything you can buy from a catalog x If it has a part number and a data sheet, it s COTS x No special requirements or added specifications x Systems and components not specifically designed for mil/aero applications x Emphasizes high volume manufacturing and commercial electronics or automotive use x COTS are those things we couldn t use before jdk 9/13/99 3 COTS In This Talk COTS are: x Standard items available from a manufacturer x Not designed for radiation environment, but may have some specified tolerance x Usually black boxes to the user x Not tweaked or modified for the user jdk 9/13/99 4 Space Experience Marketplace Changes x Spacecraft are becoming commodities x Emphasis is reducing cost x More science x Stimulate space business ventures x Cost savings from: x Cheaper vehicles x Smaller, more capable systems x Simpler operations jdk 9/13/99 5
3 Space Experience Dilemma: x Demand for spacecraft components is flat x Consumer electronics market offers higher profit per man-year of labor x Result is fewer devices available which are designed for the space market Yet the need for high performance systems in space is higher than ever! jdk 9/13/99 6 Space Experience COTS Cases x Choice between hard part and related unhardened commercial device x Survivability vs. performance x COTS sometimes provide mission-enabling performance x Usually no radiation tolerant alternative x COTS vs. equivalent mil/aero part x Traditional hard military part often cheaper when qualification costs are considered jdk 9/13/99 7 Space Experience Example: Microprocessors in space x COTS processors usually 3 generations or so ahead of rad-hard mil-aero technology x Clones of existing commercial processors usually aren t exact copies x Advanced commercial tools usually not available for hardened technology x SEE mitigation for COTS is complex x EDAC, watchdog circuits, triple voting, etc. jdk 9/13/99 8
4 Space Experience Risk Elimination x No risk is acceptable x Usually managed at the lowest level x Example: environmental risk in ICs x Often driven to proven technology x Demands technology demonstration flights x Can be mission or capability limiting x Upside - systems generally work jdk 9/13/99 9 Space Experience Risk Management x Mission must not fail - all else is negotiable x Low levels may be risky, but risks are mitigated at next higher level x Often provides mission enabling technology x Reality: not a new idea x We can never eliminate risk, and so these ideas have been used in every piece of engineering jdk 9/13/99 10 Space Experience Risk Management Methodology x State the problem and proposed solutions x Quantify the risk, if possible x Know the impact of the risk x Decide if the risk is acceptable x Mitigate? x Eliminate? x Implement the optimum solution jdk 9/13/99 11
5 LHC Experience COTS Use x Many of the same problems x Small market x Specialized needs, especially radiation x Need for high performance x Unique Issues: x Many different independent groups x Wide variety of parts and subsystems x No equivalent of a prime contractor? jdk 9/13/99 12 Environment Comparison Space Radiation x Charged particles x TID, SEE, Displacement Aircraft Radiation x Neutrons x Neutron SEE LHC Radiation x Neutrons, gamma x TID, Neutron SEE, Displacement Physical Char. x -55 to 125 C x Launch vibration Physical Char. x Controlled, 0-70C x Some vibration Physical Char. x Controlled, 0-70 C x No Vibration Repair/Upgrade x Usually, none Repair/Upgrade x Cost driven Repair/Upgrade x Undesirable jdk 9/13/99 13 LHC Radiation Total Ionizing Dose x 10 krad - 10 Mrad, depending on location x Mostly gamma dose Neutron Exposure x n/cm 2 x Single event effects x Displacement damage jdk 9/13/99 14
6 Basic Mechanisms and Macroscopic Effects Total Dose in COTS Pre-Rad Post-Rad I Pre-Rad. Post Rad. Vth jdk 9/13/99 16 Total Dose in COTS ELDRS Effect x Hardness is dose rate dependent x Lateral PNP transistors are more sensitive than others at low dose rate x At space rates, lateral PNPs are softer than at test chamber rates x Temperature confounds the effect x Serious implications for test fidelity in space applications jdk 9/13/99 17
7 Total Dose in COTS Threshold Voltage (V) n-channel p-channel Radiation Dose (rad) jdk 9/13/99 18 Total Dose in COTS Microscopic Effects x Slower gate switching speeds x Increased leakage currents x Threshold voltage shifts jdk 9/13/99 19 Total Dose in COTS Macroscopic Effects x Analog and Mixed-Signal Parts x Supply current, leakage currents increase x Offset voltage increases x Gain decreases x Converter non-linearity increases x PSRR, CMRR increases x Reference voltages change jdk 9/13/99 20
8 Total Dose in COTS Macroscopic Effects x Digital Parts x Supply currents, input leakage increase x Timing slows down x DRAM data retention time decreases x Charge pumps fail x Transistor threshold voltages shift, so logic gates get stuck in one state jdk 9/13/99 21 Total Dose in COTS Macroscopic Effects x Digital CMOS x Typically 1-50 krads x Analog MOS x 1-30 krads (depending on application) x Bipolar x krads x ELDRS effect may not be an LHC issue jdk 9/13/99 22 Total Dose in COTS Macroscopic Effects x Boards and Systems x Strongly dependent on board design x Often observe increased supply current x In many cases, board works until it just quits x May be possible to find reduced operation that continues to work at higher doses. jdk 9/13/99 23
9 Displacement in COTS Frenkel Pair vacancy interstitial Pre Rad Post Rad jdk 9/13/99 24 Displacement in COTS Microscopic Effects x Neutron interacts with silicon nucleus x Dislocates atom x Formation of a Frenkel Pair which can be thought of as a recombination center x Vacancy and interstitial cause unwanted quantum states in band gap x Changes carrier flow jdk 9/13/99 25 Displacement in COTS Macroscopic Effects x Mostly an issue for photonic or optoelectronics x Lasers, LEDs x Opto-isolators, including DC-DC converters x CCDs, similar detectors x Bipolar electronics x Decreases output power of light sources x Reduces charge collection in receivers x Increases leakage (or dark) current jdk 9/13/99 26
10 Displacement in COTS Damage Equivalence x Test data usually taken with mono-energetic, unidirectional beams x We need a way to convert a spectrum into a single equivalent fluence of a standard particle < e ³ K(E)<(E)dE jdk 9/13/99 27 Displacement in COTS Damage Equivalence Factors in Si Omnidirectional Proton to Unidirection 10 MeV Proton mils 1 mil 2 3 mil 6 mil 12 mil 20 mil Proton Energy (MeV) jdk 9/13/99 28 Displacement in COTS Neutron Irradiation of LEDs ma 30 ma 40 ma OutputPow er(pw ) MeV Neutron Fluence (x10 10 cm -2 ) jdk 9/13/99 29
11 SEE in COTS Microscopic Effects x Neutron interacts with silicon nucleus x Charged secondaries deposit charge x Collected charge pulse causes effect x Fundamentally a statistical process + - n 0 jdk 9/13/99 30 SEE in COTS Macroscopic Effects x Destructive Effects x Latchup, gate rupture, burnout x Neutrons do not generally cause these x Non-Destructive Effects x Upset, functional interrupt, transient x Most likely neutron effects jdk 9/13/99 31 SEE in COTS Single Event Upset x Change in state of a memory element x System-level manifestations depend on application Single Event Functional Interrupt x Upset places device in an ill-defined condition x Sometimes requires power cycle to clear jdk 9/13/99 32
12 SEE in COTS Example: DRAM x Upset Modes x Cell upset x Address error x Data latch error x Functional Interrupt Modes x Spare memory area x Built-in test mode jdk 9/13/99 33 SEE in COTS Example: Microprocessor x Upset Modes x Data error x Program error x Functional Interrupt Modes x Built-in self test x Invalid instruction x Bad memory fetch jdk 9/13/99 34 SEE in COTS Example: Field Programmable Gate Array x Non-SRAM Device x Dielectric rupture x Data errors x SRAM-Based Device x Data errors x Inadvertent reprogramming x Functional interrupt in state machine jdk 9/13/99 35
13 SEE in COTS Boards and Systems x Several (sometimes many) devices may be sensitive to effects x Unpredictable results x Depends on type of error and system design x Very little visibility to diagnose problems x Can t depend on a system to completely police itself jdk 9/13/99 36 COTS-Specific Issues COTS Issues Lot-to-lot Variation x Parameters which determine total dose hardness aren t closely controlled by manufacturers x Hardness can vary widely across wafers and manufacturing runs x Example: LM108 OpAmp - tested devices hard to as little as 5 krads and as hard as 80 krads x SEE sensitivity determined by architecture, and so less variable across lots jdk 9/13/99 38
14 COTS Issues Architecture Changes x SEE susceptibility determined by architecture x Manufacturers revise die without warning x Usually invalidates past SEE testing x Related issue - product obsolesence x By the time you find a product you can use, the manufacturer has replaced it with something you can t use! jdk 9/13/99 39 COTS Issues Boards and Systems x Manufacturers change components frequently x Cheaper product x Performance improvement x Obsolesence x Especially difficult with hybrids x No part numbers to check! jdk 9/13/99 40 Testing and Procurement
15 Hardness Assurance Steps To Hardness Assurance x Determine requirements x Mostly determined by position x Test components of interest x Mitigate or circumvent damage effects x Manage the supply of chosen parts jdk 9/13/99 42 Total Dose Effects Total Dose Test Methodology Biased 25 C Pass Elec? No Reject Parts No Yes No Irr. To Spec rad/s Pass Elec? Yes Irr. 50% Over rad/s Biased Anneal C Pass Elec? Yes Parts OK jdk 9/13/99 43 ELDRS Effect ELDRS Effect Test Methodology Start No Review Data ELDRS? Yes Yes 1) Test at 10 mrad/s with margin of 2 or 2) test at 10 rad/s, 100C within margin of 3 Initial Test No 1) Baseline high rate at room temp 2) Compare to low rate or elev. temp ELDRS? Yes Accept Risk? No 1) Determine max low dose rate enhancement 2) Elevated temperature irradiation and anneal?? TM1019 or other Acceptance Test jdk 9/13/99 44
16 SEE Effects Event Rate Requirements x From performance requirements x Highly application dependent x Determination process is iterative x Requirements are given at system level x More sensitive devices can be used with mitigation if overall rate meets requirement jdk 9/13/99 45 SEE Effects Testing Issues x Purpose: to measure the event cross-section and study external effects x Characterization of what happens to a device is necessary for mitigation design x Quality of test impacts uncertainty x Dead time, beam measurement, etc. x Number of events detected x Fidelity of test jdk 9/13/99 46 Displacement Effects Testing Issues x Data similar to TID Testing x Cumulative changes in device behavior as a function of fluence x Execution similar to SEE testing x Beam issues of primary concern x Should simulate application as closely as possible jdk 9/13/99 47
17 Procurement Issues Common Buys x Frequently Used Parts x Saves on qualification costs x Requires high degree of co-ordination x Need a centralized distribution system x May not help for systems jdk 9/13/99 48 Procurement Issues Data Sharing x Database entries are often incomplete, making it difficult to apply results x Record as much info about the test as possible x Agree beforehand on how to do tests x TID x Bias circuit, dose rate, anneal times x SEE x Circuit, full cross-section curve, external effects jdk 9/13/99 49 Mitigation Strategies
18 Total Dose Mitigation Three Schemes x Reduce the dose x External shielding x Advanced packaging x Reduce the damage x Cold sparing x Intentional annealing x Accommodate the effects x Design for end-of-life behavior jdk 9/13/99 51 Displacement Mitigation Two Schemes x Reduce the fluence x Shielding x Advanced packaging x Accommodate the effects x Design for end-of-life behavior jdk 9/13/99 52 Displacement in COTS Example: DC-DC Converters x Often use optocouplers for isolation x Mitigation x Use least sensitive components x Shielding or advanced packaging to reduce fluence x Accommodate power MOSFET threshold voltage shifts in design jdk 9/13/99 53
19 SEE Mitigation EDAC Method Parity CRC Hamming Code Reed-Solomon Convolutional Encoding Overlying Protocol Capability Single bit detect Any errors in given structure Single bit correct, double bit detect Errors within symbol Burst noise in data stream System designed to correct errors (i.e., data packet retransmission jdk 9/13/99 54 SEE Mitigation Method Watchdog Timer Redundancy Lockstep Voting Repetition Scrubbing Description If not reset within some time interval, reset system Equivalent systems operate on data. Two devices are clocked simultaneously. Three or more device provide function, which must agree System provides same data more than once Rewrite critical memory locations at regular intervals jdk 9/13/99 55 Resources
20 Resources Device Data JPL nppp.jpl.nasa.gov TID/SEE GSFC flick.gsfc.nasa.gov SEE ERRIC erric.dasiac.com Variety ESA TID/SEE NRL redex.nrl.navy.mil TID/SEE Data Workshop IEEE NSREC Variety jdk 9/13/99 57 Resources General Info x IEEE Transactions on Nuclear Science x Journal of Spacecraft and Rockets x Conferences/Seminars NSREC NSS RADECS Space Parts Working Group GOMAC/HEART jdk 9/13/99 58
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