Page 1. Chapter 1: The General Purpose Machine. Looking Ahead Chapter 5 Important advanced topics in CPU design

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1 1-1 Chapter 1 The General Purpose Machine Chapter 1: The General Purpose Machine Topics 1.1 The General Purpose Machine 1.2 The User s View 1.3 The Machine/Assembly Language Programmer s View 1.4 The Computer Architect s View 1.5 The Computer ystem Logic Designer s View 1.6 Historical Perspective 1.7 Trends and Research 1.8 Approach of the Text 1-2 Chapter 1 The General Purpose Machine Looking Ahead Chapter 2 Explores the nature of machines and machine languages Relationship of machines and languages Generic -bit imple RIC Computer RC Register transfer notation RTN The main function of the is the Register Transfer RTN provides a formal specification of machine structure and function Maps directly to hardware RTN and RC will be used for examples in subsequent chapters Provides a general discussion of addressing modes Presents a view of logic design aimed at implementing and register transfers 1-3 Chapter 1 The General Purpose Machine Looking Ahead Chapter 4 This keystone chapter describes processor design at the logic gate level Describes the connection between the instruction set and the hardware Develops alternative 1-, 2-, and 3-bus designs of RC at the gate level RTN provides description of structure and function at low and high levels hows how to design the control unit that makes it all run Describes two additional machine features: implementation of exceptions (interrupts) machine reset capability 1-4 Chapter 1 The General Purpose Machine Looking Ahead Chapter 5 Important advanced topics in design General discussion of pipelining having more than one instruction executing simultaneously requirements on the instruction set how instruction classes influence design pipeline hazards: detection & management Design of a pipelined version of RC Instruction-level parallelism issuing more than one instruction simultaneously uperscalar and VLIW designs Microcoding as a way to implement control 1-5 Chapter 1 The General Purpose Machine Looking Ahead Chapter 6 The arithmetic and logic unit: ALU 1-6 Chapter 1 The General Purpose Machine Looking Ahead Chapter 7 The subsystem of the computer Impact on system performance Digital number systems and arithmetic in an arbitrary radix number systems and radix conversion integer add, subtract, multiply, and divide Time/space trade-offs: fast parallel arithmetic Floating point representations and operations Branching and the ALU Logic operations ALU hardware design tructure of 1-bit RAM and ROM cells RAM chips, boards, and modules Concept of a hierarchy nature of different levels interaction of adjacent levels Virtual Cache design: matching cache & main as a complete system Page 1

2 1-7 Chapter 1 The General Purpose Machine Looking Ahead Chapter 8 Computer input and output: I/O 1-8 Chapter 1 The General Purpose Machine Looking Ahead Chapter 9 tructure, function, and performance of peripheral devices Kinds of system buses, signals and timing erial and parallel s Interrupts and the I/O system Direct access DMA DMA, interrupts, and the I/O system The hardware/software : device drivers Disk drives Organization tatic and dynamic properties Video display terminals -mapped video Printers Mouse and keyboard Interfacing to the analog world 1-9 Chapter 1 The General Purpose Machine Fig 1.1 The User s View of a Computer 1-1 Chapter 1 The General Purpose Machine Machine/Assembly Language Programmer s View 1.1 Looking Ahead` The intellectual synthesis that comes from viewing a computer system from each the three perspectives leads to an efficient, effective computer design. It is when you understand how a machine functions at the gate, IA, and the system architecture level that you fully understand the machine. Whether your career objective is in Computer cience, Computer Engineering, or some other aspect of computers it is our sincerest hope that this book will serve you by providing that understanding. The user sees software, speed, storage, and peripheral device functionality. Machine language: et of fundamental the machine can execute Expressed as a pattern of 1 s and s Assembly language: Alphanumeric equivalent of machine language Mnemonics more human-oriented than 1 s and s Assembler: Computer program that transliterates (one-to-one mapping) assembly to machine language Computer s native language is machine/assembly language Programmer, as used in this course, means machine/assembly language programmer 1-11 Chapter 1 The General Purpose Machine Fig 1.2 The Fetch-Execute Process 1-12 Chapter 1 The General Purpose Machine Programmer s Model: Instruction et Architecture (IA) MC68 31 Various IR Control signals Main Instruction set: the collection of all machine operations. Programmer sees set of, along with the machine resources manipulated by them. IA includes Instruction set,, and Programmer-accessible of the system. There may be temporary or scratch-pad used to implement some function is not part of IA. Not Programmer Accessible. The control unit Page 2

3 1-13 Chapter 1 The General Purpose Machine Fig 1.3 Programmer s Models of 4 Commercial Machines I886 M68 VAX11 P61 (introduced 1975) (introduced 1981) (introduced 1993) (introduced 1979) special 2 16 bytes Fewer than 1 A B IX tatus Data Address and count segment 2 2 bytes More than 12 AX BX CX DX BP I DI C D E IP tatus general 2 bytes More than 3 R R11 AP FP PW bit floating point 31 -bit general 31 More than 5 -bit special 2 52 bytes More than Chapter 1 The General Purpose Machine Tbl 1.3 Instruction Classes Inst ruct ion Clas s C VAX Assembly Language Data Movement Arit hmet ic/ logic Control flow a = b b = c + d*e goto LBL MOV b, a MPY d, e, b ADD c, b, b BR LBL This compiler: Maps C integers to -bit VAX integers Maps C assign, *, and + to VAX MOV, MPY, and ADD Maps C goto to VAX BR instruction The compiler writer must develop this mapping for each language-machine pair 1-15 Chapter 1 The General Purpose Machine The Computer Architect s View 1-16 Chapter 1 The General Purpose Machine Buses as Multiplexers Architect is concerned with design & performance Designs the IA for optimum programming utility and optimum performance of implementation Designs the hardware for best implementation of the Uses performance measurement tools, such as benchmark programs, to see that goals are met Balances performance of building blocks such as,, I/O devices, and interconnections Meets performance goals at lowest cost Interconnections are very important to computer Most connections are shared A bus is a time-shared connection or multiplexer A bus provides a data path and control Buses may be serial, parallel, or a combination erial buses transmit one bit at a time Parallel buses transmit many bits simultaneously on many wires 1-17 Chapter 1 The General Purpose Machine Fig 1.4 imple One- and Two-Bus Architectures 1-18 Chapter 1 The General Purpose Machine Fig 1.5 The Apple Quadra 95 Bus ystem (implified) LocalTalk LocalTalk bus Printers, other computers Input/ output subsystem n bus I/O bus Input/ output subsystem ystem bus ADB transceiver CI NuBus ADB bus CI bus NuBus Keyboard, mouse, bit pads Disk drives, CD ROM drives Video and special cards Input/output devices n-bit system bus Input/output devices Ethernet transceiver Ethernet Other computers (a) One bus (b) Two buses Page 3

4 1-19 Chapter 1 The General Purpose Machine Fig 1.6 The Hierarchy 1-2 Chapter 1 The General Purpose Machine Logic Designer s View Modern computers have a hierarchy of memories Allows tradeoffs of speed/cost/volatility/size, etc. sees common view of levels of the hierarchy. Cache Main Disk Tape Designs the machine at the logic gate level The design determines whether the architect meets cost and performance goals Architect and logic designer may be a single person or team 1-21 Chapter 1 The General Purpose Machine Implementation Domains An implementation domain is the collection of devices, logic levels, etc. which the designer uses. Possible implementation domains: VLI on silicon TTL or ECL chips Gallium arsenide chips PLAs or sea-of-gates arrays Fluidic logic or optical switches 1-22 Chapter 1 The General Purpose Machine Fig 1.7 Three Implementation Domains for the 2-1 Multiplexer 2-1 multiplexer in three different implementation domains Generic logic gates (abstract domain) National emiconductor FAT Advanced chottky TTL (VLI on i) Fiber optic directional coupler switch (optical signals in LiNbO3) I (a) Abstract view of Boolean logic O U6 15 /G 1 /A/B 2 1A 4 3 1Y 1B 5 2A 7 6 2Y 2B 11 3A 9 1 3Y 3B I 14 4A B 4Y O 74F257N (b) TTL implementation domain I O (c) Optical switch implementation 1-23 Chapter 1 The General Purpose Machine The Distinction Between Classical Logic Design and Computer Logic Design The entire computer is too complex for traditional FM design techniques FM techniques can be used in the small There is a natural separation between data and control Data path: storage cells, arithmetic, and their connections Control path: logic that manages data path information flow Well defined logic blocks are used repeatedly Multiplexers, decoders, adders, etc Chapter 1 The General Purpose Machine Programmer: Logic Designer (Fig 1.8): Two Views of the Register 31 B Bus D Q out A Bus CK in Page 4

5 1-25 Chapter 1 The General Purpose Machine Tools of the Logic Designer s Trade Computer-aided design tools Logic design and simulation packages Printed circuit layout tools IC (integrated circuit) design and layout tools Logic analyzers and oscilloscopes Hardware development system 1-26 Chapter 1 The General Purpose Machine Chapter 1 ummary Three different views of machine structure and function Machine/assembly language view:, cells,, IR Fetch-execute cycle Architect views the entire system Concerned with price/performance, system balance Logic designer sees system as collection of functional logic blocks Must consider implementation domain Tradeoffs: speed, power, area Page 5