Radiation-Hardened Bidirectional Multipurpose Transceiver B54AC164245SRH Datasheet
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1 Ver 1.0 Rdition-Hrdened Bidirectionl Multipurpose Trnsceiver B54AC164245SRH Dtsheet Beijing Microelectronics Technology Institute
2 INDEX 1. FEATURES GENERAL DESCRIPTION BLOCK DIAGRAM PIN DESCRIPTION PIN CONFIGURATIONS PRODUCT DESCRIPTION FUCTION DESCRIPTION ELECTRICAL CHARACTERISTIC ABSOLUTE MAXIMUM RATINGS DUAL SUPPLY OPERATING CONDITION DC CHRACTERISTICS AC CHRACTERISTICS PACKAGE Nming Rule
3 1. FEATURES Voltge trnsltion: 5V bus to 3.3V bus; 3.3V bus to 5V bus; Cold spring: 1MΩ minimum input impednce power-off; 0.5um Commercil CMOS; Totl dose:300k rd(si); Single Event Ltchup:LET 75MeV cm 2 /mg High speed, low power consumption; Schmitt trigger inputs to filter noisy signls; Pckge: 48-led fltpck,25mil pitch; 1
4 2. GENERAL DESCRIPTION The 16-bit wide B54ACS164245SRH Multipurpose trnsceiver is designed to perform multiple functions including: synchronous two-wy communiction, Schmitt input buffering, voltge trnsltion, cold spring. With either or both VDD1 nd VDD2 re equl to zero volts, the B54ACS164245SRH outputs nd inputs present minimum impednce of 1MΩ mking it idel for cold spre pplictions. The B54ACS164245SRH enbles system designers to interfce 3.3 volt CMOS comptible components with 5 volt CMOS components. For voltge trnsltion, the A port interfces with the 3.3 volt bus; the B port interfces with the 5 volt bus. The direction control (DIRx) controls the direction of dt flow. The output enble ( ) overrides the direction control nd disbles both ports. These signls cn be driven from either port A or B. The direction nd output enble controls operte these devices s either two independent 8-bit trnsceivers or one 16-bit trnsceiver. 3. BLOCK DIAGRAM FIGURE1. logic digrm 2
5 4. PIN DESCRIPTION 5. PIN CONFIGURATIONS Terminl number Terminl symbol Description Terminl number Terminl symbol Description 1 DIR1 I 48 1 I 2 1B1 I/O 47 1A1 I/O 3 1B2 I/O 46 1A2 I/O 4 VSS G 45 VSS G 5 1B3 I/O 44 1A3 I/O 6 1B4 I/O 43 1A4 I/O 7 VDD1 P 42 VDD2 P 8 1B5 I/O 41 1A5 I/O 9 1B6 I/O 40 1A6 I/O 10 VSS G 39 VSS G 11 1B7 I/O 38 1A7 I/O 12 1B8 I/O 37 1A8 I/O 13 2B1 I/O 36 2A1 I/O 14 2B2 I/O 35 2A2 I/O 15 VSS G 34 VSS G 16 2B3 I/O 33 2A3 I/O 17 2B4 I/O 32 2A4 I/O 18 VDD1 P 31 VDD2 P 3
6 19 2B5 I/O 30 2A5 I/O 20 2B6 I/O 29 2A6 I/O 21 VSS G 28 VSS G 22 2B7 I/O 27 2A7 I/O 23 2B8 I/O 26 2A8 I/O 24 DIR2 I 25 2 I 6. PRODUCT DESCRIPTION 6.1 FUCTION DESCRIPTION FUNCTION TABLE: If VDD1 nd VDD2 re not powered up together, then VDD2 should be powered up first for proper control of outputs by OE nd DIR cnnot be gurnteed. During opertion of the prt, fter power up, insure VDD1 >VDD2. 4
7 7. ELECTRICAL CHARACTERISTIC 7.1 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS MIN MAX V DD1 Supply voltge V V DD2 Supply voltge V V I V O Voltge ny pin -0.3 V DD V I IN DC input current ma T stg T h Storge Temperture rnge Led temperture(solderin g,10 s) T j Mximum junction temperture θjc Therml resistnce junction to cse C/W 7.2 DUAL SUPPLY OPERATING CONDITION SYMBOL PARAMETER LIMIT UMIT MIN TYPICAL MAX V DD1 Supply voltge 3.0 or or 5.5 V V DD2 Supply voltge 3.0 or or 5.5 V V I Input voltge ny pin 0 - V DD1 V T C Temperture ny pin t r,t f Mximum input rise nd fll time ns/v 7.3 DC CHRACTERISTICS Test Symbol Test conditions (4.5V V DD1 5.5V, Min Limits Mx Unit 5
8 3V V DD2 3.6V -55 <TC<125 ) Schmitt trigger positive going threshold Schmitt trigger negtive going threshold Schmitt trigger rnge of hysteresis Schmitt trigger rnge of hysteresis Three-stte output lekge current high Three-stte output lekge current low Input current cold spre mode V T+ V T- V H1 V H2 I OZH I OZL A Port=3.3V,V DD1 =5.5V nd 4.5V,V DD2 =3.6V nd 3.0V; A Port=5V,V DD1 =5.5V nd 4.5V,V DD2 =5.5V nd 4.5V. 0.7V DD2 V B Port=3.3V,V DD1 =3.6V nd 3.0V,V DD2 =3.6V nd 3.0V; B Port=5V,V DD1 =5.5V nd 4.5V,V DD2 =3.6V nd 3.0V. 0.7V DD1 V A Port=3.3V,V DD1 =5.5V nd 4.5V,V DD2 =3.6V nd 3.0V; A Port=5V,V DD1 =5.5V nd 4.5V,V DD2 =5.5V nd 4.5V. 0.3V DD2 V B Port=3.3V,V DD1 =3.6V nd 3.0V,V DD2 =3.6V nd 3.0V; B Port=5V,V DD1 =5.5V nd 4.5V,V DD2 =3.6V nd 3.0V. 0.3V DD1 V A Port=3.3V,V DD1 =5.5V nd 4.5V,V DD2 =3.6V nd 3.0V; B Port=3.3V,V DD1 =3.0V nd 3.6V,V DD2 =3.0V nd 3.6V 0.4 V A Port=5V,V DD1 =5.5V nd 4.5V,V DD2 =5.5V nd 4.5V; B Port=5V,V DD1 =5.5V nd 4.5V,V DD2 =3.6V nd 3.0V 0.6 V APort=3.3V,V DD1 =5.5V,V DD2 =3.6V,V IN =V DD2 /V SS,V OUT = V DD; APort=5.0V,V DD1 =5.5V=V DD2,V IN =V DD2 /V SS,V OUT = V DD2 ; BPort=3.3V,V DD2 =V DD1 =3.6V,V IN =V DD1 /V SS,V OUT = V DD1 ; - 3 μa BPort=5.0V,V DD2 =3.6V,V DD1 =5.5V,V IN =V DD1 /V SS,V OUT = V DD1 APort=3.3V,V DD1 =5.5V,V DD2 =3.6V,V IN =V DD2 /V SS,V OUT = V DD2 ; APort=5.0V,V DD1 =5.5V=V DD2,V IN =V DD2 /V SS,V OUT = V DD2 ; BPort=3.3V,V DD2 =V DD1 =3.6V,V IN =V DD1 /V SS,V OUT = V DD1 ; -1 - μa BPort=5.0V,V DD2 =3.6V,V DD1 =5.5V,V IN =V DD1 /V SS,V OUT = V DD1 I CS A Port=B Port=V IN =5.5V,V DD =V SS μa Input current high I IH APort=3.3V,V DD1 =5.5V,V DD2 =3.6V,V IN =V DD2 /V SS ; APort=5.0V,V DD1 =5.5V=V DD2,V IN =V DD2 /V SS ; BPort=3.3V,V DD2 =V DD1 =3.6V,V IN =V DD1 /V SS ; BPort=5.0V,V DD2 =3.6V,V DD1 =5.5V,V IN =V DD1 /V SS - 3 μa APort=3.3V,V DD1 =5.5V,V DD2 =3.6V,V IN =V DD2 /V SS ; Input current low I IL APort=5.0V,V DD1 =5.5V=V DD2,V IN =V DD2 /V SS ; BPort=3.3V,V DD2 =V DD1 =3.6V,V IN =V DD1 /V SS ; -1 μa BPort=5.0V,V DD2 =3.6V,V DD1 =5.5V,V IN =V DD1 /V SS Low level V OL1 APort=3.3V,I OL =8mA,V IN =V DD2 /V SS,V DD1 =4.5V,V DD2 =3.0V 0.5 V 6
9 Test conditions Limits (4.5V V DD1 5.5V, Test Symbol 3V V DD2 3.6V -55 <TC<125 ) Min Mx Unit output voltge BPort=3.3V,I OL =8mA,V IN =V DD1 /V SS,V DD1 =3.0V,V DD2 =3.0V 0.5 V APort=5V,I OL =8mA,V IN =V DD2 /V SS,V DD1 =4.5V, V DD2 =4.5V 0.4 V BPort=5V,I OL =8mA,V IN =V DD1 /V SS,V DD1 =4.5V, V DD2 =3.0V 0.4 V APort=3.3V,I OL =100μA,V IN =V DD2 /V SS,V DD1 =4.5V,V DD2 =3.0V 0.2 V Low level output voltge V OL2 BPort=3.3V,I OL =100μA,V IN =V DD1 /V SS,V DD1 =3.0V,V DD2 =3.0V 0.2 V APort=5V,I OL =100μA,V IN =V DD2 /V SS,V DD1 =4.5V,V DD2 =4.5V 0.2 V BPort=5V,I OL =100μA,V IN =V DD1 /V SS,V DD1 =4.5V,V DD2 =3.0V 0.2 V APort=3.3V,I OH =-8mA,V IN =V DD2 /V SS,V DD1 =4.5V,V DD2 =3.0V V DD2-0.9 V High level output voltge High level output voltge Quiescent supply current Input V OH1 V OH2 BPort=3.3V,I OH =-8mA,V IN =V DD1 /V SS,V DD1 =3.0V,V DD2 =3.0V V DD1-0.9 V APort=5V,I OH =-8mA,V IN =V DD2 /V SS,V DD1 =4.5V, V DD2 =4.5V V DD2-0.7 V BPort=5V,I OH =-8mA,V IN =V DD1 /V SS,V DD1 =4.5V, V DD2 =3.0V V DD1-0.7 V APort=3.3V,I OH =-100μA,V IN =V DD2 /V SS,V DD1 =4.5V,V DD2 =3.0V; APort=5V,I OH =-100μA,V IN =V DD2 /V SS,V DD1 =4.5V,V DD2 =4.5V V DD2-0.2 V BPort=3.3V,I OH =-100μA,V IN =V DD1 /V SS,V DD1 =3.0V,V DD2 =3.0V; BPort=5V,I OH =-100μA,V IN =V DD1 /V SS,V DD1 =4.5V, V DD1-0.2 V V DD2 =3.0V I DDQ1 V DD =5.5V,V IN =V DD /V SS,T A = μa I DDQ2 V DD =5.5V,V IN =V DD /V SS,T A = -55,T A = μa I DDQ3 V DD =5.5V,V IN =V DD /V SS (Post-Rd 25 ) 500 μa cpcitnce C IN T C =25 f =1MH Z 15 pf Output cpcitnce C OUT T C =25 f =1MH Z 15 pf Functionl test V IH =0.7V DD, V IL =0.3 V DD, V DD1 =4.5V nd 5.5V, V DD2 =3.0V nd 3.6V L H Gurnteed 7
10 7.4 AC CHRACTERISTICS Symbol Test conditions (4.5V V DD1 5.5V, 3V V DD2 3.6V, Min Limit Mx Unit -55 <TC<125 ) t PLH ns t PHL ns t PZL ns t PZH PORT B=5V,PORT A=3.3V, ns V DD1 =4.5V nd 5.5V,V DD2 =3.0V nd 3.6V. t PLZ ns t PHZ ns t SKEW ps t DSKEW ns Gurnteed Symbol Test conditions (4.5V V DD1 5.5V, 3V V DD2 3.6V, -55 <TC<125 ) Min Limits mx Unit t PLH PORT B=PORT A=5V ns V DD1 =4.5V nd 5.5V, t PHL V DD2 =4.5V nd 5.5V ns 8
11 t PZL ns t PZH ns t PLZ ns t PHZ ns - t SKEW 600 ps Gurnteed t DSKEW ns Symbol Test conditions (4.5V V DD1 5.5V, 3V V DD2 3.6V, -55 <TC<125 ) Min Limit Mx Unit t PLH ns PORT B=PORT A=3.3V,V DD1= 3.0Vnd t PHL 3.6V, ns t PZL V DD2 =3.0V nd 3.6V ns 9
12 t PZH ns t PLZ ns t PHZ ns t SKEW ps t DSKEW ns Gurnteed 10
13 8. PACKAGE Symbol Limit Min Typicl Mx unit: mm A 3.00 b c e H E Z 1.27 Figure led Fltpck 11
14 9. Nming Rule 12
15 13
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