ECE 449 OOP and Computer Simulation Lecture 09 Logic Simulation

Transcription

1 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 1/31 ECE 449 OOP and Computer Simulation Lecture 09 Logic Simulation Professor Jia Wang Department of Electrical and Computer Engineering Illinois Institute of Technology October 20, 2017

2 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 2/31 Outline FSM and Synchronous Circuit Cycle Simulation

3 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 3/31 Reading Assignment This lecture: Project 4 Specification Next lecture: 13

4 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 4/31 Outline FSM and Synchronous Circuit Cycle Simulation

5 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 5/31 Logic Simulation How to model a digital circuit for computer simulation? Why we call it logic simulation? What algorithms are available for logic simulation? What language features are available for us to implement logic simulation, or other simulations?

6 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 6/31 Overview of FSM Finite State Machine (FSM) State: store information regarding previous inputs State transition: consume an input, produce an output and change the current state into the next state Graph representation States as vertices State transitions as edges (annotated with inputs/outputs) Used by us to analyze statements However, when the FSM has many possible states, it is almost impossible for one to specify it as a graph.

7 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 7/31 Functional Representation of FSM Instead of using a graph, we can specify a FSM in other ways. For each state transition, The state transition function computes the next state from the current state and the input. The output function computes the output from the current state and the input. Given an initial state and a sequence of inputs, one can decide the behavior of a FSM iteratively using these two functions.

8 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 8/31 Encodings Since a FSM has a finite number of possible states, one can represent, or encode, a state using a fixed number of bits. E.g. if there are 16 possible states, a 4-bit encoding can be applied. Similarly you can encode inputs and outputs. Under such encodings, the state transition function and the output function become boolean functions.

9 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 9/31 Implement FSMs as Synchronous Circuits Since both the state transition and the output functions are boolean functions, one can implement them as a combinational circuit. A combinational circuit is made up of combinational logic gates like AND and OR, whose outputs are determined by the current inputs. We can add flip-flops to store the state and introduce a clock to control them. The obtained circuit is a synchronous circuit that implements the FSM.

10 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 10/31 State Transition in Synchronous Circuits Exact one state transition happens per clock cycle. During a clock cycle, a flip-flop provide 1 bit of the current state for computation of the output and the next state. Before the clock cycle ends, 1 bit of the next state is computed from the combinational circuit at the input of the flip-flop. After the clock cycle ends and before the next clock cycle begins (the clock edge), the flip-flop is updated with the bit at the input, which is part of the next state.

11 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 11/31 Example State: A, 4-bit integers Output = Next(A) = A + 1 Assume initially A = 0 This is a counter that cycles between 0 to 15.

12 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 12/31 Logic Simulation and FSM We can simulate a synchronous circuit by simulating the corresponding FSM. Since that involves computing boolean functions, we call it logic simulation. An alternative way is to simulate a synchronous circuit as any circuit, i.e. through circuit simulation. Circuit simulation involves quantities like voltages, currents, resistances, capacitances, etc, and physical laws like Ohm s law and Kirchhoff s current/voltage laws (KCL/KVL). Unfortunately, at such low abstract level, circuit simulation is much slower and much more complicated than logic simulation.

13 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 13/31 Outline FSM and Synchronous Circuit Cycle Simulation

14 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 14/31 Cycle Simulation The most fundamental logic simulation algorithm. Simulate the state transition per clock cycle and ignore any complications within the cycle E.g. the requirement that the computation of the output and the next state should be finished within one clock cycle is ignored. This can only be decided by circuit simulation. The cycle simulation algorithm: 0. Set the initial state, i.e. the initial bits stored in the flip-flops. For each clock cycle 1. Retrieve the current state from the flop-flops 2. Retrieve the current input 3. Compute the next state and the output 4. Store the next state into the flip-flops Let s focus on step 3. We assume initially all flip-flops store 0. Class for flip-flops should have members to store the state, and inputs are reading from files.

15 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 15/31 Example: a 4-Bit Counter 13 wires, 14 components (clk/evl_clock are not shown) Assume initially all flip-flops store 0 (0000).

16 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 16/31 Cycle 1 Output 0000, next state 0001 We need to teach our program to compute them!

17 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 16/31 Cycle 1 Output 0000, next state 0001 We need to teach our program to compute them!

18 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 17/31 Cycle 2: The Beginning Use nets to hold logic values Initialize them to? since we don t know them yet. The state in the flip-flops are known from the previous cycle.

19 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 17/31 Cycle 2: The Beginning Use nets to hold logic values Initialize them to? since we don t know them yet. The state in the flip-flops are known from the previous cycle.

20 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 18/31 Cycle 2: Compute the Next State for F0 I It requires you to know the value on n0, which is computed by X0, and thus the values on s0 and c0 are required.

21 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 18/31 Cycle 2: Compute the Next State for F0 I It requires you to know the value on n0, which is computed by X0, and thus the values on s0 and c0 are required.

22 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 19/31 Cycle 2: Compute the Next State for F0 II Once s0 and c0 are computed, you can compute n0.

23 Cycle 2: Compute the Output ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 20/31

24 Cycle 2: Compute the Next State for F3 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 21/31

25 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 22/31 Cycle 2: The End Output 0001, next state 0010 In summary, we can compute the next state and the output bit-by-bit. The order to compute them doesn t matter.

26 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 22/31 Cycle 2: The End Output 0001, next state 0010 In summary, we can compute the next state and the output bit-by-bit. The order to compute them doesn t matter.

27 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 23/31 Cycle 3 How exactly should a program compute a bit of next state/output? Use recursions

28 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 24/31 Recursive Logic Evaluation Before the evaluation starts, set the logic value of all nets to?. For each of the flip-flops/output gates, ask the input nets for their values. If a net is asked for its logic value, If the value is computed (not a?), then return it. Otherwise (the value is?), the net should ask its driver gate to compute the value. The value should then be stored (replacing?) and returned. If a gate is asked to compute a logic value, If it is a flip-flop, then it provide the current state bit. If it is an input gate, then it provide the value from the file. If it is an one/zero gate, then it provide 1/0. Otherwise, it should first ask all of its input nets to provide their values and then perform pre-defined computations.

29 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 24/31 Recursive Logic Evaluation Before the evaluation starts, set the logic value of all nets to?. For each of the flip-flops/output gates, ask the input nets for their values. If a net is asked for its logic value, If the value is computed (not a?), then return it. Otherwise (the value is?), the net should ask its driver gate to compute the value. The value should then be stored (replacing?) and returned. If a gate is asked to compute a logic value, If it is a flip-flop, then it provide the current state bit. If it is an input gate, then it provide the value from the file. If it is an one/zero gate, then it provide 1/0. Otherwise, it should first ask all of its input nets to provide their values and then perform pre-defined computations.

30 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 24/31 Recursive Logic Evaluation Before the evaluation starts, set the logic value of all nets to?. For each of the flip-flops/output gates, ask the input nets for their values. If a net is asked for its logic value, If the value is computed (not a?), then return it. Otherwise (the value is?), the net should ask its driver gate to compute the value. The value should then be stored (replacing?) and returned. If a gate is asked to compute a logic value, If it is a flip-flop, then it provide the current state bit. If it is an input gate, then it provide the value from the file. If it is an one/zero gate, then it provide 1/0. Otherwise, it should first ask all of its input nets to provide their values and then perform pre-defined computations.

31 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 24/31 Recursive Logic Evaluation Before the evaluation starts, set the logic value of all nets to?. For each of the flip-flops/output gates, ask the input nets for their values. If a net is asked for its logic value, If the value is computed (not a?), then return it. Otherwise (the value is?), the net should ask its driver gate to compute the value. The value should then be stored (replacing?) and returned. If a gate is asked to compute a logic value, If it is a flip-flop, then it provide the current state bit. If it is an input gate, then it provide the value from the file. If it is an one/zero gate, then it provide 1/0. Otherwise, it should first ask all of its input nets to provide their values and then perform pre-defined computations.

32 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 25/31 Cycle 4 Output 0011, next state 0100

33 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 26/31 More Cycles Cycle 5: output 0100, next state 0101 Cycle 6: output 0101, next state

34 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 27/31 Possible Implementation: netlist/net/pin void netlist::compute_next_state_and_output() { for (net *n: nets_) n->set_signal(? ); for (gate *g: gates_) g->compute_next_state_or_output(); } char net::get_signal() { if (signal_ ==? ) { auto it = std::find_if(connections_.begin(), connections_.end(), [](pin *p) {p->get_dir() == O ;}); if (it == connections_.end()) throw std::runtime_exception("floating net"); pin *driver = *it; signal_ = driver->compute_signal(); } return signal_; } char pin::compute_signal() { if (dir_ == O ) return gate_->compute_signal(index_); else // dir_ == I return net_->get_signal(); }

35 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 28/31 Possible Implementation: gate void gate::compute_next_state_or_output() { if (type_ == "evl_dff") { next_state_ = pins_[1]->compute_signal(); // d } else if (type_ == "evl_output") { collect signal from all pins and write to file } } char gate::compute_signal(int pin_index) { if (type_ == "evl_dff") { assert pin_index == 0; // must be q return state_; } else if (type_ == "evl_zero") { return 0 ; } else if (type_ == "and") { assert pin_index == 0; // must be out collect signals from the input pins compute and return the output signal }... }

36 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 29/31 Possible Implementation: gate (Cont.) bool gate::validate_structural_semantics() { if (type_ == "and") { if (pins_.size() < 3) return false; pins_[0]->set_as_output(); // out for (size_t i = 1; i < pins_.size(); ++i) pins_[i]->set_as_input(); } else if (type_ == "evl_dff") { if (pins_.size()!= 3) return false; pins_[0]->set_as_output(); // q pins_[1]->set_as_input(); // d pins_[2]->set_as_input(); // clk }... } Any issue with the code? Repititions?

37 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 29/31 Possible Implementation: gate (Cont.) bool gate::validate_structural_semantics() { if (type_ == "and") { if (pins_.size() < 3) return false; pins_[0]->set_as_output(); // out for (size_t i = 1; i < pins_.size(); ++i) pins_[i]->set_as_input(); } else if (type_ == "evl_dff") { if (pins_.size()!= 3) return false; pins_[0]->set_as_output(); // q pins_[1]->set_as_input(); // d pins_[2]->set_as_input(); // clk }... } Any issue with the code? Repititions?

38 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 30/31 Cohesion and OOD The design is of low cohesion, which leads to many issues. Each branch focuses on a different type of gates. It is difficult to understand each type of gates. One must search for all the member functions with such branches and read the corresponding branch. It is difficult to extend the design. It is intuitive for designers to implement a few types of gates at a time. However, to implement a new type of gates, one must add new branches to multiple member functions. It is almost impossible to reuse the code. A lot of copy-and-paste are needed if you want to extract code for a single gate type. OOD seeks designs with high cohesion. But how?

39 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 30/31 Cohesion and OOD The design is of low cohesion, which leads to many issues. Each branch focuses on a different type of gates. It is difficult to understand each type of gates. One must search for all the member functions with such branches and read the corresponding branch. It is difficult to extend the design. It is intuitive for designers to implement a few types of gates at a time. However, to implement a new type of gates, one must add new branches to multiple member functions. It is almost impossible to reuse the code. A lot of copy-and-paste are needed if you want to extract code for a single gate type. OOD seeks designs with high cohesion. But how?

40 ECE 449 Object-Oriented Programming and Computer Simulation, Fall 2017, Dept. of ECE, IIT 31/31 Summary Cycle simulation is one of the most fundamental logic simulation algorithms. Simulate one clock cycle/state transition per iteration Within each iteration, apply recursive logic evaluation to compute the next state and the output functions.