MICROPROGRAMMED CONTROL:-
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1 MICROPROGRAMMED CONTROL:- Two methods of implementing control unit are Hardwired Control & Micro-Programmed Control. Hardwired: - when the control signals are generated by hardware using conventional logic design techniques, the control unit is said to be Hard-wired. e x:-encoders, Decoders, AND/OR arrays. Micro-Programming: - It is the second alternative for designing the control unit of a digital computer. Control Unit: - It initiates a series of sequential steps of micro-operations. Control Word: - The control variables at any given time can be represented by a string of 1 s and 0 s called a control word. Micro-Programmed Control Unit: - control unit whose binary control variables are stored in memory is called a micro-programmed control unit. Each word in control memory contains within it a micro-instruction. A sequence of micro-instructions constitutes a micro-program. The control memory can be a Read-Only-Memory (ROM). Control Memory: - A memory that is a part of a control unit is referred to as a control memory. A computer that employs a micro-programmed control unit will have 2 separate memories. Main Memory Control Memory. Main memory: - this is available to the user for storing the programs; the contents of main memory may alter. Control Memory: - This holds a fixed micro-program that cannot be altered by the user. The micro-program consists of micro-instructions that specify various internal control signals for execution of register micro-operations.
2 Micro-Programmed Control Unit:- Next Address Generator (Sequencer) Control Address Register Control Memory (ROM) Control Data Register The control memory is assumed to be a ROM, within which all control information is permanently stored. The control memory address register specifies the address of the micro-instruction. The control data register holds the micro-instruction read from memory. Micro-instruction contains a control word that specifies one (or) more micro-operations for the data processor. Once these micro-operations are executed the control must determine the next address. Some bits of the present micro-instruction coming from the control data register are used to control the generation of the address of the next micro-instruction. The next address may also be a function of external input conditions. While the micro-operations are being executed, the next address is computed in the next address generation circuit and then transferred into the control address register to read the next micro-instruction. Instruction Format: I OP Code Address Instruction (symbol) OP Code Description 1) ADD 0000 AC AC+M[EA] 2) BRANCH 0001 if (AC < 0) then (PC EA) 3) STORE 0010 M[EA] AC 4) EXCHANGE 0011 AC M[EA], M[EA] AC
3 If OP code bits in the instruction code are 4, there are 16 possible memory-reference instructions. Out of 16 memory-reference instructions, 4 are listed above that is ADD, BRANCH, STORE, and EXCHANGE. The OP code part of the instruction code, decode the address of control memory where the routine is located. The transformation from the instruction code bits to an address in control memory where the routine is located is referred to as a mapping process. Once the required routine is reached, the micro-instructions that execute the instruction may be sequenced by incrementing the control address register. But sometimes the sequence of micro-operations will depend on values of certain status bits in processor registers. Micro-program Example:- It has 2 memory units. Main memory Control memory. The processor registers are PC, AR, DR, and AC. The control unit has a CAR and SBR. The control memory and its registers are organized as a micro-programmed control unit. The purpose of using multiplexers is to transfer the information among the registers in the processors. DR can receive information from AC, PC (or) Memory. AR can receive information from PC (or) DR. PC can receive information only from AR. ALU performs micro-operations with data from AC & DR, places the result in AC. Memory receives its address from AR. Symbolic Micro-Instructions:- A symbolic micro-program can be translated into its binary micro-program by means of an assembler. Each line of the assembly language micro-program defines a symbolic micro-instruction. Each symbolic micro-instruction is divided into 5 fields: label, micro-operations, CD, BR & AD.
4 The fields specify the following information: Fetch Routine:- The label field may be empty (or) it may specify a symbolic address. A label is terminated with a colon [:] The micro-operations field consists of 1,2 (or) 3 symbols separated by commas from those defined in table 7.1 The CD field has one of the letters U, I, S (or) Z. The BR field contains one of the four symbols defined in table 7.1 The AD field specifies a value for the address field of the micro-instructions in one of the three possible ways: With a symbolic address which must also appear as a label. With a symbol NEXT to designate the next address in sequence. When the BR field contains a RET (or) MAP symbol, the AD field is left empty and is converted to 7 Zeroes by the assembler. The control memory has 128 words. Each word contains 20 bits. The first 64 words are to be occupied by the routines for the 16 instructions. (2^4), 4: OP code bits. 0 1 Word 1 Word Word 64 Word bits 127. Word 128
5 Symbols and Binary code for Micro-Instruction Fields:- F1 Micro-Operation Symbol 000 None NOP 001 AC AC+DR ADD 010 AC 0 CLRAC 011 AC AC+1 INCAC 100 AC DR DRTAC 101 AR DR(0-10) DRTAR 110 AR PC PCTAR 111 M[AR] DR WRITE F2 Micro-operation Symbol 000 None NOP 001 AC AC-DR SUB 010 AC (AC) V (DR) OR 011 AC (AC)^(DR) AND 100 DR M[AR] READ 101 DR AC ACTDR 110 DR DR+1 INCDR 111 DR(0-10) PC PCTDR BR Symbol Function 11 MAP CAR(2-5) DR(11-14), CAR(0,1,6) 0 Micro-operation field F1: 3 bits, (2^3):8 distinct micro-operations Total of 21 micro-operations F2: 8 micro-operations. F3: 8 micro-operations. F1: 000 F2: 000 F3: 000 DR M [AR] with F2=100 PC PC+1 with F3=101 Two micro-operations from F2 and F3 and none from F1. The 9-bits of the micro-operation fields will be
6 Selection of Address for Control Memory Micro-Program Sequencer for a Control Memory:- External (MAP) L SBR Load I I1 Input S1 T Logic S0 MUX-1 1 Test Increments S l Z MUX-2 Select Clock CAR Control Memory Micro-op CD BR AD
7 Input Logic Truth-Table for Micro-Program Sequencer :- - BR Field Input MUX-1 Load SBR I I1 I0 T S1 S0 L X X Using K -map S1 = I1 S0 = (I1)(I0)+ (I1) (T) L = (I1) (I0) (T) BR Symbol Function 00 JMP CAR AD if condition = 1 CAR CAR+1 if condition = 0 01 CALL CAR AD, SBR CAR+1 if condition = 1 CAR CAR+1 if condition = 0 Symbolic Micro-Instructions/Micro-Program:- A symbolic micro-program can be translated into a binary micro-program by means of an Assembler. Each symbolic micro-instruction is divided into 5 fields: Label Micro-operation
8 CD BR AD The micro-instruction needed for the fetch routine are: AR PC DR M[AR], PC PC+1 AR DR(0-10), CAR(2-5) DR(11-14), CAR(0,1,6) 0 Symbolic Micro-Program for the Fetch Routine (or) Assembly Language Micro-Program for the Fetch Routine:- Label Micro-Operations CD BR AD ORG 64 FETCH: PCTAR U JMP NEXT READ,INCPC U JMP NEXT DRTAR U MAP Translation of symbolic micro-program to binary produces the following binary microprogram. Binary F1 F2 F3 CD BR AD Address Fetch Routine needs 3 micro-instructions which are placed in control memory at addresses 64, 65 & 66. Control memory has 128 words. Each word contains 20-bits. Fetch Routine is stored at 64, 65 & 66 addresses in control memory.
9 0 1 2 a Words 65 (0-127) bits Symbolic Micro-Program for Fetch Routine (or) Assembly Language Micro-Program:- Label Micro-Operations CD BR AD ORG 64 FETCH: PCT AR U JMP NEXT READ, INCPC U JMP NEXT DR TAR U MAP
10 The first 64 words in the control memory i.e. (0-63) are occupied with the routines for the 16 instructions (memory-reference) 4 OP Code bits in instruction code format ==> (2^4) = 16 memory - reference instructions. Capacity of control memory is 128 words = 2^7 No. of address lines: 7 Therefore AD field in the micro-instruction code format is 7-bits. Symbolic Micro-Program for ADD Routine:- Label Micro-Program CD BR AD ORG O ADD: NOP I CALL INDRCT READ U JMP NEXT ADD U JMP FETCH Note:- READ => Read the operand from the address specified by AR. The first micro-instruction in the ADD routine calls a sub-routine named INDRCT, conditioned on status bit I. If I=1,a branch to INDRCT occurs and the return address is stored in SBR (return address=1). Symbolic Micro-Program for INDRCT Sub-Routine:- Label Micro-Operation CD BR AD INDRCT: READ U JMP NEXT DR TAR U RET This INDRCT sub-routine reads the effective address from the memory and then transferred to AR from DR.
11 Design of Control Unit & Decoding of Micro-operation Fields (F1, F2, and F3): - F1 F2 F3 3x8 deco x8 deco x8 deco 7 0 ADD AND DRTAC ALU DRTAR From Load PCTAR From PC DR (0-10) AC Select MUX AR Clock Load
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