University of Calgary Department of Electrical and Computer Engineering ENCM 369: Computer Organization Instructor: Steve Norman

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1 page of 9 University of Calgary Department of Electrical and Computer Engineering ENCM 369: Computer Organization Instructor: Steve Norman Winter 26 FINAL EXAMINATION (with corrections) Location: ICT 2 and ICT 22 Wednesday, April 2 8:am to :am Corrections to the original question paper appear in red on pages 3 and 8. NAME (printed): Please don t write anything within this box. / 2 2 / U of C ID NUMBER: 3 / 8 4 / 4 5 / 2 SIGNATURE: 6 / 2 7 / 8 / TOTAL / 89 Instructions Please note that the official University of Calgary examination regulations are printed on page of the Examination Regulations and Reference Material booklet that accompanies this examination paper. All of those regulations are in effect for this examination, except that you must write your answers on the question paper, not in the examination booklet. You may use one of the following SSE-sanctioned calculator models or computers during the the final examination: Casio FX-26, Casio FX-3MS, TI-3XIIS. You may not use any other calculators or computers. The examination is closed-book. You may not refer to books or notes during the examination, with one exception: you may refer to the Examination Regulations and Reference Material booklet that accompanies this examination paper. You are not required to add comments to assembly language code you write, but you are strongly encouraged to do so, because writing good comments will improve the probability that your code is correct and will help you to check your code after it is finished. Some problems are relatively easy and some are relatively difficult. Go after the easy marks first. Write all answers on the question paper and hand in the question paper when you are done. Please do not hand in the Examination Regulations and Reference Material booklet. Please print or write your answers legibly. What cannot be read cannot be marked. If you write anything you do not want marked, put a large X through it and write rough work beside it. You may use the backs of pages for rough work.

2 ENCM 369 Winter 26 Final Examination (with corrections) page 2 of 9 PROBLEM (2 marks) Complete the MARS translation of the procedure quux. In addition to the usual rules about use of GPRs, assume the following rules for 64-bit FPRs: Return values of type double use $f. Arguments x and y of foo use $f2 and $f4. Argument c of quux uses $f2. $f2, $f4,... $f may be used like t-registers. $f2, $f22,... $f3 may be used like s-registers. double foo(double x, double y); double quux(const double *a, int n, double c) { double sum; int i; sum =.; for (i = ; i < n; i++) sum += foo(a[i], c); return sum;.data cpt:.double..text.globl quux quux:

3 ENCM 369 Winter 26 Final Examination (with corrections) page 3 of 9 PROBLEM 2 (total of marks) machine code bits instruction 5:2 :8 7:4 3: description and Rds Rso Rds = Rds & RSo or Rds Rso Rds = Rds RSo add Rds Rso Rds = Rds + RSo sub Rds Rso Rds = Rds RSo slt Rds Rso Rds = if Rds < Rso, otherwise addsl Rds Rso count Rds = Rds + (RSo << count) addi Rds Imm Rds = Rds + sign-extension of Imm slti Rds Imm Rds = if Rds < sign-extension of Imm, otherwise biz Rs Imm branch if all bits of Rs are zero lw Rd Ra use address in Ra to copy D-Mem word to Rd sw Rs Ra use address in Ra to copy Rs to D-Mem word 6 A RD 6 I-Mem 6 6 7: SignExtend 6 << add :8 5:2 Control RedD 4:2 2: all bits? :8 7:4 A A2 A3 WD3 WE3 RD RD2 R-File SC shift left ALU add 6 x WE WD RD A D-Mem 6 6 D/E register 3: 5: VioletW VioletD VioletE IndigoD IndigoE BlueD GreenD YellowD BlueE GreenE YellowE OrangeD OrangeE PC VioletM IndigoM BlueM F/D register E/M register InstrD M/W register IndigoW To the left there is a 6-bit instruction set specification along with a proposed pipelined microarchitecture for that instruction set. Note the presence of a left-shifter in the E stage the SC input of that element is a 4-bit shift count. It s there in support of an instruction called addsl add, with left shift. Part a (7 marks). Fill out the following table of control signals. For full credit you must write X for don t-care wherever it is applicable. (The given circuit does not have the capability to forward or stall, so do not worry about getting correct behaviour in the face of data hazards.) RedD OrangeD YellowD GreenD BlueD IndigoD VioletD InstrD5:2 Part b (3 marks). Consider the following instruction sequence below. Suppose that the D stage of biz reads for the $3 value, so the branch is taken. Which of and, or, and add will enter the pipeline before lw is fetched? Draw a diagram to support your answer. biz $3, L and $4, $5, $6 or $8, $9, $ add $, $2, $3 L: lw $4, ($5)

4 ENCM 369 Winter 26 Final Examination (with corrections) page 4 of 9 PROBLEM 3 (total of 8 marks) machine code bits instruction 5:2 :8 7:4 3: description and Rds Rso Rds = Rds & RSo or Rds Rso Rds = Rds RSo add Rds Rso Rds = Rds + RSo sub Rds Rso Rds = Rds RSo slt Rds Rso Rds = if Rds < Rso, otherwise addsl Rds Rso count Rds = Rds + (RSo << count) addi Rds Imm Rds = Rds + sign-extension of Imm slti Rds Imm Rds = if Rds < sign-extension of Imm, otherwise biz Rs Imm branch if all bits of Rs are zero lw Rd Ra use address in Ra to copy D-Mem word to Rd sw Rs Ra use address in Ra to copy Rs to D-Mem word 6 A RD 6 I-Mem 6 6 7: SignExtend 6 << add :8 5:2 Control RedD 4:2 2: all bits? :8 7:4 A A2 A3 WD3 WE3 RD RD2 R-File SC shift left ALU add 6 x WE WD RD A D-Mem 6 6 D/E register 3: 5: VioletW VioletD VioletE IndigoD IndigoE BlueD GreenD YellowD BlueE GreenE YellowE OrangeD OrangeE PC VioletM IndigoM BlueM F/D register E/M register InstrD M/W register IndigoW The instruction set specification and schematic to the left exactly repeat the information given for Problem 2. Suppose for all parts of Problem 3, the goal is reliable behaviour of the circuit with a clock period of 4 ps. For the PC and the four pipeline registers tpcq = 33 ps and tsetup = 22 ps. Here are tpd values for some combinational components: component tpd mux 3 ps adder 54 ps and gate 8 ps shift left (in E stage) 86 ps Part a (2 marks). Find the maximum allowable tpd for the I-Mem. Part b (3 marks). Find the maximum allowable tpd for the ALU. Part c (3 marks). Suppose that falling edges of the clock are separated by exactly half a clock period from rising edges, and that the R-File outputs RD and RD2 are always ready no later than 75 ps after a falling clock edge. Find the maximum allowable tpd for the element called all bits?.

5 ENCM 369 Winter 26 Final Examination (with corrections) page 5 of 9 PROBLEM 4 (total of 4 marks). Part a. (4 marks.) In the 64-bit IEEE 754 double-precision format, what number does the bit pattern xc9 represent? Show your work. Part b. (5 marks.) Suppose the following code sequence is executed in MARS: addiu $t, $zero, 9 subu $t, $zero, $t mtc $t, $f2 cvt.s.w $f4, $f2 Determine the bit patterns that will appear in $t and the 32-bit $f2 and $f4 registers. Write your answers in hexadecimal notation. Part c. (5 marks.) Suppose in a MIPS processor $t contains xffff_fffe and $t contains x_5. What will be in the Hi and Lo registers after the instruction mult $t, $t is run? Show your work. (Hint: Start by finding out what signed integer is represented by the bit pattern in $t.)

6 ENCM 369 Winter 26 Final Examination (with corrections) page 6 of 9 PROBLEM 5 (2 marks). Here is a reminder about ASCII: The character codes for the digits,,..., 9 are 48, 49,..., 57. In the C code below, keepd stands for keep digits. In main, after the call to keepd is finished, the first five elements in the array buf will have values 2, 3, 5 9, \. The MARS assembly-language program on this page is a correct translation of the C program. Fill in the table of registers and the blank boxes in the diagram of memory with numbers to show the state of the assembly-language program on the third time it gets to point one. GPR value of GPR when main label address starts is_digit x4_2c $s x_ab keepd x4_4c $s x_cd main x4_a4 $s2 x_ef.data src x_ $sp x7fff_e72.globl src src:.asciiz "2/3:5a9" $ra x4_2 Assume that memory is little-endian and write memory contents as values of bytes. Note that some of the memory bytes in the diagram might not be used by the program. Use base ten or hexadecimal format for numbers, whichever is more convenient for any particular number. Use?? to indicate that there is no way to determine the value of a number. GPR values, third time at point one register $a $t9 $s $s $sp STACK data saved before main was called byte offset value Memory, third time at point one..data higher addresses x_4 x_ char src[ ] = "2/3:5a9"; int is_digit(int c) { int result = ; if (c >= 48 && c < 58) result = ; // POINT ONE return result; void keepd(char *d, const char *s) { int c; do { c = *s; if (c == is_digit(c)) { *d = c; d++; s++; while (c!= ); int main(void) { char buf[8]; keepd(buf, src); return ;.text.globl is_digit is_digit: addiu $t9, $zero, slti $t, $a, 48 bne $t, $zero, L slti $t, $a, 58 beq $t, $zero, L addiu $t9, $zero, L: # POINT ONE addu jr $v, $t9, $zero $ra.globl keepd keepd: addiu $sp, $sp, -6 sw $ra, 2($sp) sw $s2, 8($sp) sw $s, 4($sp) sw $s, ($sp) addu $s, $a, $zero addu $s, $a, $zero L2: lbu $s2, ($s) beq $s2, $zero, L3 addu $a, $s2, $zero jal is_digit beq $v, $zero, L4 L3: sb $s2, ($s) addiu $s, $s, L4: addiu $s, $s, bne $s2, $zero, L2 lw $s, ($sp) lw $s, 4($sp) lw $s2, 8($sp) lw $ra, 2($sp) addiu $sp, $sp, 6 jr $ra.globl main main: addiu $sp, $sp, -6 sw $ra, 2($sp) addiu $a, $sp, la $a, src jal keepd addiu $v, $zero, lw $ra, 2($sp) addiu $sp, $sp, 6 jr $ra Some more useful ASCII codes: 47 for /, 58 for :, and 97 for a.

7 ENCM 369 Winter 26 Final Examination (with corrections) page 7 of 9 PROBLEM 6 (total of 2 marks). This is an equation for the capacity of an N-way set-associative cache, where S is the number of sets in the cache: C = S N words per block bytes per word. The equation will be useful for part a of this problem. Part a. (4 marks.) Suppose a computer design has 32-bit words and 32-bit addresses. The data cache for this computer is 4-way set-associative with a capacity of 6 kilobytes, and has 6-word blocks. Show how, for access to this cache, a memory address would be split into block offset, byte offset, set bits, and search tag. Be sure to indicate clearly how many bits are in each part of the address. Part b. (3 marks.) Suppose there is a miss in an attempt to read from the cache of part a, using memory address x_23d8. How many words must be copied into the cache, and what are their addresses? (If there are a lot of words, you can use... to avoid writing a long list of addresses, as long as you re clear about the lowest and highest addresses.) Part c. (3 marks.) Suppose that the loop below is on run the system of part a, and that a is of type double*, and that a double occupies 64 bits (two words) of memory. Give a precise estimate of the worst-case number of data cache misses that could occur as the loop runs. State any assumptions you have to make to solve the problem. for (i = ; i < ; i++) sum += a[i]; Part d. (2 marks.) Each block in a writeback data cache has a so-called dirty bit, or D-bit. When would a write hit in such a cache cause a D-bit to change value, and when would a write hit in such a cache not change any D-bit values?

8 ENCM 369 Winter 26 Final Examination (with corrections) page 8 of 9 PROBLEM 7 (total of marks). All parts of this problem concern a MIPS-based computer with virtual memory, for which physical addresses and virtual addresses are 32 bits wide. The page size is 4 KB = 496 bytes. For parts a and b, assume that a process has been running for a while on this computer and at a certain instant in time the TLBs for the computer and the page table for the process are in this state: instruction TLB VPN valid PPN x44 x27 x4 x9db7 x4 x9db6 x4 x2 x4 x8555 x42 x8888 data TLB VPN valid PPN x7ffff x8ff8 x x2c76 x7fffe x2aab x x9fed x2 x9654 x4 x8eac page table VPN valid PPN / disk info x4 x9876 x4 x2 x42 x8888 x x93 x x9fed x2 [disk info] x7fffe x2aab x7ffff x8ff8 At the given instant in time, the value of $s is x_ff8, the PC value is x4_664, and the PC points to this instruction: lw $t, 6($s) Part a. (3 marks.) Does the instruction fetch for the lw result in a TLB hit or a TLB miss? Give a reason for your answer. What physical address will be used to fetch the instruction? Part b. (3 marks.) Does the data read for the lw result in a TLB hit or a TLB miss? Give a reason for your answer. What physical address will be used for the data write read? Part c. (3 marks.) Suppose that the following simple loop runs to completion without any context switches or page faults: addiu $t8, $zero, 35 L: sw $zero, ($t9) addiu $t8, $t8, - addiu $t9, $t9, 4 beq bne $t8, $zero, L nop The sw instruction will be executed 35 times. Explain why the worst-case number of D-TLB misses caused by the sw instruction is 5. Part d. ( mark.) Briefly explain why the assumption of no context switches or page faults matters in part c.

9 ENCM 369 Winter 26 Final Examination (with corrections) page 9 of 9 PROBLEM 8 (total of marks) Questions on miscellaneous course topics. Part a. (2 marks.) The four tools in the toolchain used for C programming are the preprocessor, the compiler, the assembler and the linker. Briefly describe what the role of the linker is. Be sure to mention two different kinds of input file and one kind of output file. Part b. (2 marks.) Translation unit is the name for a kind of file used in the C toolchain. What are the contents of a translation unit, and which tools have a translation unit as input or output? Part c. (3 marks.) Suppose that $s is used for j, $s is used for k, and $s2 is used for m, and that the type of all three variables is int. Write an efficient MARS translation of the given C statements. Translate only the statements don t include any prologue or epilogue code. Use whatever t-registers you need for intermediate results. j = m / 37; k = m % 37; Part d. (4 marks.) Suppose that $f2 is used for x and $f22 is used for b, and that the type of both variables is double. Write a MARS translation of the given C statement. Translate only the statement don t include any prologue or epilogue code. For intermediate results, use whatever t-registers you need, plus any of $f2, $f4,..., $f. (Hint: Look up neg.d in the Reference Material.) if (x < -b) x = -b; else if (b < x) x = b;

Winter 2009 FINAL EXAMINATION Location: Engineering A Block, Room 201 Saturday, April 25 noon to 3:00pm

University of Calgary Department of Electrical and Computer Engineering ENCM 369: Computer Organization Lecture Instructors: S. A. Norman (L01), N. R. Bartley (L02) Winter 2009 FINAL EXAMINATION Location: