CSE 2021: Computer Organization

Transcription

1 CSE 2021: Computer Organization Lecture-5 Code Translation-3 Heap, Storage options, Addressing modes, Concurrent data access, Linking & loading Shakil M. Khan (adapted from Prof. Roumani)

2 So Far Registers ($s0 - $s7, $t0 - $t9, $zero) Arithmetic and logical instructions (add, sub, mult, div, slt, sll, srl, sra, the i/u/v suffix) Jump and branch (j, beq, bne) Load and store (lb, lh, lw, sb, sw, sh, the u suffix) I/O (syscall) MIPS instruction formats (R-type, I-type, J-type) Static attributes and.data (directives:.byte,.half,.word,.ascii,.asciiz,.space),.text Procedures (jal, jr, $v0 - $v1, $a0 - $a3, $ra) Stack ($sp, $fp) lui, mfhi, mflo, Some pseudo-instructions (la, mul, ) CSE-2021 June

3 Assumptions for Phase III None! We need to be able to accommodate non-static Attributes (storage allocated on the heap) Multi-Class Applications (multiple classes loaded and linked) CSE-2021 June

4 Global Symbols.globl sym declares that label sym is global can be referenced from other files Example (see sum.s and summain.s) File 1: File 2:.globl sum.globl x.text.data main: #$s0=input an integer # add $a0, $0, $s0 x:.ascii Result: jal sum.text #print x sum: #$v0=sum 0 to $a0 #print $v0 jr $ra CSE-2021 June

5 Heap Usage To allocate four bytes on the heap:.text main: addi $a0, $0, 4 addi $v0, $0, 9 syscall sw $s0, 0($v0) # heap store lw $s0, 0($v0) # heap load CSE-2021 June

6 Memory Map (4MB) (252MB) (64KB) reserved.text.data heap $gp $sp 7fff fffc stack $fp CSE-2021 June

7 Review: Data Storage Options Registers Data segment Stack Heap DRAM Disk / SSD CSE-2021 June

8 Exercise For each data storage option, determine: its latency, i.e. time to retrieve one byte (in seconds) its typical size (in bytes) the lifetime of its content what is it used for in Java / C how to allocate storage in it how to transfer data to/from it CSE-2021 June

9 Data Storage Options: Registers Very Fast (latency ~1 nsec) DRAM ~100 nsec disk ~1 msec = 1,000,000 nsec Very few general-purpose registers (< 25) Each has a bit width of 32 or 64 Must spill to DRAM on method calls Suitable for storing intermediate work only All computations in RISC operate on registers only (e.g. you cannot add to memory directly) all programs must therefore use registers after fetching data from DRAM CSE-2021 June

10 Data Storage Options: Data Segment AKA Static Storage Implemented via.data Size fixed at program time cannot grow/shrink Lifetime = duration of Program Java: used for static attributes C: used for static variables and fixed-size arrays/strings CSE-2021 June

11 Data Storage Options: Stack Segment AKA Automatic Storage Implemented via $sp, $fp Size can change but only in a LIFO manner Lifetime = duration of Method Used for local variables, ones defined within methods in Java or functions in C CSE-2021 June

12 Data Storage Options: Heap Segment AKA Dynamic Storage Implemented via syscall#9 Size can change in any manner Lifetime is program-controlled Java: used for objects (via new) and is automanaged by a garbage collector C: used for any data (via malloc) and is manually managed (mismanaged ) by the programmer CSE-2021 June

13 Data Storage Options: Disk AKA Secondary Storage Implemented via syscalls (open, read, write) Size is practically unlimited Lifetime is permanent (beyond program) *Used to persist data in files *Data is fetched from files to DRAM via syscalls and then to registers via loads *The reverse (register-to-dram) is done via stores CSE-2021 June

14 MIPS Addressing Modes (branches) Addressing in branches why absolute addressing fails? compression #1: count in words compression #2: PC-relative (thus signed) Last resort: reverse the condition (see branching far away) op rs rt constant or address 6 bits 5 bits 5 bits 16 bits CSE-2021 June

15 Branch Addressing Branch instructions specify opcode, two registers, target address Most branch targets are near branch forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative addressing target address = PC + offset 4 PC already incremented by 4 by this time CSE-2021 June

16 Branching Far Away If branch target is too far to encode with 16-bit offset, assembler rewrites the code as a jump Example beq $s0,$s1, L1 bne $s0,$s1, L2 j L1 L2: CSE-2021 June

17 Encoding Jumps Addressing in jumps why absolute addressing fails? compression #1: count in words compression #2: invent a new format (J-type) compression #3: borrow 4-bits from PC limit on code size 26 bits = 64 MW = 256 MB op address 6 bits 26 bits CSE-2021 June

18 Jump Addressing Jump (j and jal) targets could be anywhere in text segment encode full address in instruction op address 6 bits 26 bits (Pseudo)Direct jump addressing target address = PC[31 28] : (address 4) CSE-2021 June

19 Target Addressing Example Loop code example assume Loop at location Loop: sll $t1, $s3, add $t1, $t1, $s lw $t0, 0($t1) bne $t0, $s5, Exit addi $s3, $s3, j Loop Exit: CSE-2021 June

20 Addressing Mode Summary CSE-2021 June

21 Concurrent Data Access: The Dining Philosophers wikipedia.org CSE-2021 June

22 Concurrent Data Access: The Problems Deadlock Livelock resource starvation Two processors sharing an area of memory P1 writes, then P2 reads data race if P1 and P2 don t synchronize result depends of order of accesses CSE-2021 June

23 Synchronization The Solution Use a semaphore to place a lock Hardware support required need an atomic read/write memory operation no other access to the location allowed between the read and write Could be a single instruction e.g., atomic swap of register memory or an atomic pair of instructions Cannot read and write in the same cycle in MIPS so use a linked load with a conditional store CSE-2021 June

24 Synchronization in MIPS Load linked: ll rt, offset(rs) Store conditional: sc rt, offset(rs) succeeds if location not changed since the ll returns 1 in rt fails if location is changed returns 0 in rt Example: atomic swap (to test/set lock variable) try: add $t0,$zero,$s4 #copy exchange value ll $t1,0($s1) #load linked sc $t0,0($s1) #store conditional beq $t0,$zero,try #branch store fails add $s4,$zero,$t1 #put load value in $s4 CSE-2021 June

25 Example # thread-safe (synchronized) balance withdrawal.text # $s0 = address of a/c balance # $s1 = withdrawal amount try: ll $t1, 0($s0) # load link the balance sub $t1, $t1, $s1 # adjust it sc $t1, 0($s0) # store it back conditionally beq $t0, $0, try # did it work? CSE-2021 June

26 Translation and Startup Many compilers produce object modules directly Static linking CSE-2021 June

27 Producing an Object Module Assembler (or compiler) translates program into machine instructions Provides information for building a complete program from the pieces Header: described contents of object module Text segment: translated instructions Static data segment: data allocated for the life of the program Relocation info: for contents that depend on absolute location of loaded program Symbol table: global definitions and external refs Debug info: for associating with source code CSE-2021 June

28 Linking Object Modules Why linker (AKA link editor)? Steps for linker 1. merges segments 2. resolve labels (determine their addresses) 3. patch location-dependent and external refs Produces an executable image same format as object files, but contains no unresolved references CSE-2021 June

29 Loading a Program Load from image file on disk into memory 1. read header to determine segment sizes 2. create virtual address space 3. copy text and initialized data into memory or set page table entries so they can be faulted in 4. set up arguments on stack 5. initialize registers (including $sp, $fp, $gp) 6. jump to startup routine copies arguments to $a0, and calls main when main returns, do exit syscall CSE-2021 June

30 Dynamic Linking Only link/load library procedure when it is called requires procedure code to be relocatable avoids image bloat caused by static linking of all (transitively) referenced libraries automatically picks up new library versions CSE-2021 June

31 Lazy Linkage Indirection table Stub: Loads routine ID, Jump to linker/loader Linker/loader code Dynamically mapped code CSE-2021 June

32 Starting Java Applications Simple portable instruction set for the JVM Compiles bytecodes of hot methods into native code for host machine Interprets bytecodes CSE-2021 June