ECE-6170 Embedded Systems Laboratory Exercise 3

Transcription

1 ECE-6170 Embedded Systems Laboratory Exercise 3 The purpose of this exercise is to learn how to connect simple input and output devices to an FPGA chip and use the Nios II processor to interface with parallel input/outputs ports. We will use the switches, SW17 0, and buttons Key0-3 as inputs to the circuit. We will use light emitting diodes (LEDs) and the LCD as output devices. Part I Implement a circuit that connects inputs and outputs as follows: 1. Create a new project (hello_pio_<your name>) which will be used to implement the desired circuits on the Altera DE2 board. Do not include spaces in the project name. The project should be stored under the subdirectory C:\ESDL\6170\ 2. Use the SOPC tool to generate the circuit components. When asked about the system name, use the name cpu_io and use Verilog HDL type for file generator. The circuit should include at least the following components (rename components exactly as shown in Figure 1, this is to be consistent with software components you will add later): cpu: One NiosII processor (chose option /f, level 1 debug). sdram: SDRAM interface (chose 16 bits per word, keep the other options as default, make a note of the resulting memory size in your report). Use Single NEC D A80 Chip (64 Mbx16). Note that its total size is 8MByte. timer: Timer (default settings). lcd: LCD controller interface (default settings). led_green_pio:8 green LED interfaces (output only). led_red_pio: 18 red LED interfaces (output only). switch_pio: 18 Toggle switch interfaces (input only). button_pio: 4 Push buttons (chose both synchronously capture (Falling edge) and Generate IRQ(Edge) options) as shown in Figure 2. 3-Make sure the target board is as shown in Figure 1.

2 Figure 1. SOPC layout of the FPGA components 4-Watch the system connections as you add the circuit components. The cpu is automatically connected properly with through an Altera Avalon bus to the system components. 5-Watch and record what happens to the base address columns as you add components. Analyze the range of Base, End for the SDRAM interface. Document it in your report. Also take a note of what happens when you use the menu command Auto-Assign Base Addresses under the System command menu.

3 Figure 2. Button PIO settings 6. Assign both the reset vector and the exception vector of the cpu component to sdram as shown in Figure 3. Figure 3. CPU component setting

4 7. Generate the system using the Generate button. You will need to include the system in your project, before you compile the project. 8. Include in your project the DE2_IO.v, SDRAM_PLL.v, AUDIO_PLL.v and Reset_Delay.v by copying these files to the Quartus project, and making the DE2_IO.v the top level entry. Go to the Files tab in the project navigator. Right click the DE2_IO.v and make it the top-level entity. The main function of this file is to instantiate the system named cpu_io and connect it to the board signals. Edit the file if needed. Note that part of the file is the Phase locked Loop module, which properly assigns clock signals to the SDRAM, as a -3 ns phase shift. For more details about the SDRAM_PLL check the description of its Verilog file. 9. Assign the pins on the FPGA to connect to the switches and LEDs, as indicated in the User Manual for the DE2 board. You can also import the comma separated value format of the pin assignments using the file DE2_pin_assignements.csv. Use the menu command Assignments>>Import Assignments. 10. Compile the project. This process is time consuming, so watch your progress bar. Download the compiled circuit into the FPGA chip after compilation is done. Document the success of the project in your report. Review Exercise 1 if you need to know how to compile a project or download it to a target FPGA. Needed files: Attached under \HW DE2_IO.v SDRAM_PLL.v AUDIO_PLL.v Reset_Delay.v DE2_pin_assignements.csv

5 Part II Using Nios II IDE Add to your circuit the software component, download to the SDRAM, and launch the application: 1. Run the Altera Nios II IDE tool, browse for your workspace. This should be the project directory. 2. Generate a blank project using File>>New>>C/C++ Application. Note that the tool generates source file and library directories. Name the project Test_pio_1 3. Copy to the project s source file directory these files basic_io.h, LCD.c, LCD.h and Test_pio.c 4. Right click in the C/C++ Projects panel on the source file subdirectory and chose Refresh. The project files are updated. 5. Double click the test_pio.c, and the file opens. 6. Spend some time studying the main file (test_pio.c). A copy is attached. 7. Note that we designed buttons such that their interfaces require interrupt requests. See how it is handled in software. 8. Compile the project and run using the menu command Run>>Run As>>Nios II Hardware 9. Record what happens with LED displays. Change the switch settings and run again. 10. Record what happens to the LCD. Change the display to other messages of your choice. 11. What happens when you push a button? 12. What is the advantage of the interrupt handling routine? 13. Change button timers and note the effects. How do you disable button 4? 14. Submit a report about your lab experience. Give a brief description about your understanding of the software functions above. Report is due a week after your exercise date. Needed files: (Attached under \SW basic_io.h, LCD.c, LCD.h Test_pio.c If you are not sure how to proceed, check the file demo.rtf for subsequent screens. The file is also attached in the zip file under \demo Best wishes Dr. Elkeelany

6 // #include "basic_io.h" #include "LCD.h" #define WELCOME_TIME // delay in micro sec #define BUTTON_STOP_TIME // delay in micro sec #define BUTTON_INT_MASK 0xF // enable all KEYs(3,2,1,0) #define LED_GREEN_VALUE 0x10F #define LED_RED_VALUE 0x3F0F0 void handle_button_interrupts() { int button_data=get_pio_edge_cap(button_pio_base);//1,2,4 or 8 outport(led_green_pio_base,button_data); set_pio_edge_cap(button_pio_base,0x0);//clear data, before exit usleep(button_stop_time);//enforce delay outport(led_green_pio_base,led_green_value);//back to default value } void init_button_irq() { /* Enable all 4 button interrupts. */ set_pio_irq_mask (BUTTON_PIO_BASE,BUTTON_INT_MASK); /* reset the edge capture register. */ set_pio_edge_cap (BUTTON_PIO_BASE,0X0); /* Register the interrupt handler. */ alt_irq_register (BUTTON_PIO_IRQ,NULL,(void *) handle_button_interrupts); } // int main(void) { //Show LCD Test LCD_Test(); usleep(welcome_time); printf("pio LEDs and SWs!\n"); //17 characters roll printf("=.=.=.=.=.=.=.=."); //16 characters don t! // Get SW data int swdata; swdata=inport(switch_pio_base); // Refresh LED outport(led_green_pio_base,led_green_value); outport(led_red_pio_base,swdata); init_button_irq(); return 0; } //