A 65 nm Design Tape-Out in 6 Weeks

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1 A 65 nm Design Tape-Out in 6 Weeks Andreas Olofsson and Roman Trogan Adapteva. S San Jose, CA March 10, 2010.

2 Project Description Design: Multi-million gate ASIC with > 50 hard macros and hundreds of high speed IO 65nm high speed process node with 9 metal layers Very aggressive frequency and power targets Flow: An all Magma tools flow from RTL to GDS Resources: 1 engineer for RTL, DV, Synthesis, and Layout, Analysis, and Tape-out Schedule: 6 weeks from tool purchase order to tapeout TALUS DESIGN TALUS VORTEX TALUS ANALYSIS QUARTZ DRC/LVS TAPEOUT 2

3 Decisions, decisions, decisions... FLAT Advantages: Easy floor-planning Less work? Smaller chip area? Great for junk collection Disadvantages: Tool capacity!!! Slooooow iterations!!! HIERARCHICAL Advantages: Determinism Super fast iterations Scalable Disadvantages: More work? Tedious floor-planning Tool support? 3

4 More decisions... TFM Advantages: Quick rampup time Magma supported Disadvantages: Abstraction Black-box dilemma Fix turnaround time Homegrown Advantages: Customization Disadvantages: Higher risk Longer rampup time!! 4

5 5

6 Tiled Flow Lesson #1 Lesson: For symmetrical architectures tiled hierarchical flows work beautifully (hint..design with symmetry) One symmetrical core block: Small and manageable blocks The key was careful pin planning High utilization Aggressive timing constraints Correct by design block to block communication 6

7 You can't scale without symmetry!! 7

8 Tiled Flow Lesson #2 Lesson: Know when to flatten design and when to use hierarchical design techniques Mistake: Trying to connect everything by abutment Hierarchical not ideal for asymmetric blocks with hedgehog interfaces (i.e IO) Blocks with 50:1 aspect ratio should be flattened! Next time: A little flatter... BLOCKA 8 PIN_MATCH BLOCKB

9 Tiled Flow Lesson #3 Lesson: Don't fight the tools! Tool limitations: TALUS wouldn't connect our tieoffs correctly now matter how hard we tried Short point to point routing that wasn't on grid was a disaster. Solution: Simple tcl scripts for point to point routing 9

10 TFM and Quartz Report Cards TFM Very fast rampup time Outstanding support! Pretty buggy initially..but probably not as buggy as my code would have been Nice use of a single file for most setup variables Very flexible Needs to be more transparent Quartz LVS/DRC Runsets not available at start Verification run time not an issue for our design Fantastic Magma support! Direct Calibre deck read successful by tapeout time DRC/LVS error correlation with independent foundry verification 10

11 Summary Tiled hierarchical design flows are here to stay! Successful tapeout of multi-million gate SOC within 6 weeks of becoming a MAGMA customer 2 weeks from new floor-plan to GDS-clean 12 hour design cycle from RTL change to GDS clean The TALUS RTL to GDS flow offers the most complete implementation and most efficient flow this engineering has team has seen to date from any vendor. Don't buy the hype. With the right people and tools SOCs don't have to cost $75M. 11

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