On Multicast Scheduling and Routing in Multistage Clos Networks

Transcription

1 O Multicast Schedulig ad Routig i Multistage Clos Networks Bi Tag Departmet of Computer Sciece Stoy Brook Uiversity Stoy Brook, NY 794 bitag@cs.suysb.edu Abstract Multicast commuicatio, which ivolves trasmittig iformatio from oe ode to multiple odes, is a vital operatio i both broadbad itegrated services digital etworks (BISDN) ad scalable parallel computers. Amog differet multicast switchig etworks, much work has bee cetered aroud the crossbar switches due to the simplicity of implemetatio. However, crossbars have the maximum umber of crosspoits ad implemetatio complexity amog all switchig fabrics. Multistage itercoect etworks (MINs) such as Clos etworks have attracted may attetios i recet years due to the o-blockig property as the crossbars, while at the same time possessig may advatages over crossbars. However, o multicast schedulig ad routig algorithm have bee applied to Clos etwork. This paper explores this aspect we study some existig multicast schedulig ad routig algorithms ad apply them to Clos etworks. Moreover, we propose two packet schedulig strategies to improve the system performace i terms of switch blockig probability ad throughput, as show by simulatios. Itroductio Multicast commuicatio, which ivolves trasmittig iformatio from oe ode to multiple odes, is a vital operatio i both broadbad itegrated services digital etworks (BISDN) ad scalable parallel computers. It has become a importat fuctioality of curret switchig etwork due to its may real-time applicatios such as video coferece calls ad video-o-demad services. O the other had, Asychroous Trasfer Mode (ATM) is the most widely studies ad implemeted form of high speed etwork. To implemet fast multicast switchig ATM etworks, three importat issues have to be solved. First, there are usually more tha oe packets destied for the same output at the same time ad thus results i output port cotetio. This problem ca be solved by placig queues at iput ports, iteral switchig fabric, or output ports of the switches. Secod, efficiet schedulig algorithm is eeded to coordiate coflictig packets with the same destiatio output ports. Third, efficiet routig algorithm is eeded so that the switchig fabric ca trasmits the packets to their destied output ports followig the routig cotrol algorithm. I this paper, we discuss the schedulig ad routig aspects of the switchig etworks. How to switch multicast traffic from iput ports to output ports have a direct effect o may etwork characteristics icludig badwidth utilizatio, packet delay ad Quality of Service (QoS) provisioig. I literatures, various kids of multicast switchig systems have bee studied. They iclude oe-shot scheme [5], cell splittig scheme [4], residue cocetratio scheme [7], widow-based scheme [8] etc. However, most of the research work of multicast schedulig ad routig desig are cetered aroud crossbar switches. Clos-type etworks have bee extesively studied for both oe-to-oe commuicatio ad multicast commuicatio i the literatures [6, 5, 3,, ]. To the best of our kowledge, o multicast schedulig ad routig algorithm has bee implemeted o Clos etworks, which have may advatages over crossbars. I this paper, we will discuss the algorithm desig ad aalysis i this regard. Figure is the schematic of the multicastig switch we proposed. The rest of the paper is orgaized as follows. I sectio, we give a overview of the related work. Sectio 3 discusses the architectures of the curret ATM switchig etworks, emphasizig crossbar switches ad Clos etworks. Sectio 4 presets a existig multicast schedulig algorithm ad discuss the reaso why we choose it to apply to the Clos etworks. Sectio 5 shows our proposed algorithms ad the simulatio results, alog with aalysis ad discussio. Sectio 6 cocludes the paper ad proposes some ope research problems. N- N Iput Queues Multicast Schedulig Algorithm Clos Network Figure : Schematic of the multicastig switch N- N

2 Related Work A growig part of traffic o the Iteret is multicast, with users distributig a wide variety of audio ad video materials. This dramatic chage i the use of the Iteret has bee facilitated by the MBONE [6, 8, 7]. It is ievitable that the volume of multicast traffic will cotiue to grow. There are may work doe to make high speed etwork switches be able to hadle multicast [9,, 0, 4,, 3]. For each multicastig cell, the set of its destiatio output ports is called faout. The cardiality of a faout refers to the umber of the destiatio output ports i the set. Based o how to satisfy the faout, there are two multicastig service disciplies. Oe is full multicast or oe-shot multicast, i which all copies of the same packet must be switched at the same time slot. This ca easily result i head of lie (HOL) blockig [3]. The other disciplie is called partial multicast or faout splittig disciplie. I this case, copies geerated by the same iput packet may gai access to output ports over ay umber of slots util all of the copies are trasmitted. This disciplie is work coservig ad has better performace tha full multicast, which is simpler to implemet. Agai, there is a performaceimplemetatio tradeoff betwee these two disciplies. The mai obstacle of multicast schedulig algorithms is output port cotetio, which happes whe there are more tha oe cells destied to the same output port at the same time. So it is importat to schedule the cells before they get switched by the switchig fabric. This idea of preschedulig is the mai tred of the curret multicastig algorithm desig. It has bee observed that may multicastig algorithms have bee implemeted i hardware. For example, Chao et al. proposed two of the most recet multicastig switches Multicast output buffered ATM switch (MOBAS) ad Abacus switch [, 3]. I both cases, fairly complicated architectures ad compoets are ivolved to accommodate the fuctioality of multicastig. We observe that while it ca be temptig to throw hardware to improve switch performace, that strategy maybe couter-productive i practice, sice more complicated solutios ca be very difficult to implemet at high speed. Furthermore, specific hardware does ot reflect ad help developig geeral schedulig algorithms. Based o above cosideratios, we oly discuss the multicastig algorithms which are idepedet of the architectures udereath. Che et al. [5] proposed the cyclic priority (CP) Reservatio schedulig algorithm, which utilize a toke to idicate the priority of the iput ports ad the availability of the output ports. However, the techique of CP reservatio is somewhat iefficiet due to its determiacy, which meas there is o adaptability to particular icomig traffic. A eural-etwork-based cotetio resolutio mechaism was proposed i the same paper to improve the performace of above CP reservatio algorithm. It basically costructs a eergy fuctio i which the most stable state of the eural etwork correspods to the cotetio-free traffic combiatio ad maximized throughput. Although the NN scheme provides certai improvemet, it seems that the delay-performace advatage is ot great eough to overrule the simplicity of implemetatio of the CC scheme. McKeow et al. [7] proposed a series of ew algorithms cocetratio, TATRA ad weight based algorithm to schedule the multicastig cells for iput ports. Because they are easy to implemet ad produce good simulatio results, they have draw may attetios sice their publicatio. Several proposals based o them are published [, 0]. We also target oe of the algorithms TATRA. 3 Overview of ATM Switchig Networks Multicastig is required i implemetig multimedia applicatios like audio ad video coferecig. These real-time applicatios require a costat flow of data because large jitter ca have a egative impact o the quality of the video ad audio. New techologies like Asychroous Trasfer Mode (ATM) are likely to have low jitter due to the use of optical fibers as the trasport media. However, the real advatage of ATM is its fixed-sized packet cell. Cell is very helpful to build fast ad highly scalable switches for the followig reasos: it is easier to build hardware to process packets whe their sizes are already kow. may switchig elemets (SEs) ca do the same thig i parallel whe all packets are of the same legth. This parallelism greatly improves the scalability of switch desigs. Throughout the survey we will use cell ad packet iterchageably sice most of the work doe falls ito fixedlegth packet multicast switchig. I this paper, we use the followig three metrics to evaluate the performace of a switchig etwork: Throughput, which is the average umber of packets trasmitted by the switch per time slot, or it ca be ormalized by the umber of packets arrived at the switch i uit time. Cell delay, which is the time lapse from the poit the packet eters the switch to the poit it leaves. Blockig probability, which is the ratio betwee the umber of packets blocked i the switch ad the umber of all the packets arrivig at the iput ports. Besides these three metrics, fairess, implemetatio complexity ad scalability should also be take ito cosideratio whe comparig differet architectures ad schedulig algorithms.

3 Crosspoit switch Iput Stage Middle Stage Output Stage Iput ports Cross State Iputs Outputs Bar State r m r Output ports Figure : Schematic of a 4 x 4 Crossbar etwork x m r x r m x Figure 3: A geeral schematic of a v(m,,r) etwork 3. Crossbar Switches I geeral, multicast ATM switches ca be build from three basics fabrics: crossbar etwork with Kockout switch as its represetative, self-routig etwork with Baya etwork as its represetative, ad Clos etwork. The followig three subsectios will cover them oe by oe. Crossbar switches are coceptually very simple every iput port is coected to every output port ad forms a grid of switchig elemets (SEs). A N N crossbar switch has N crosspoits. Each crosspoit has two possible states: cross ad bar. A coectio betwee iput port i ad output port j is established by settig the (i, j)th crosspoit switch to the bar state ad other crosspoits alog the route remai the cross state. A 4 4 crossbar switch is show i Figure. There are several advatages of crossbars. First, they are simple structures ad easy to implemet. Secod, they have atural multicast property. Third, they are itrisically o-blockig (i.e. a path is always available to coect a idle iput port to a idle output port). As the result, the early uicast ad multicast switches adopt crossbars as the switchig fabric. Kockout switch is such a example. However, high hardware complexity(n ) makes crossbars oly be suitable for fast switches with moderate size. 3. Multistage Itercoectio Networks (MINs) MINs coect iput ports to output ports through a umber of switch stages, where each switch could be a crossbar etwork or a MIN. The aim of MINs is to avoid the high hardware complexity of crossbar etworks ad achieve the oblockig capability at the same time. Two typical MINs: self-routig switches ad Clos etworks are to be examied i detail: 3.. Self-Routig Switches The geeral priciple behid self-routig fabrics is that each packet has eough iformatio i its header, so each switch stage ca make the routig decisio based o that. This ca be doe by havig the iput port add a extra header to the packet before it arrives at the fabric, ad the havig the output port remove this header before the packet leaves the switchig etwork. This header is called a self-routig header. The advatages of self-routig switches are:. There is o cetral cotrol mechaism eeded for routig cells.. Several cells o differet paths ca be processed simultaeously. 3. The modular ad recursive structure makes it possible to build large-scale switches. 3.. Clos Networks Clos etworks are oe kid of MINs with oly three stages [6]. A geeral schematic of a v(m,, r) Clos etwork is show i Figure 3. A three-stage Clos etwork with N iput ports ad N output ports has r switch modules of size m i iput stage, m switch modules of size r r i middle stage, ad r switch modules of size m i output stage. Clos etworks provide more tha oe path from oe iput port to oe output port ad thus there are less iteral coflicts iside Clos etwork. Clos etwork provides more reliability tha crossbars based o the same reaso. Hardware Complexity. I geeral, the etwork cost of such multistage etworks is measured by the umber of crosspoits i the etworks. A a b switch module has ab crosspoits. The total umber of crosspoits of v(m, m, r) etwork equals rm + mr + rm = m(r + r ) = m(n + r ) For fixed N ad r, the etwork cost is proportioal to the umber of middle stage switches m. The iterest of 3

4 research is to reduce the umber of middle switches to yield lower cost, while ot causig blockig i the etwork. Yag et al. [] preset results that lead to the curretly best kow explicit costructios of oblockig broadcast switchig Clos etworks. It employs a routig cotrol strategy ad shows for multicastig etworks to be oblockig, there is a improvemet of the miimum umber of middle switches from O(r) to O(logr/loglogr). We will examie it i more detail later. 4 TATRA Multicast Schedulig Algorithms For each iput cell destied to multiple output ports, each of the copy is defied as a output cell. Whe output cotetio occurs, the set of all output cells that lose cotetio is called residue. McKeow et al. propose the selectio of where to place the residue uiquely defies the schedulig algorithm. I order to achieve high throughput, the residue should be cocetrated ito as few iputs as possible so that it is more likely ew cells ca be forwarded as HOL cells ad be switched earlier. The detailed descriptio of the algorithm is i [7]. 5 Experimet Simulatio Crossbars have such advatages as oblockig ad modular ad easy to implemet. However, it also has a very serious drawback. The implemetatio complexity of a N-port crossbar switch icreases with N, makig crossbars impractical for systems with a very large umber of ports. It is the case that owadays, the majority of highperformace switches ad routers have oly a relatively small umber of ports (usually betwee 8 ad 3). However, i the future, whe switches ad routers with large aggregate badwidth become reality, the crossbar switches will o loger be suitable. The Clos etwork structure demostrates that strictly oblockig multistage switchig etworks could be desiged at a cosiderable savigs i switchig costs as compared to other alteratives [6]. We also believe Clos etwork will come to play a sigificat role for the switchig techology due to its scalability. To the best of our kowledge, most of the multicast schedulig algorithms are based o crossbars. We hereby apply above TATRA algorithm to Clos etwork ad ivestigate the performace of TATRA uder the coditio of weak Clos etworks, which meas the umber of middle stages of Clos etwork is small. We will the preset two local strategies to improve the blockig probability ad throughput of the Clos etwork. We will make use of the liear routig cotrol algorithm proposed by Yag et al. []. 5. A Routig Cotrol Algorithm i Clos Networks Figure 3 is a schematic of Clos etwork. The most iterestig property of the Clos etwork is its path diversity. Sice the etwork has exactly oe lik betwee every two switch modules i its cosecutive stages, for a Clos etwork with m middle switches, there are m routes from ay iput a to ay output b, oe through each middle stage switch. We also assume that every switch i the etwork has multicast capability, that is, each idle iput lik of a switch ca be simultaeously coected to ay subset of idle output liks of the switch. Sice output stage switches i a v(m,, r) etwork have multicast capability, a multicast coectio ca be described i terms of coectios betwee a iput port ad its correspodig output stage switches. The umber of output stage switches i a multicast coectio is referred to as the faout of the multicast coectio. Let O deote the set of all output stage switches. Based o the structure of the v(m,, r) etwork, we have O = {,,..., r}. First of all, we eed the followig defiitios to characterize the v(m,, r) etwork: To characterize a multicast coectio, we defie the coectio request I i for each iput port i {,..., r} as the subset of the switch modules i the output stage to which i is to be coected i the coectio. It is obvious that I i O = {,,..., r}. To characterize the coectio state betwee the iput stage ad middle stage i a v(m,, r) etwork, for ay iput port i {,..., r}, we refer to the set of middle switches with curretly uused liks to the iput switch associated with iput port i as the available middle switches. To characterize the state of the m switch modules i the middle stage of a three-stage switchig etwork, let M j O = {,..., r}, j = {,,..., m} deote the subset of the switch modules i the output stage to which the middle stage switch j is providig coectio paths from the iput ports. We will refer to the sets M j as the destiatio sets of the middle switches. The etwork cotroller of a Clos-type etwork executes a etwork routig cotrol algorithm to establish coectio path betwee iput ad output ports. Sice the etwork has exactly oe lik betwee every two switch modules i its cosecutive stages, fidig coectio path betwee iput ad output ports is equivalet to fidig the appropriate middle switch. As discussed i [], a routig cotrol strategy plays a importat role i reducig the ouiformity of multicast coectios ad, i tur, reducig the blockig probability of the v(m,, r) multicast etwork. [4] proposed seve differet routig cotrol strategies, amog which the smallest relative cardiality strategy leads to the lowest blockig probability for a v(m,, r) etwork with a much smaller m tha the oblockig coditio. We are goig to utilize this strategy i our algorithm ad here we describe it agai: 4

5 Smallest Relative Cardiality Strategy: Choose a middle switch whose destiatio set has the smallest cardiality with respect to the coectio request (that is, first itersect the coectio request with the destiatio sets ad the choose the smallest cardiality). [4] shows a geeric algorithm for routig i a v(m,, r) multicast etwork as follows:. If there are o available middle switches for the curret coectio request, the exit without makig the coectio; otherwise go to Step.. Choose a ofull middle switch (i.e., a middle switch with at least oe idle output lik) amog the available middle switches for the coectio request accordig to smallest relative cardiality strategy. If o such middle switch exists, the exit without makig the coectio. 3. Realize as large as possible portio of the coectio request i the middle switch chose i Step. 4. Update the coectio request by discardig the portio that is satisfied by the middle switch chose i Step. 5. If the coectio request is oempty, go to Step. Above routig cotrol algorithm is effective i reducig the blockig probability of the multicast etwork. It ca provide a factor of two to three performace improvemet over radom routig. 5. Simulatios ad Aalysis We ow study TATRA algorithm by showig its limitatio o weak Clos etworks ad our improvemet upo it. We will take a look at the traffic models first. 5.. Traffic Models I order to compare our strategies with TATRA, we adopt the traffic models i [7]. Both the icomig traffic ad the schedulig decisio operate i a time-slotted maer. Specific details of the traffic models are as followig: Beroulli Traffic For each iput port, the probability that there is a cell arrivig i each time slot is idetical ad idepedet of ay other time slot. This probability represets the offered load or the arrival rate of each iput port of the switch. Bursty Traffic I the bursty traffic model, cells are geerated by Markov chai which has two states busy ad idle. The chai remais i these two states for a geometrically distributed umber of cell times, with expected duratio E[B] ad E[I], respectively. Durig the busy state, cells destied for the same output ports arrive cotiuously i cosecutive time slots. We set E[B] to be 6 cell times. The packet arrival rate is give by: p = E[B]/(E[B] + E[I]). Our simulated switch is assumed to have ifiite buffers at the iputs. The simulatio rus for typically millio cell times uless the switch becomes ustable (i.e. the cell delays are so huge that the switch is uable to sustai the offered load). 5.. Local Strategies ad Simulatios For compariso, we have implemeted TATRA algorithm with both crossbar ad Clos etwork as switchig fabric. We simulate o 8 8 switches i both cases (v(m, 4, ) for Clos etwork). I the case of Clos etworks, we use the routig cotrol algorithm explaied before. It shows whe the umber of middle stages i Clos etwork is large eough (v(6, 4, ) i this case), it will be oblockig as crossbars. Figure 4 shows they have exactly the same average cell delay as a fuctio of offered load, uder both Beroulli ad bursty traffic. However, with the same traffic load, the cell delay uder Beroulli traffic is much smaller tha uder bursty traffic. This is ca be explaied that the burstiess of traffic will cause more traffic jam ad thus more cell delay. We are more iterested i the simulatio results uder weak (blockig) Clos etworks. TATRA algorithm was origially developed for crossbars, which are oblockig. Whe this algorithm is applied to blockig Clos etworks, cell loss occurs. Our goal is to let the cells go through the blockig Clos etworks without icurrig ay cell loss. We modify the TATRA algorithm to discharge the bottommost row ad preset two local strategies uder weak Clos etworks: Small Faout First Strategy (SFFS): Before dischargig the multicast coectio requests at bottom-most row, we rearrage them i the ascedig order accordig to the cardiality of the faout. The we call the routig cotrol algorithm to realize as may multicast coectio requests as we ca. Recall blockig probability is the ratio betwee the umber of cells blocked i the switch ad the umber of all the cells arrivig at the switch. We compare blockig probabilities of differet size of Clos etworks (v(m, 4, 4) ad v(m, 8, 4)) uder Beroulli traffic (Figure 5). Uder SFFS, the blockig probabilities are decreased i all the cases. Figure 5 also idicates by icreasig the middle stage umber of the Clos etworks, blockig probabilities are decreased dramatically, which ca be see whe v(4, 4, 4) is chaged to v(5, 4, 4) i Figure 5(a) ad v(8, 8, 4) is chaged to v(9, 8, 4) i Figure 5(b). The compariso uder bursty traffic also shows the same tred as Beroulli traffic (Figure 6). 5

6 Crossbars x Clos etworks m=4, without Small Faout First Strategy m=4, with Small Faout First Strategy m=5, without Small Faout First Strategy m=5, with Small Faout First Strategy Average Cell Delay (time slot) 0 0 Blockig Probability (a) Beroulli (a) v(m, 4, 4) Crossbars x Clos etworks m=8, without Small Faout First Strategy m=8, with Small Faout First Strategy m=9, without Small Faout First Strategy m=9, with Small Faout First Strategy Average Cell Delay (time slot) 0 3 Blockig Probability (b) Bursty (b) v(m, 8, 4) Figure 4: Graph of average cell delay (i umber of cell times) as a fuctio of offered load Figure 5: Blockig probabilities of Clos etwork uder Beroulli traffic 6

7 Blockig Probability m=4, without Small Faout First Strategy m=4, with Small Faout First Strategy m=5, without Small Faout First Strategy m=5, with Small Faout First Strategy Figure 6: Blockig probabilities of 6 x 6 Clos etwork uder Bursty traffic Throughput (Cell/cell time) with Peak Cell First Strategy without Peack Cell First Strategy they hold great promise i the future switchig etworks. We therefore apply some existig algorithm to Clos etworks ad propose some schedulig strategies to improve the system performace. It shows our strategies ca improve both the throughput ad blockig probabilities. Our itermediate ext step is to develop a algorithm makig weak Clos etwork oblockig (or almost oblockig) without affectig throughput ad cell delays seriously. The above two local strategies are limited. They oly cosider rearragig the bottom-most row of the coectio request. It is also assumed the blocked cells will be discarded. However, sice there are ifiite iput queues i our case, it is ot reasoable to discard the blocked cells. I the future, we will come up with a robust algorithm to improve the blockig probability uder the coditio of weak Clos etwork, while at the same time, the throughput ad cell delay will ot deteriorate too much. The basic idea will be recirculatio, which meas if the local strategies caot help, the blocked cells have to be kept i the iput queues ad rescheduled i the ext time slot. Of course, this will cause more cell delay. I our future research, we will also cosider: Multiple queues per iput port Eve though the VOQ implemetatio i multicast is impractical due to the expoetial growth of the umber of queues for each iput, it is still feasible to use multiple queues per iput for multicast schedulig. [0] has addressed this issue. However these algorithms are all heuristic simulatios without ay theoretical justificatio. Further aalytical model eed to be developed for better justificatio. Figure 7: Throughput of v(4,4,4) Clos etwork Peak Cell First Strategy (PCFS): Before dischargig the multicast coectio requests at bottom-most row, we rearrage them i the order so that multicast coectio requests with peak cells come first. The we call the routig cotrol algorithm to realize as may multicast coectio requests as we ca. We apply PCFS strategy to v(4, 4, 4) Clos etwork. The simulatio of throughput as a fuctio of offered load is give i Figure 7. At above saturated load, the PCFS strategy ca improve the throughput performace. 6 Coclusio ad Future Cosideratios Curret multicast schedulig algorithms are developed o crossbars, ot o MINs such as Clos etworks, eve though Radomizatio Algorithms Radomizatio algorithms have bee applied to the desig of iput-queued switch schedulers [9, ]. However, as far as we kow, radomizatio algorithms have ot yet bee applied to multicast switchig etworks. Clos etwork as the switchig fabric For most of the multicast algorithms discussed above, they have oe poit i commo: they are all cetered aroud the selectio policy to overcome output port cotetio. I the case of blockig Clos etwork, we are more cocered about the iteral blockig. Related algorithms eed to be desiged to cope with iteral blockig. 7 Ackowledgmets I am very grateful to Professor Yuayua Yag for her suggestios ad guidaces whe I was workig o this project. 7

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